/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeTypesGeneric.cpp | 88 EVT LoVT, HiVT; 89 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); 90 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT); 552 EVT LoVT, HiVT; 553 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 555 Hi = DAG.getUNDEF(HiVT);
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LegalizeIntegerTypes.cpp | [all...] |
LegalizeVectorTypes.cpp | 715 EVT LoVT, HiVT; 716 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 736 if (LoVT == HiVT) { 741 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 750 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 756 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits()); 765 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 770 EVT LoVT, HiVT; 772 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 778 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, HiOps) [all...] |
SelectionDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | [all...] |
/external/llvm/lib/Target/R600/ |
AMDGPUISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |