HomeSort by relevance Sort by last modified time
    Searched defs:LoVT (Results 1 - 7 of 7) sorted by null

  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeTypesGeneric.cpp 88 EVT LoVT, HiVT;
89 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT);
90 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT);
552 EVT LoVT, HiVT;
553 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
554 Lo = DAG.getUNDEF(LoVT);
LegalizeVectorTypes.cpp 715 EVT LoVT, HiVT;
716 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
736 if (LoVT == HiVT) {
740 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
749 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
755 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
764 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
770 EVT LoVT, HiVT;
772 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
773 unsigned LoNumElts = LoVT.getVectorNumElements()
    [all...]
SelectionDAG.cpp     [all...]
DAGCombiner.cpp     [all...]
  /external/llvm/include/llvm/CodeGen/
SelectionDAG.h     [all...]
  /external/llvm/lib/Target/R600/
AMDGPUISelLowering.cpp     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp     [all...]

Completed in 163 milliseconds