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    Searched defs:N_PHASES (Results 1 - 3 of 3) sorted by null

  /hardware/intel/img/hwcomposer/merrifield/ips/common/
OverlayHardware.h 36 #define N_PHASES 17
139 uint16_t Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES];
140 uint16_t RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];
141 uint16_t Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES];
142 uint16_t RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];
143 uint16_t UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES];
144 uint16_t RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];
145 uint16_t UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES];
146 uint16_t RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
  /hardware/intel/img/hwcomposer/moorefield_hdmi/ips/common/
OverlayHardware.h 36 #define N_PHASES 17
139 uint16_t Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES];
140 uint16_t RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];
141 uint16_t Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES];
142 uint16_t RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];
143 uint16_t UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES];
144 uint16_t RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];
145 uint16_t UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES];
146 uint16_t RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
  /hardware/intel/img/psb_video/src/
psb_overlay.h 171 #define N_PHASES 17
236 uint16_t Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; /* 0x200 */
237 uint16_t RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];
238 uint16_t Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; /* 0x300 */
239 uint16_t RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];
240 uint16_t UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; /* 0x500 */
241 uint16_t RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];
242 uint16_t UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; /* 0x600 */
243 uint16_t RESERVEDG[0xa00 / 2 - N_HORIZ_UV_TAPS * N_PHASES];

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