Home | History | Annotate | Download | only in src_gcc
      1 /*
      2  * Copyright (C) 2007-2008 ARM Limited
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  *
     16  */
     17 /*
     18  *
     19  */
     20 
     21     .eabi_attribute 24, 1
     22     .eabi_attribute 25, 1
     23 
     24     .arm
     25     .fpu neon
     26     .text
     27 
     28     .global armVCM4P10_Average_4x4_Align0_unsafe
     29     .func   armVCM4P10_Average_4x4_Align0_unsafe
     30 armVCM4P10_Average_4x4_Align0_unsafe:
     31     PUSH     {r4-r6,lr}
     32     LDR      r7, =0x80808080
     33     LDR      r12,[r2,#0]
     34     LDR      r10,[r0],r1
     35     LDR      lr,[r2,r3]
     36     LDR      r11,[r0],r1
     37     MVN      r12,r12
     38     MVN      lr,lr
     39     UHSUB8   r5,r10,r12
     40     UHSUB8   r4,r11,lr
     41     EOR      r5,r5,r7
     42     STR      r5,[r2],r3
     43     EOR      r4,r4,r7
     44     STR      r4,[r2],r3
     45     LDR      r10,[r0],r1
     46     LDR      r12,[r2,#0]
     47     LDR      r11,[r0],r1
     48     LDR      lr,[r2,r3]
     49     MVN      r12,r12
     50     UHSUB8   r5,r10,r12
     51     MVN      lr,lr
     52     UHSUB8   r4,r11,lr
     53     EOR      r5,r5,r7
     54     STR      r5,[r2],r3
     55     EOR      r4,r4,r7
     56     STR      r4,[r2],r3
     57     POP      {r4-r6,pc}
     58     .endfunc
     59 
     60     .global armVCM4P10_Average_4x4_Align2_unsafe
     61     .func   armVCM4P10_Average_4x4_Align2_unsafe
     62 armVCM4P10_Average_4x4_Align2_unsafe:
     63     PUSH     {r4-r6,lr}
     64     LDR      r7, =0x80808080
     65     LDR      r4,[r0,#4]
     66     LDR      r10,[r0],r1
     67     LDR      r12,[r2,#0]
     68     LDR      lr,[r2,r3]
     69     LDR      r5,[r0,#4]
     70     LDR      r11,[r0],r1
     71     MVN      r12,r12
     72     MVN      lr,lr
     73     LSR      r10,r10,#16
     74     ORR      r10,r10,r4,LSL #16
     75     LSR      r11,r11,#16
     76     ORR      r11,r11,r5,LSL #16
     77     UHSUB8   r5,r10,r12
     78     UHSUB8   r4,r11,lr
     79     EOR      r5,r5,r7
     80     STR      r5,[r2],r3
     81     EOR      r4,r4,r7
     82     STR      r4,[r2],r3
     83     LDR      r4,[r0,#4]
     84     LDR      r10,[r0],r1
     85     LDR      r12,[r2,#0]
     86     LDR      lr,[r2,r3]
     87     LDR      r5,[r0,#4]
     88     LDR      r11,[r0],r1
     89     MVN      r12,r12
     90     MVN      lr,lr
     91     LSR      r10,r10,#16
     92     ORR      r10,r10,r4,LSL #16
     93     LSR      r11,r11,#16
     94     ORR      r11,r11,r5,LSL #16
     95     UHSUB8   r5,r10,r12
     96     UHSUB8   r4,r11,lr
     97     EOR      r5,r5,r7
     98     STR      r5,[r2],r3
     99     EOR      r4,r4,r7
    100     STR      r4,[r2],r3
    101     POP      {r4-r6,pc}
    102     .endfunc
    103 
    104     .global armVCM4P10_Average_4x4_Align3_unsafe
    105     .func   armVCM4P10_Average_4x4_Align3_unsafe
    106 armVCM4P10_Average_4x4_Align3_unsafe:
    107     PUSH     {r4-r6,lr}
    108     LDR      r7, =0x80808080
    109     LDR      r4,[r0,#4]
    110     LDR      r10,[r0],r1
    111     LDR      r12,[r2,#0]
    112     LDR      lr,[r2,r3]
    113     LDR      r5,[r0,#4]
    114     LDR      r11,[r0],r1
    115     MVN      r12,r12
    116     MVN      lr,lr
    117     LSR      r10,r10,#24
    118     ORR      r10,r10,r4,LSL #8
    119     LSR      r11,r11,#24
    120     ORR      r11,r11,r5,LSL #8
    121     UHSUB8   r5,r10,r12
    122     UHSUB8   r4,r11,lr
    123     EOR      r5,r5,r7
    124     STR      r5,[r2],r3
    125     EOR      r4,r4,r7
    126     STR      r4,[r2],r3
    127     LDR      r4,[r0,#4]
    128     LDR      r10,[r0],r1
    129     LDR      r12,[r2,#0]
    130     LDR      lr,[r2,r3]
    131     LDR      r5,[r0,#4]
    132     LDR      r11,[r0],r1
    133     MVN      r12,r12
    134     MVN      lr,lr
    135     LSR      r10,r10,#24
    136     ORR      r10,r10,r4,LSL #8
    137     LSR      r11,r11,#24
    138     ORR      r11,r11,r5,LSL #8
    139     UHSUB8   r5,r10,r12
    140     UHSUB8   r4,r11,lr
    141     EOR      r5,r5,r7
    142     STR      r5,[r2],r3
    143     EOR      r4,r4,r7
    144     STR      r4,[r2],r3
    145     POP      {r4-r6,pc}
    146     .endfunc
    147 
    148     .end
    149 
    150