1 /* -*- mode: C; c-basic-offset: 3; -*- */ 2 3 /*--------------------------------------------------------------------*/ 4 /*--- Read DWARF1/2/3/4 debug info. readdwarf.c ---*/ 5 /*--------------------------------------------------------------------*/ 6 7 /* 8 This file is part of Valgrind, a dynamic binary instrumentation 9 framework. 10 11 Copyright (C) 2000-2013 Julian Seward 12 jseward (at) acm.org 13 14 This program is free software; you can redistribute it and/or 15 modify it under the terms of the GNU General Public License as 16 published by the Free Software Foundation; either version 2 of the 17 License, or (at your option) any later version. 18 19 This program is distributed in the hope that it will be useful, but 20 WITHOUT ANY WARRANTY; without even the implied warranty of 21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 General Public License for more details. 23 24 You should have received a copy of the GNU General Public License 25 along with this program; if not, write to the Free Software 26 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 27 02111-1307, USA. 28 29 The GNU General Public License is contained in the file COPYING. 30 */ 31 32 #if defined(VGO_linux) || defined(VGO_darwin) 33 34 #include "pub_core_basics.h" 35 #include "pub_core_debuginfo.h" 36 #include "pub_core_libcbase.h" 37 #include "pub_core_libcassert.h" 38 #include "pub_core_libcprint.h" 39 #include "pub_core_options.h" 40 #include "pub_core_xarray.h" 41 #include "pub_core_tooliface.h" /* VG_(needs) */ 42 #include "priv_misc.h" /* dinfo_zalloc/free/strdup */ 43 #include "priv_image.h" 44 #include "priv_d3basics.h" 45 #include "priv_tytypes.h" 46 #include "priv_storage.h" 47 #include "priv_readdwarf.h" /* self */ 48 49 50 /*------------------------------------------------------------*/ 51 /*--- ---*/ 52 /*--- Read line number and CFI info from DWARF1, DWARF2 ---*/ 53 /*--- and to some extent DWARF3 sections. ---*/ 54 /*--- ---*/ 55 /*------------------------------------------------------------*/ 56 57 /* The below "safe_*ix" functions allow to resist to malformed dwarf info: 58 if dwarf info contains wrong file or dirname indexes, these are (silently!) 59 ignored. */ 60 61 /* if xa_ix is a valid index in fndn_ix_xa, 62 return the element (i.e. the UInt indexing in fndnpool). 63 If xa_ix is invalid, return 0 (i.e. the "null" element in fndnpool). */ 64 static UInt safe_fndn_ix (XArray* fndn_ix_xa, Int xa_ix) 65 { 66 if (xa_ix < 0) return 0; 67 if (xa_ix >= VG_(sizeXA) (fndn_ix_xa)) return 0; 68 return *(UInt*)VG_(indexXA) ( fndn_ix_xa, xa_ix ); 69 } 70 71 /* if xa_ix is a valid index in dirname_xa, 72 return the element (i.e. the HChar*). 73 If xa_ix is invalid, return NULL. */ 74 static const HChar* safe_dirname_ix (XArray* dirname_xa, Int xa_ix) 75 { 76 if (xa_ix < 0) return NULL; 77 if (xa_ix >= VG_(sizeXA) (dirname_xa)) return NULL; 78 return *(HChar**)VG_(indexXA) ( dirname_xa, xa_ix ); 79 } 80 81 /*------------------------------------------------------------*/ 82 /*--- Read DWARF2 format line number info. ---*/ 83 /*------------------------------------------------------------*/ 84 85 /* Structure holding info extracted from the a .debug_line 86 section. */ 87 typedef struct 88 { 89 ULong li_length; 90 UShort li_version; 91 ULong li_header_length; 92 UChar li_min_insn_length; 93 UChar li_max_ops_per_insn; 94 UChar li_default_is_stmt; 95 Int li_line_base; 96 UChar li_line_range; 97 UChar li_opcode_base; 98 } 99 DebugLineInfo; 100 101 /* Structure holding additional infos found from a .debug_info 102 * compilation unit block */ 103 typedef struct 104 { 105 /* Feel free to add more members here if you need ! */ 106 DiCursor compdir; /* Compilation directory - points to .debug_info */ 107 DiCursor name; /* Main file name - points to .debug_info */ 108 ULong stmt_list; /* Offset in .debug_line */ 109 Bool dw64; /* 64-bit Dwarf? */ 110 } 111 UnitInfo; 112 113 /* Line number opcodes. */ 114 enum dwarf_line_number_ops 115 { 116 DW_LNS_extended_op = 0, 117 DW_LNS_copy = 1, 118 DW_LNS_advance_pc = 2, 119 DW_LNS_advance_line = 3, 120 DW_LNS_set_file = 4, 121 DW_LNS_set_column = 5, 122 DW_LNS_negate_stmt = 6, 123 DW_LNS_set_basic_block = 7, 124 DW_LNS_const_add_pc = 8, 125 DW_LNS_fixed_advance_pc = 9, 126 /* DWARF 3. */ 127 DW_LNS_set_prologue_end = 10, 128 DW_LNS_set_epilogue_begin = 11, 129 DW_LNS_set_isa = 12 130 }; 131 132 /* Line number extended opcodes. */ 133 enum dwarf_line_number_x_ops 134 { 135 DW_LNE_end_sequence = 1, 136 DW_LNE_set_address = 2, 137 DW_LNE_define_file = 3, 138 DW_LNE_set_discriminator = 4 139 }; 140 141 typedef struct 142 { 143 /* Information for the last statement boundary. 144 * Needed to calculate statement lengths. */ 145 Addr last_address; 146 UInt last_file; 147 UInt last_line; 148 149 Addr address; 150 UInt file; 151 UInt line; 152 UInt column; 153 Int is_stmt; 154 Int basic_block; 155 UChar end_sequence; 156 } LineSMR; 157 158 159 /* FIXME: duplicated in readdwarf3.c */ 160 /* Read a 'leb128' and advance *data accordingly. */ 161 static ULong step_leb128 ( DiCursor* data, Int sign ) 162 { 163 ULong result = 0; 164 Int shift = 0; 165 UChar byte; 166 167 vg_assert(sign == 0 || sign == 1); 168 169 do { 170 byte = ML_(cur_step_UChar)(data); 171 result |= ((ULong)(byte & 0x7f)) << shift; 172 shift += 7; 173 } 174 while (byte & 0x80); 175 176 if (sign && (shift < 64) && (byte & 0x40)) 177 result |= -(1ULL << shift); 178 179 return result; 180 } 181 182 /* FIXME: duplicated in readdwarf3.c */ 183 static ULong step_leb128U( DiCursor* data ) { 184 return step_leb128( data, 0 ); 185 } 186 187 /* FIXME: duplicated in readdwarf3.c */ 188 static Long step_leb128S( DiCursor* data ) { 189 return step_leb128( data, 1 ); 190 } 191 192 /* Read what the DWARF3 spec calls an "initial length field". This 193 uses up either 4 or 12 bytes of the input and produces a 32-bit or 194 64-bit number respectively. 195 196 Read 32-bit value from p. If it is 0xFFFFFFFF, instead read a 197 64-bit bit value from p+4. This is used in 64-bit dwarf to encode 198 some table lengths. Advance the cursor (p) accordingly. 199 200 XXX this is a hack: the endianness of the initial length field is 201 specified by the DWARF we're reading. This happens to work only 202 because we don't do cross-arch jitting, hence this code runs on a 203 platform of the same endianness as the DWARF it is reading. Same 204 applies for initial lengths for CIE/FDEs and probably in zillions 205 of other places -- to be precise, exactly the places where 206 binutils/dwarf.c calls byte_get(). 207 */ 208 static 209 ULong step_initial_length_field ( DiCursor* p_img, /*OUT*/Bool* is64 ) 210 { 211 UInt w32 = ML_(cur_step_UInt)(p_img); 212 if (w32 == 0xFFFFFFFF) { 213 *is64 = True; 214 return ML_(cur_step_ULong)(p_img); 215 } else { 216 *is64 = False; 217 return (ULong)w32; 218 } 219 } 220 221 static 222 ULong read_initial_length_field ( DiCursor p_img, /*OUT*/Bool* is64 ) 223 { 224 /* Something of a roundabout approach .. the modification to p_img 225 is abandoned. */ 226 return step_initial_length_field( &p_img, is64 ); 227 } 228 229 230 static LineSMR state_machine_regs; 231 232 static 233 void reset_state_machine ( Int is_stmt ) 234 { 235 if (0) VG_(printf)("smr.a := %p (reset)\n", NULL ); 236 state_machine_regs.last_address = 0; 237 state_machine_regs.last_file = 1; 238 state_machine_regs.last_line = 1; 239 state_machine_regs.address = 0; 240 state_machine_regs.file = 1; 241 state_machine_regs.line = 1; 242 state_machine_regs.column = 0; 243 state_machine_regs.is_stmt = is_stmt; 244 state_machine_regs.basic_block = 0; 245 state_machine_regs.end_sequence = 0; 246 } 247 248 //////////////////////////////////////////////////////////////////// 249 //////////////////////////////////////////////////////////////////// 250 251 /* Handled an extended line op starting at *data, and advance *data 252 accordingly. */ 253 static 254 void process_extended_line_op( struct _DebugInfo* di, 255 XArray* fndn_ix_xa, 256 DiCursor* data, Int is_stmt) 257 { 258 UInt len = step_leb128U(data); 259 if (len == 0) { 260 VG_(message)(Vg_UserMsg, 261 "Warning: DWARF2 reader: " 262 "Badly formed extended line op encountered\n"); 263 return; 264 } 265 266 UChar op_code = ML_(cur_step_UChar)(data); 267 if (0) VG_(printf)("dwarf2: ext OPC: %d\n", op_code); 268 269 switch (op_code) { 270 case DW_LNE_end_sequence: 271 if (0) VG_(printf)("1001: si->o %#lx, smr.a %#lx\n", 272 di->text_debug_bias, state_machine_regs.address ); 273 /* JRS: added for compliance with spec; is pointless due to 274 reset_state_machine below */ 275 state_machine_regs.end_sequence = 1; 276 277 if (state_machine_regs.is_stmt) { 278 if (state_machine_regs.last_address) { 279 ML_(addLineInfo) ( 280 di, 281 safe_fndn_ix (fndn_ix_xa, 282 state_machine_regs.last_file), 283 di->text_debug_bias + state_machine_regs.last_address, 284 di->text_debug_bias + state_machine_regs.address, 285 state_machine_regs.last_line, 0 286 ); 287 } 288 } 289 reset_state_machine (is_stmt); 290 if (di->ddump_line) 291 VG_(printf)(" Extended opcode %d: End of Sequence\n\n", 292 (Int)op_code); 293 break; 294 295 case DW_LNE_set_address: { 296 Addr adr = ML_(cur_step_Addr)(data); 297 state_machine_regs.address = adr; 298 if (di->ddump_line) 299 VG_(printf)(" Extended opcode %d: set Address to 0x%lx\n", 300 (Int)op_code, (Addr)adr); 301 break; 302 } 303 304 case DW_LNE_define_file: { 305 HChar* name = ML_(cur_step_strdup)(data, "di.pelo.1"); 306 UInt fndn_ix = ML_(addFnDn) (di, name, NULL); 307 VG_(addToXA) (fndn_ix_xa, &fndn_ix); 308 ML_(dinfo_free)(name); 309 (void)step_leb128U(data); // ignored: dir index 310 (void)step_leb128U(data); // ignored: mod time 311 (void)step_leb128U(data); // ignored: file size 312 if (di->ddump_line) 313 VG_(printf)(" DWARF2-line: set_address\n"); 314 break; 315 } 316 317 case DW_LNE_set_discriminator: 318 (void)step_leb128U(data); // ignored: new 'discriminator' value 319 break; 320 321 default: 322 if (di->ddump_line) 323 VG_(printf)("process_extended_line_op:default\n"); 324 break; 325 } 326 } 327 328 //////////////////////////////////////////////////////////////////// 329 //////////////////////////////////////////////////////////////////// 330 331 /* read a .debug_line section block for a compilation unit 332 * 333 * Input: - theBlock must point to the start of the block 334 * for the given compilation unit 335 * - ui contains additional info like the compilation dir 336 * for this unit 337 * 338 * Output: - si debug info structures get updated 339 */ 340 static 341 void read_dwarf2_lineblock ( struct _DebugInfo* di, 342 const UnitInfo* ui, 343 DiCursor theBlock, /* IMAGE */ 344 Int noLargerThan ) 345 { 346 Int i; 347 DebugLineInfo info; 348 Bool is64; 349 XArray* fndn_ix_xa; /* xarray of UInt fndn_ix */ 350 UInt fndn_ix; 351 XArray* dirname_xa; /* xarray of const HChar* dirname */ 352 const HChar* dirname; 353 354 DiCursor external = theBlock; 355 DiCursor data = theBlock; 356 357 /* fndn_ix_xa is an xarray of fndn_ix (indexes in di->fndnpool) which 358 are build from file names harvested from the DWARF2 359 info. Entry [0] is the "null" pool index and is never referred to 360 by the state machine. 361 362 Similarly, dirname_xa is an xarray of directory names. Entry [0] 363 is also NULL and denotes "we don't know what the path is", since 364 that is different from "the path is the empty string". Unlike 365 the fndn_ix_xa table, the state machine does refer to entry [0], 366 which basically means "." ("the current directory of the 367 compilation", whatever that means, according to the DWARF3 368 spec.) 369 */ 370 371 /* Fails due to gcc padding ... 372 vg_assert(sizeof(DWARF2_External_LineInfo) 373 == sizeof(DWARF2_Internal_LineInfo)); 374 */ 375 376 dirname_xa = VG_(newXA) (ML_(dinfo_zalloc), "di.rd2l.1", ML_(dinfo_free), 377 sizeof(HChar*) ); 378 fndn_ix_xa = VG_(newXA) (ML_(dinfo_zalloc), "di.rd2l.2", ML_(dinfo_free), 379 sizeof(UInt) ); 380 381 /* DWARF2 starts numbering filename entries at 1, so we need to 382 add a dummy zeroth entry to the table. */ 383 fndn_ix = 0; // 0 is the "null" index in a fixed pool. 384 VG_(addToXA) (fndn_ix_xa, &fndn_ix); 385 386 if (ML_(cur_is_valid)(ui->compdir)) 387 dirname = ML_(addStrFromCursor)(di, ui->compdir); 388 else 389 dirname = ML_(addStr)(di, ".", -1); 390 VG_(addToXA) (dirname_xa, &dirname); 391 392 info.li_length = step_initial_length_field( &external, &is64 ); 393 if (di->ddump_line) 394 VG_(printf)(" Length: %llu\n", 395 info.li_length); 396 397 /* Check the length of the block. */ 398 if (info.li_length > noLargerThan) { 399 ML_(symerr)(di, True, 400 "DWARF line info appears to be corrupt " 401 "- the section is too small"); 402 goto out; 403 } 404 405 /* Check its version number. */ 406 info.li_version = ML_(cur_step_UShort)(&external); 407 if (di->ddump_line) 408 VG_(printf)(" DWARF Version: %d\n", 409 (Int)info.li_version); 410 411 if (info.li_version != 2 && info.li_version != 3 && info.li_version != 4) { 412 ML_(symerr)(di, True, 413 "Only DWARF version 2, 3 and 4 line info " 414 "is currently supported."); 415 goto out; 416 } 417 418 info.li_header_length = is64 ? ML_(cur_step_ULong)(&external) 419 : (ULong)(ML_(cur_step_UInt)(&external)); 420 if (di->ddump_line) 421 VG_(printf)(" Prologue Length: %llu\n", 422 info.li_header_length); 423 424 info.li_min_insn_length = ML_(cur_step_UChar)(&external); 425 if (di->ddump_line) 426 VG_(printf)(" Minimum Instruction Length: %d\n", 427 (Int)info.li_min_insn_length); 428 429 /* We only support machines with one opcode per instruction 430 for now. If we ever want to support VLIW machines there is 431 code to handle multiple opcodes per instruction in the 432 patch attached to BZ#233595. 433 */ 434 if (info.li_version >= 4) { 435 info.li_max_ops_per_insn = ML_(cur_step_UChar)(&external); 436 if (info.li_max_ops_per_insn != 1) { 437 ML_(symerr)(di, True, 438 "Invalid Maximum Ops Per Insn in line info."); 439 goto out; 440 } 441 if (di->ddump_line) 442 VG_(printf)(" Maximum Ops Per Insn: %d\n", 443 (Int)info.li_max_ops_per_insn); 444 } else { 445 info.li_max_ops_per_insn = 1; 446 } 447 448 info.li_default_is_stmt = ML_(cur_step_UChar)(&external); 449 if (di->ddump_line) 450 VG_(printf)(" Initial value of 'is_stmt': %d\n", 451 (Int)info.li_default_is_stmt); 452 453 /* Josef Weidendorfer (20021021) writes: 454 455 It seems to me that the Intel Fortran compiler generates bad 456 DWARF2 line info code: It sets "is_stmt" of the state machine in 457 the the line info reader to be always false. Thus, there is 458 never a statement boundary generated and therefore never a 459 instruction range/line number mapping generated for valgrind. 460 461 Please have a look at the DWARF2 specification, Ch. 6.2 462 (x86.ddj.com/ftp/manuals/tools/dwarf.pdf). Perhaps I understand 463 this wrong, but I don't think so. 464 465 I just had a look at the GDB DWARF2 reader... They completely 466 ignore "is_stmt" when recording line info ;-) That's the reason 467 "objdump -S" works on files from the the intel fortran compiler. 468 469 Therefore: */ 470 info.li_default_is_stmt = True; 471 472 /* JRS: changed (UInt*) to (UChar*) */ 473 info.li_line_base = ML_(cur_step_UChar)(&external); 474 info.li_line_base = (Int)(Char)info.li_line_base; 475 if (di->ddump_line) 476 VG_(printf)(" Line Base: %d\n", 477 info.li_line_base); 478 479 info.li_line_range = ML_(cur_step_UChar)(&external); 480 if (di->ddump_line) 481 VG_(printf)(" Line Range: %d\n", 482 (Int)info.li_line_range); 483 484 info.li_opcode_base = ML_(cur_step_UChar)(&external); 485 if (di->ddump_line) 486 VG_(printf)(" Opcode Base: %d\n\n", 487 info.li_opcode_base); 488 489 if (0) VG_(printf)("dwarf2: line base: %d, range %d, opc base: %d\n", 490 (Int)info.li_line_base, 491 (Int)info.li_line_range, 492 (Int)info.li_opcode_base); 493 494 DiCursor end_of_sequence 495 = ML_(cur_plus)(data, info.li_length + (is64 ? 12 : 4)); 496 497 reset_state_machine (info.li_default_is_stmt); 498 499 /* Read the contents of the Opcodes table. */ 500 DiCursor standard_opcodes = external; 501 if (di->ddump_line) { 502 VG_(printf)(" Opcodes:\n"); 503 for (i = 1; i < (Int)info.li_opcode_base; i++) { 504 VG_(printf)(" Opcode %d has %d args\n", 505 i, (Int)ML_(cur_read_UChar)( 506 ML_(cur_plus)(standard_opcodes, 507 (i-1) * sizeof(UChar)) )); 508 } 509 VG_(printf)("\n"); 510 } 511 /* skip over "standard_opcode_lengths" */ 512 data = ML_(cur_plus)(standard_opcodes, info.li_opcode_base - 1); 513 514 /* Read the contents of the Directory table. */ 515 if (di->ddump_line) 516 VG_(printf)(" The Directory Table%s\n", 517 ML_(cur_read_UChar)(data) == 0 ? " is empty." : ":" ); 518 519 while (ML_(cur_read_UChar)(data) != 0) { 520 521 HChar* data_str = ML_(cur_read_strdup)(data, "di.rd2l.1"); 522 if (di->ddump_line) 523 VG_(printf)(" %s\n", data_str); 524 525 /* If data[0] is '/', then 'data' is an absolute path and we 526 don't mess with it. Otherwise, construct the 527 path 'ui->compdir' ++ "/" ++ 'data'. */ 528 529 if (data_str[0] != '/' 530 /* not an absolute path */ 531 && ML_(cur_is_valid)(ui->compdir) 532 /* actually got something sensible for compdir */ 533 && ML_(cur_strlen)(ui->compdir)) 534 { 535 HChar* compdir_str = ML_(cur_read_strdup)(ui->compdir, "di.rd2l.1b"); 536 SizeT len = VG_(strlen)(compdir_str) + 1 + VG_(strlen)(data_str); 537 HChar *buf = ML_(dinfo_zalloc)("di.rd2l.1c", len + 1); 538 539 VG_(strcpy)(buf, compdir_str); 540 VG_(strcat)(buf, "/"); 541 VG_(strcat)(buf, data_str); 542 543 dirname = ML_(addStr)(di, buf, len); 544 VG_(addToXA) (dirname_xa, &dirname); 545 if (0) VG_(printf)("rel path %s\n", buf); 546 ML_(dinfo_free)(compdir_str); 547 ML_(dinfo_free)(buf); 548 } else { 549 /* just use 'data'. */ 550 dirname = ML_(addStr)(di,data_str,-1); 551 VG_(addToXA) (dirname_xa, &dirname); 552 if (0) VG_(printf)("abs path %s\n", data_str); 553 } 554 555 data = ML_(cur_plus)(data, VG_(strlen)(data_str) + 1); 556 ML_(dinfo_free)(data_str); 557 } 558 559 if (di->ddump_line) 560 VG_(printf)("\n"); 561 562 if (ML_(cur_read_UChar)(data) != 0) { 563 ML_(symerr)(di, True, 564 "can't find NUL at end of DWARF2 directory table"); 565 goto out; 566 } 567 data = ML_(cur_plus)(data, 1); 568 569 /* Read the contents of the File Name table. This produces a bunch 570 of fndn_ix in fndn_ix_xa. */ 571 if (di->ddump_line) { 572 VG_(printf)(" The File Name Table:\n"); 573 VG_(printf)(" Entry Dir Time Size Name\n"); 574 } 575 576 i = 1; 577 while (ML_(cur_read_UChar)(data) != 0) { 578 HChar* name = ML_(cur_step_strdup)(&data, "di.rd2l.2"); 579 Int diridx = step_leb128U(&data); 580 Int uu_time = step_leb128U(&data); /* unused */ 581 Int uu_size = step_leb128U(&data); /* unused */ 582 583 dirname = safe_dirname_ix( dirname_xa, diridx ); 584 fndn_ix = ML_(addFnDn) (di, name, dirname); 585 VG_(addToXA) (fndn_ix_xa, &fndn_ix); 586 if (0) VG_(printf)("file %s diridx %d\n", name, diridx ); 587 if (di->ddump_line) 588 VG_(printf)(" %d\t%d\t%d\t%d\t%s\n", 589 i, diridx, uu_time, uu_size, name); 590 i++; 591 ML_(dinfo_free)(name); 592 } 593 594 if (di->ddump_line) 595 VG_(printf)("\n"); 596 597 if (ML_(cur_read_UChar)(data) != 0) { 598 ML_(symerr)(di, True, 599 "can't find NUL at end of DWARF2 file name table"); 600 goto out; 601 } 602 data = ML_(cur_plus)(data, 1); 603 604 if (di->ddump_line) 605 VG_(printf)(" Line Number Statements:\n"); 606 607 /* Now display the statements. */ 608 609 while (ML_(cur_cmpLT)(data, end_of_sequence)) { 610 UChar op_code = ML_(cur_step_UChar)(&data); 611 612 if (0) VG_(printf)("dwarf2: OPC: %d\n", op_code); 613 614 if (op_code >= info.li_opcode_base) { 615 op_code -= info.li_opcode_base; 616 Word adv = (op_code / info.li_line_range) 617 * info.li_min_insn_length; 618 Int advAddr = adv; 619 state_machine_regs.address += adv; 620 621 if (0) VG_(printf)("smr.a += %#lx\n", adv ); 622 adv = (op_code % info.li_line_range) + info.li_line_base; 623 if (0) VG_(printf)("1002: di->o %#lx, smr.a %#lx\n", 624 di->text_debug_bias, state_machine_regs.address ); 625 state_machine_regs.line += adv; 626 627 if (di->ddump_line) 628 VG_(printf)(" Special opcode %d: advance Address by %d " 629 "to 0x%lx and Line by %d to %d\n", 630 (Int)op_code, advAddr, state_machine_regs.address, 631 (Int)adv, (Int)state_machine_regs.line ); 632 633 if (state_machine_regs.is_stmt) { 634 /* only add a statement if there was a previous boundary */ 635 if (state_machine_regs.last_address) { 636 ML_(addLineInfo)( 637 di, 638 safe_fndn_ix (fndn_ix_xa, 639 state_machine_regs.last_file), 640 di->text_debug_bias + state_machine_regs.last_address, 641 di->text_debug_bias + state_machine_regs.address, 642 state_machine_regs.last_line, 643 0 644 ); 645 } 646 state_machine_regs.last_address = state_machine_regs.address; 647 state_machine_regs.last_file = state_machine_regs.file; 648 state_machine_regs.last_line = state_machine_regs.line; 649 } 650 } 651 652 else { /* ! (op_code >= info.li_opcode_base) */ 653 654 switch (op_code) { 655 case DW_LNS_extended_op: 656 process_extended_line_op ( 657 di, fndn_ix_xa, 658 &data, info.li_default_is_stmt); 659 break; 660 661 case DW_LNS_copy: 662 if (0) VG_(printf)("1002: di->o %#lx, smr.a %#lx\n", 663 di->text_debug_bias, state_machine_regs.address ); 664 if (state_machine_regs.is_stmt) { 665 /* only add a statement if there was a previous boundary */ 666 if (state_machine_regs.last_address) { 667 ML_(addLineInfo)( 668 di, 669 safe_fndn_ix (fndn_ix_xa, 670 state_machine_regs.last_file), 671 di->text_debug_bias + state_machine_regs.last_address, 672 di->text_debug_bias + state_machine_regs.address, 673 state_machine_regs.last_line, 674 0 675 ); 676 } 677 state_machine_regs.last_address = state_machine_regs.address; 678 state_machine_regs.last_file = state_machine_regs.file; 679 state_machine_regs.last_line = state_machine_regs.line; 680 } 681 state_machine_regs.basic_block = 0; /* JRS added */ 682 if (di->ddump_line) 683 VG_(printf)(" Copy\n"); 684 break; 685 686 case DW_LNS_advance_pc: { 687 Word adv = info.li_min_insn_length * step_leb128U(&data); 688 state_machine_regs.address += adv; 689 if (0) VG_(printf)("smr.a += %#lx\n", adv ); 690 if (di->ddump_line) 691 VG_(printf)(" Advance PC by %ld to 0x%lx\n", 692 adv, state_machine_regs.address); 693 break; 694 } 695 case DW_LNS_advance_line: { 696 Word adv = step_leb128S(&data); 697 state_machine_regs.line += adv; 698 if (di->ddump_line) 699 VG_(printf)(" Advance Line by %ld to %d\n", 700 adv, (Int)state_machine_regs.line); 701 break; 702 } 703 case DW_LNS_set_file: { 704 Word adv = step_leb128U(&data); 705 state_machine_regs.file = adv; 706 if (di->ddump_line) 707 VG_(printf)(" Set File Name to entry %ld in the " 708 "File Name Table\n", adv); 709 break; 710 } 711 case DW_LNS_set_column: { 712 Word adv = step_leb128U(&data); 713 state_machine_regs.column = adv; 714 if (di->ddump_line) 715 VG_(printf)(" Set column to %ld\n", adv); 716 break; 717 } 718 case DW_LNS_negate_stmt: { 719 Int adv = state_machine_regs.is_stmt; 720 adv = ! adv; 721 state_machine_regs.is_stmt = adv; 722 if (di->ddump_line) 723 VG_(printf)(" DWARF2-line: negate_stmt\n"); 724 break; 725 } 726 case DW_LNS_set_basic_block: { 727 state_machine_regs.basic_block = 1; 728 if (di->ddump_line) 729 VG_(printf)(" DWARF2-line: set_basic_block\n"); 730 break; 731 } 732 case DW_LNS_const_add_pc: { 733 Word adv = (((255 - info.li_opcode_base) / info.li_line_range) 734 * info.li_min_insn_length); 735 state_machine_regs.address += adv; 736 if (0) VG_(printf)("smr.a += %#lx\n", adv ); 737 if (di->ddump_line) 738 VG_(printf)(" Advance PC by constant %ld to 0x%lx\n", 739 adv, (Addr)state_machine_regs.address); 740 break; 741 } 742 case DW_LNS_fixed_advance_pc: { 743 /* XXX: Need something to get 2 bytes */ 744 Word adv = ML_(cur_step_UShort)(&data); 745 state_machine_regs.address += adv; 746 if (0) VG_(printf)("smr.a += %#lx\n", adv ); 747 if (di->ddump_line) 748 VG_(printf)(" DWARF2-line: fixed_advance_pc\n"); 749 break; 750 } 751 case DW_LNS_set_prologue_end: 752 if (di->ddump_line) 753 VG_(printf)(" DWARF2-line: set_prologue_end\n"); 754 break; 755 756 case DW_LNS_set_epilogue_begin: 757 if (di->ddump_line) 758 VG_(printf)(" DWARF2-line: set_epilogue_begin\n"); 759 break; 760 761 case DW_LNS_set_isa: 762 (void)step_leb128U(&data); 763 if (di->ddump_line) 764 VG_(printf)(" DWARF2-line: set_isa\n"); 765 break; 766 767 default: { 768 Int j; 769 for (j = (Int)ML_(cur_read_UChar)( 770 ML_(cur_plus)(standard_opcodes, 771 (op_code-1) * sizeof(UChar))); 772 j > 0 ; --j) { 773 step_leb128U(&data); 774 } 775 if (di->ddump_line) 776 VG_(printf)(" Unknown opcode %d\n", (Int)op_code); 777 break; 778 } 779 } /* switch (op_code) */ 780 781 } /* if (op_code >= info.li_opcode_base) */ 782 783 } /* while (data < end_of_sequence) */ 784 785 if (di->ddump_line) 786 VG_(printf)("\n"); 787 788 out: 789 VG_(deleteXA)(dirname_xa); 790 VG_(deleteXA)(fndn_ix_xa); 791 } 792 793 //////////////////////////////////////////////////////////////////// 794 //////////////////////////////////////////////////////////////////// 795 796 /* Return abbrev for given code 797 * Returned cursor points to the tag 798 * */ 799 static DiCursor lookup_abbrev( DiCursor p, ULong acode ) 800 { 801 while (1) { 802 ULong code = step_leb128U(&p); 803 if (code == acode) 804 return p; 805 (void)step_leb128U(&p); /* skip tag */ 806 p = ML_(cur_plus)(p,1); /* skip has_children flag */ 807 ULong name; 808 do { 809 name = step_leb128U(&p); /* name */ 810 (void)step_leb128U(&p); /* form */ 811 } 812 while (name != 0); /* until name == form == 0 */ 813 } 814 } 815 816 /* Read general information for a particular compile unit block in 817 * the .debug_info section. In particular read the name, compdir and 818 * stmt_list needed to parse the line number information. 819 * 820 * Input: - unitblock is the start of a compilation 821 * unit block in .debuginfo section 822 * - debugabbrev is start of .debug_abbrev section 823 * - debugstr is start of .debug_str section 824 * - debugstr_alt_img is start of .debug_str section in alt debug file 825 * 826 * Output: Fill members of ui pertaining to the compilation unit: 827 * - ui->name is the name of the compilation unit 828 * - ui->compdir is the compilation unit directory 829 * - ui->stmt_list is the offset in .debug_line section 830 * for the dbginfos of this compilation unit 831 * 832 * Note : the output strings are not allocated and point 833 * directly to the memory-mapped section. 834 */ 835 static 836 void read_unitinfo_dwarf2( /*OUT*/UnitInfo* ui, 837 DiCursor unitblock_img, 838 DiCursor debugabbrev_img, 839 DiCursor debugstr_img, 840 DiCursor debugstr_alt_img ) 841 { 842 UInt acode, abcode; 843 ULong atoffs, blklen; 844 UShort ver; 845 846 UChar addr_size; 847 DiCursor p = unitblock_img; 848 DiCursor end_img; 849 DiCursor abbrev_img; 850 851 VG_(memset)( ui, 0, sizeof( UnitInfo ) ); 852 ui->stmt_list = -1LL; 853 854 /* Read the compilation unit header in .debug_info section - See p 70 */ 855 856 /* This block length */ 857 blklen = step_initial_length_field( &p, &ui->dw64 ); 858 859 /* version should be 2, 3 or 4 */ 860 ver = ML_(cur_step_UShort)(&p); 861 862 /* get offset in abbrev */ 863 atoffs = ui->dw64 ? ML_(cur_step_ULong)(&p) 864 : (ULong)(ML_(cur_step_UInt)(&p)); 865 866 /* Address size */ 867 addr_size = ML_(cur_step_UChar)(&p); 868 869 /* End of this block */ 870 end_img = ML_(cur_plus)(unitblock_img, blklen + (ui->dw64 ? 12 : 4)); 871 872 /* Abbreviation data for this block */ 873 abbrev_img = ML_(cur_plus)(debugabbrev_img, atoffs); 874 875 /* Read the compilation unit entry - this is always the first DIE. 876 * See DWARF4 para 7.5. */ 877 if (ML_(cur_cmpLT)(p, end_img)) { 878 UInt tag; 879 880 acode = step_leb128U( &p ); /* abbreviation code */ 881 882 /* Read abbreviation header */ 883 abcode = step_leb128U( &abbrev_img ); /* abbreviation code */ 884 if ( acode != abcode ) { 885 /* This isn't illegal, but somewhat unlikely. Normally the 886 * first abbrev describes the first DIE, the compile_unit. 887 * But maybe this abbrevation data is shared with another 888 * or it is a NULL entry used for padding. See para 7.5.3. */ 889 abbrev_img = lookup_abbrev( ML_(cur_plus)(debugabbrev_img, atoffs), 890 acode ); 891 } 892 893 tag = step_leb128U( &abbrev_img ); 894 895 if ( tag != 0x0011 /*TAG_compile_unit*/ ) 896 return; /* Not a compile unit (might be partial) or broken DWARF. */ 897 898 /* DW_CHILDREN_yes or DW_CHILDREN_no */ 899 abbrev_img = ML_(cur_plus)(abbrev_img, 1); 900 901 /* And loop on entries */ 902 for ( ; ; ) { 903 /* Read entry definition */ 904 ULong cval = -1LL; /* Constant value read */ 905 DiCursor sval = DiCursor_INVALID; /* String value read */ 906 UInt name = step_leb128U( &abbrev_img ); 907 UInt form = step_leb128U( &abbrev_img ); 908 if (name == 0) 909 break; 910 911 /* Read data */ 912 /* Attributes encoding explained p 71 */ 913 if ( form == 0x16 /* FORM_indirect */ ) 914 form = step_leb128U( &p ); 915 /* Decode form. For most kinds, Just skip the amount of data since 916 we don't use it for now */ 917 /* JRS 9 Feb 06: This now handles 64-bit DWARF too. In 918 64-bit DWARF, lineptr (and loclistptr,macptr,rangelistptr 919 classes) use FORM_data8, not FORM_data4. Also, 920 FORM_ref_addr and FORM_strp are 64-bit values, not 32-bit 921 values. */ 922 /* TJH 27 Apr 10: in DWARF 4 lineptr (and loclistptr,macptr, 923 rangelistptr classes) use FORM_sec_offset which is 64 bits 924 in 64 bit DWARF and 32 bits in 32 bit DWARF. */ 925 /* JRS 20 Apr 11: LLVM-2.9 encodes DW_AT_stmt_list using 926 FORM_addr rather than the FORM_data4 that GCC uses. Hence 927 handle FORM_addr too. */ 928 switch( form ) { 929 /* Those cases extract the data properly */ 930 case 0x05: /* FORM_data2 */ 931 cval = ML_(cur_step_UShort)(&p); 932 break; 933 case 0x06: /* FORM_data4 */ 934 cval = ML_(cur_step_UInt)(&p); 935 break; 936 case 0x0e: /* FORM_strp */ /* pointer in .debug_str */ 937 /* 2006-01-01: only generate a value if a debug_str 938 section was found) */ 939 if (ML_(cur_is_valid)(debugstr_img) && !ui->dw64) 940 sval = ML_(cur_plus)(debugstr_img, ML_(cur_read_UInt)(p)); 941 if (ML_(cur_is_valid)(debugstr_img) && ui->dw64) 942 sval = ML_(cur_plus)(debugstr_img, ML_(cur_read_ULong)(p)); 943 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4); 944 break; 945 case 0x08: /* FORM_string */ 946 sval = p; 947 p = ML_(cur_plus)(p, ML_(cur_strlen)(p) + 1); 948 break; 949 case 0x0b: /* FORM_data1 */ 950 cval = ML_(cur_step_UChar)(&p); 951 break; 952 case 0x17: /* FORM_sec_offset */ 953 if (ui->dw64) { 954 cval = ML_(cur_step_ULong)(&p); 955 } else { 956 cval = ML_(cur_step_UInt)(&p); 957 }; 958 break; 959 case 0x07: /* FORM_data8 */ 960 if (ui->dw64) cval = ML_(cur_read_ULong)(p); 961 p = ML_(cur_plus)(p, 8); 962 /* perhaps should assign unconditionally to cval? */ 963 break; 964 /* TODO : Following ones just skip data - implement if you need */ 965 case 0x01: /* FORM_addr */ 966 p = ML_(cur_plus)(p, addr_size); 967 break; 968 case 0x03: /* FORM_block2 */ 969 p = ML_(cur_plus)(p, ML_(cur_read_UShort)(p) + 2); 970 break; 971 case 0x04: /* FORM_block4 */ 972 p = ML_(cur_plus)(p, ML_(cur_read_UInt)(p) + 4); 973 break; 974 case 0x09: /* FORM_block */ /* fallthrough */ 975 case 0x18: { /* FORM_exprloc */ 976 ULong block_len = step_leb128U(&p); 977 p = ML_(cur_plus)(p, block_len); 978 break; 979 } 980 case 0x0a: /* FORM_block1 */ 981 p = ML_(cur_plus)(p, ML_(cur_read_UChar)(p) + 1); 982 break; 983 case 0x0c: /* FORM_flag */ 984 p = ML_(cur_plus)(p, 1); 985 break; 986 case 0x0d: /* FORM_sdata */ 987 (void)step_leb128S(&p); 988 break; 989 case 0x0f: /* FORM_udata */ 990 (void)step_leb128U(&p); 991 break; 992 case 0x10: /* FORM_ref_addr */ 993 p = ML_(cur_plus)(p, (ver == 2) ? addr_size 994 : (ui->dw64 ? 8 : 4)); 995 break; 996 case 0x11: /* FORM_ref1 */ 997 p = ML_(cur_plus)(p, 1); 998 break; 999 case 0x12: /* FORM_ref2 */ 1000 p = ML_(cur_plus)(p, 2); 1001 break; 1002 case 0x13: /* FORM_ref4 */ 1003 p = ML_(cur_plus)(p, 4); 1004 break; 1005 case 0x14: /* FORM_ref8 */ 1006 p = ML_(cur_plus)(p, 8); 1007 break; 1008 case 0x15: /* FORM_ref_udata */ 1009 (void)step_leb128U(&p); 1010 break; 1011 case 0x19: /* FORM_flag_present */ 1012 break; 1013 case 0x20: /* FORM_ref_sig8 */ 1014 p = ML_(cur_plus)(p, 8); 1015 break; 1016 case 0x1f20: /* FORM_GNU_ref_alt */ 1017 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4); 1018 break; 1019 case 0x1f21: /* FORM_GNU_strp_alt */ 1020 if (ML_(cur_is_valid)(debugstr_alt_img) && !ui->dw64) 1021 sval = ML_(cur_plus)(debugstr_alt_img, 1022 ML_(cur_read_UInt)(p)); 1023 if (ML_(cur_is_valid)(debugstr_alt_img) && ui->dw64) 1024 sval = ML_(cur_plus)(debugstr_alt_img, 1025 ML_(cur_read_ULong)(p)); 1026 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4); 1027 break; 1028 1029 default: 1030 VG_(printf)( "### unhandled dwarf2 abbrev form code 0x%x\n", 1031 form ); 1032 break; 1033 } 1034 1035 /* Now store the members we need in the UnitInfo structure */ 1036 if ( tag == 0x0011 /*TAG_compile_unit*/ ) { 1037 if ( name == 0x03 ) ui->name = sval; /* DW_AT_name */ 1038 else if ( name == 0x1b ) ui->compdir = sval; /* DW_AT_compdir */ 1039 else if ( name == 0x10 ) ui->stmt_list = cval; /* DW_AT_stmt_list */ 1040 } 1041 } 1042 } /* Just read the first DIE, if that wasn't the compile_unit then 1043 * this might have been a partial unit or broken DWARF info. 1044 * That's enough info for us, and we are not gdb ! */ 1045 } 1046 1047 1048 //////////////////////////////////////////////////////////////////// 1049 //////////////////////////////////////////////////////////////////// 1050 1051 /* Collect the debug info from DWARF3 debugging sections 1052 * of a given module. 1053 * 1054 * Inputs: given .debug_xxx sections 1055 * Output: update di to contain all the DWARF3 debug infos 1056 */ 1057 void ML_(read_debuginfo_dwarf3) 1058 ( struct _DebugInfo* di, 1059 DiSlice escn_debug_info, /* .debug_info */ 1060 DiSlice escn_debug_types, /* .debug_types */ 1061 DiSlice escn_debug_abbv, /* .debug_abbrev */ 1062 DiSlice escn_debug_line, /* .debug_line */ 1063 DiSlice escn_debug_str, /* .debug_str */ 1064 DiSlice escn_debug_str_alt ) /* .debug_str */ 1065 { 1066 UnitInfo ui; 1067 UShort ver; 1068 ULong blklen; 1069 Bool blklen_is_64; 1070 1071 /* Make sure we at least have a header for the first block */ 1072 if (escn_debug_info.szB < 4) { 1073 ML_(symerr)( di, True, 1074 "Last block truncated in .debug_info; ignoring" ); 1075 return; 1076 } 1077 1078 DiCursor block_img = DiCursor_INVALID; 1079 DiCursor end1_img = ML_(cur_plus)( ML_(cur_from_sli)(escn_debug_info), 1080 escn_debug_info.szB ); 1081 Int blklen_len = 0; 1082 1083 /* Iterate on all the blocks we find in .debug_info */ 1084 for ( block_img = ML_(cur_from_sli)(escn_debug_info); 1085 ML_(cur_cmpLT)(block_img, ML_(cur_plus)(end1_img, -(DiOffT)4)); 1086 block_img = ML_(cur_plus)(block_img, blklen + blklen_len) ) { 1087 1088 /* Read the compilation unit header in .debug_info section - See 1089 p 70 */ 1090 /* This block length */ 1091 blklen = read_initial_length_field( block_img, &blklen_is_64 ); 1092 blklen_len = blklen_is_64 ? 12 : 4; 1093 1094 if (ML_(cur_cmpGT)( ML_(cur_plus)(block_img, blklen + blklen_len), 1095 end1_img )) { 1096 ML_(symerr)( di, True, 1097 "Last block truncated in .debug_info; ignoring" ); 1098 return; 1099 } 1100 1101 /* version should be 2 */ 1102 ver = ML_(cur_read_UShort)( ML_(cur_plus)(block_img, blklen_len) ); 1103 if ( ver != 2 && ver != 3 && ver != 4 ) { 1104 ML_(symerr)( di, True, 1105 "Ignoring non-Dwarf2/3/4 block in .debug_info" ); 1106 continue; 1107 } 1108 1109 /* Fill ui with offset in .debug_line and compdir */ 1110 if (0) 1111 VG_(printf)( 1112 "Reading UnitInfo at 0x%llx.....\n", 1113 (ULong)ML_(cur_minus)( block_img, 1114 ML_(cur_from_sli)(escn_debug_info)) ); 1115 read_unitinfo_dwarf2( &ui, block_img, 1116 ML_(cur_from_sli)(escn_debug_abbv), 1117 ML_(cur_from_sli)(escn_debug_str), 1118 ML_(cur_from_sli)(escn_debug_str_alt) ); 1119 if (0) { 1120 HChar* str_name = ML_(cur_read_strdup)(ui.name, "di.rdd3.1"); 1121 HChar* str_compdir = ML_(cur_read_strdup)(ui.compdir, "di.rdd3.2"); 1122 VG_(printf)( " => LINES=0x%llx NAME=%s DIR=%s\n", 1123 ui.stmt_list, str_name, str_compdir ); 1124 ML_(dinfo_free)(str_name); 1125 ML_(dinfo_free)(str_compdir); 1126 } 1127 1128 /* Ignore blocks with no .debug_line associated block */ 1129 if ( ui.stmt_list == -1LL ) 1130 continue; 1131 1132 if (0) { 1133 HChar* str_name = ML_(cur_read_strdup)(ui.name, "di.rdd3.3"); 1134 VG_(printf)("debug_line_sz %lld, ui.stmt_list %lld %s\n", 1135 escn_debug_line.szB, ui.stmt_list, str_name ); 1136 ML_(dinfo_free)(str_name); 1137 } 1138 1139 /* Read the .debug_line block for this compile unit */ 1140 read_dwarf2_lineblock( 1141 di, &ui, 1142 ML_(cur_plus)(ML_(cur_from_sli)(escn_debug_line), ui.stmt_list), 1143 escn_debug_line.szB - ui.stmt_list 1144 ); 1145 } 1146 } 1147 1148 1149 //////////////////////////////////////////////////////////////////// 1150 //////////////////////////////////////////////////////////////////// 1151 1152 /*------------------------------------------------------------*/ 1153 /*--- Read DWARF1 format line number info. ---*/ 1154 /*------------------------------------------------------------*/ 1155 1156 /* DWARF1 appears to be redundant, but nevertheless the Lahey Fortran 1157 compiler generates it. 1158 */ 1159 1160 /* The following three enums (dwarf_tag, dwarf_form, dwarf_attribute) 1161 are taken from the file include/elf/dwarf.h in the GNU gdb-6.0 1162 sources, which are Copyright 1992, 1993, 1995, 1999 Free Software 1163 Foundation, Inc and naturally licensed under the GNU General Public 1164 License version 2 or later. 1165 */ 1166 1167 /* Tag names and codes. */ 1168 1169 enum dwarf_tag { 1170 TAG_padding = 0x0000, 1171 TAG_array_type = 0x0001, 1172 TAG_class_type = 0x0002, 1173 TAG_entry_point = 0x0003, 1174 TAG_enumeration_type = 0x0004, 1175 TAG_formal_parameter = 0x0005, 1176 TAG_global_subroutine = 0x0006, 1177 TAG_global_variable = 0x0007, 1178 /* 0x0008 -- reserved */ 1179 /* 0x0009 -- reserved */ 1180 TAG_label = 0x000a, 1181 TAG_lexical_block = 0x000b, 1182 TAG_local_variable = 0x000c, 1183 TAG_member = 0x000d, 1184 /* 0x000e -- reserved */ 1185 TAG_pointer_type = 0x000f, 1186 TAG_reference_type = 0x0010, 1187 TAG_compile_unit = 0x0011, 1188 TAG_string_type = 0x0012, 1189 TAG_structure_type = 0x0013, 1190 TAG_subroutine = 0x0014, 1191 TAG_subroutine_type = 0x0015, 1192 TAG_typedef = 0x0016, 1193 TAG_union_type = 0x0017, 1194 TAG_unspecified_parameters = 0x0018, 1195 TAG_variant = 0x0019, 1196 TAG_common_block = 0x001a, 1197 TAG_common_inclusion = 0x001b, 1198 TAG_inheritance = 0x001c, 1199 TAG_inlined_subroutine = 0x001d, 1200 TAG_module = 0x001e, 1201 TAG_ptr_to_member_type = 0x001f, 1202 TAG_set_type = 0x0020, 1203 TAG_subrange_type = 0x0021, 1204 TAG_with_stmt = 0x0022, 1205 1206 /* GNU extensions */ 1207 1208 TAG_format_label = 0x8000, /* for FORTRAN 77 and Fortran 90 */ 1209 TAG_namelist = 0x8001, /* For Fortran 90 */ 1210 TAG_function_template = 0x8002, /* for C++ */ 1211 TAG_class_template = 0x8003 /* for C++ */ 1212 }; 1213 1214 /* Form names and codes. */ 1215 1216 enum dwarf_form { 1217 FORM_ADDR = 0x1, 1218 FORM_REF = 0x2, 1219 FORM_BLOCK2 = 0x3, 1220 FORM_BLOCK4 = 0x4, 1221 FORM_DATA2 = 0x5, 1222 FORM_DATA4 = 0x6, 1223 FORM_DATA8 = 0x7, 1224 FORM_STRING = 0x8 1225 }; 1226 1227 /* Attribute names and codes. */ 1228 1229 enum dwarf_attribute { 1230 AT_sibling = (0x0010|FORM_REF), 1231 AT_location = (0x0020|FORM_BLOCK2), 1232 AT_name = (0x0030|FORM_STRING), 1233 AT_fund_type = (0x0050|FORM_DATA2), 1234 AT_mod_fund_type = (0x0060|FORM_BLOCK2), 1235 AT_user_def_type = (0x0070|FORM_REF), 1236 AT_mod_u_d_type = (0x0080|FORM_BLOCK2), 1237 AT_ordering = (0x0090|FORM_DATA2), 1238 AT_subscr_data = (0x00a0|FORM_BLOCK2), 1239 AT_byte_size = (0x00b0|FORM_DATA4), 1240 AT_bit_offset = (0x00c0|FORM_DATA2), 1241 AT_bit_size = (0x00d0|FORM_DATA4), 1242 /* (0x00e0|FORM_xxxx) -- reserved */ 1243 AT_element_list = (0x00f0|FORM_BLOCK4), 1244 AT_stmt_list = (0x0100|FORM_DATA4), 1245 AT_low_pc = (0x0110|FORM_ADDR), 1246 AT_high_pc = (0x0120|FORM_ADDR), 1247 AT_language = (0x0130|FORM_DATA4), 1248 AT_member = (0x0140|FORM_REF), 1249 AT_discr = (0x0150|FORM_REF), 1250 AT_discr_value = (0x0160|FORM_BLOCK2), 1251 /* (0x0170|FORM_xxxx) -- reserved */ 1252 /* (0x0180|FORM_xxxx) -- reserved */ 1253 AT_string_length = (0x0190|FORM_BLOCK2), 1254 AT_common_reference = (0x01a0|FORM_REF), 1255 AT_comp_dir = (0x01b0|FORM_STRING), 1256 AT_const_value_string = (0x01c0|FORM_STRING), 1257 AT_const_value_data2 = (0x01c0|FORM_DATA2), 1258 AT_const_value_data4 = (0x01c0|FORM_DATA4), 1259 AT_const_value_data8 = (0x01c0|FORM_DATA8), 1260 AT_const_value_block2 = (0x01c0|FORM_BLOCK2), 1261 AT_const_value_block4 = (0x01c0|FORM_BLOCK4), 1262 AT_containing_type = (0x01d0|FORM_REF), 1263 AT_default_value_addr = (0x01e0|FORM_ADDR), 1264 AT_default_value_data2 = (0x01e0|FORM_DATA2), 1265 AT_default_value_data4 = (0x01e0|FORM_DATA4), 1266 AT_default_value_data8 = (0x01e0|FORM_DATA8), 1267 AT_default_value_string = (0x01e0|FORM_STRING), 1268 AT_friends = (0x01f0|FORM_BLOCK2), 1269 AT_inline = (0x0200|FORM_STRING), 1270 AT_is_optional = (0x0210|FORM_STRING), 1271 AT_lower_bound_ref = (0x0220|FORM_REF), 1272 AT_lower_bound_data2 = (0x0220|FORM_DATA2), 1273 AT_lower_bound_data4 = (0x0220|FORM_DATA4), 1274 AT_lower_bound_data8 = (0x0220|FORM_DATA8), 1275 AT_private = (0x0240|FORM_STRING), 1276 AT_producer = (0x0250|FORM_STRING), 1277 AT_program = (0x0230|FORM_STRING), 1278 AT_protected = (0x0260|FORM_STRING), 1279 AT_prototyped = (0x0270|FORM_STRING), 1280 AT_public = (0x0280|FORM_STRING), 1281 AT_pure_virtual = (0x0290|FORM_STRING), 1282 AT_return_addr = (0x02a0|FORM_BLOCK2), 1283 AT_abstract_origin = (0x02b0|FORM_REF), 1284 AT_start_scope = (0x02c0|FORM_DATA4), 1285 AT_stride_size = (0x02e0|FORM_DATA4), 1286 AT_upper_bound_ref = (0x02f0|FORM_REF), 1287 AT_upper_bound_data2 = (0x02f0|FORM_DATA2), 1288 AT_upper_bound_data4 = (0x02f0|FORM_DATA4), 1289 AT_upper_bound_data8 = (0x02f0|FORM_DATA8), 1290 AT_virtual = (0x0300|FORM_STRING), 1291 1292 /* GNU extensions. */ 1293 1294 AT_sf_names = (0x8000|FORM_DATA4), 1295 AT_src_info = (0x8010|FORM_DATA4), 1296 AT_mac_info = (0x8020|FORM_DATA4), 1297 AT_src_coords = (0x8030|FORM_DATA4), 1298 AT_body_begin = (0x8040|FORM_ADDR), 1299 AT_body_end = (0x8050|FORM_ADDR) 1300 }; 1301 1302 /* end of enums taken from gdb-6.0 sources */ 1303 #if 0 1304 void ML_(read_debuginfo_dwarf1) ( 1305 struct _DebugInfo* di, 1306 UChar* dwarf1d, Int dwarf1d_sz, 1307 UChar* dwarf1l, Int dwarf1l_sz ) 1308 { 1309 UInt stmt_list; 1310 Bool stmt_list_found; 1311 Int die_offset, die_szb, at_offset; 1312 UShort die_kind, at_kind; 1313 UChar* at_base; 1314 HChar* src_filename; 1315 1316 if (0) 1317 VG_(printf)("read_debuginfo_dwarf1 ( %p, %d, %p, %d )\n", 1318 dwarf1d, dwarf1d_sz, dwarf1l, dwarf1l_sz ); 1319 1320 /* This loop scans the DIEs. */ 1321 die_offset = 0; 1322 while (True) { 1323 if (die_offset >= dwarf1d_sz) break; 1324 1325 die_szb = ML_(read_Int)(dwarf1d + die_offset); 1326 die_kind = ML_(read_UShort)(dwarf1d + die_offset + 4); 1327 1328 /* We're only interested in compile_unit DIEs; ignore others. */ 1329 if (die_kind != TAG_compile_unit) { 1330 die_offset += die_szb; 1331 continue; 1332 } 1333 1334 if (0) 1335 VG_(printf)("compile-unit DIE: offset %d, tag 0x%x, size %d\n", 1336 die_offset, (Int)die_kind, die_szb ); 1337 1338 /* We've got a compile_unit DIE starting at (dwarf1d + 1339 die_offset+6). Try and find the AT_name and AT_stmt_list 1340 attributes. Then, finally, we can read the line number info 1341 for this source file. */ 1342 1343 /* The next 3 are set as we find the relevant attrs. */ 1344 src_filename = NULL; 1345 stmt_list_found = False; 1346 stmt_list = 0; 1347 1348 /* This loop scans the Attrs inside compile_unit DIEs. */ 1349 at_base = dwarf1d + die_offset + 6; 1350 at_offset = 0; 1351 while (True) { 1352 if (at_offset >= die_szb-6) break; 1353 1354 at_kind = ML_(read_UShort)(at_base + at_offset); 1355 if (0) VG_(printf)("atoffset %d, attag 0x%x\n", 1356 at_offset, (Int)at_kind ); 1357 at_offset += 2; /* step over the attribute itself */ 1358 /* We have to examine the attribute to figure out its 1359 length. */ 1360 switch (at_kind) { 1361 case AT_stmt_list: 1362 case AT_language: 1363 case AT_sibling: 1364 if (at_kind == AT_stmt_list) { 1365 stmt_list_found = True; 1366 stmt_list = ML_(read_Int)(at_base+at_offset); 1367 } 1368 at_offset += 4; break; 1369 case AT_high_pc: 1370 case AT_low_pc: 1371 at_offset += sizeof(void*); break; 1372 case AT_name: 1373 case AT_producer: 1374 case AT_comp_dir: 1375 /* Zero terminated string, step over it. */ 1376 if (at_kind == AT_name) 1377 src_filename = (HChar *)(at_base + at_offset); 1378 while (at_offset < die_szb-6 && at_base[at_offset] != 0) 1379 at_offset++; 1380 at_offset++; 1381 break; 1382 default: 1383 VG_(printf)("Unhandled DWARF-1 attribute 0x%x\n", 1384 (Int)at_kind ); 1385 VG_(core_panic)("Unhandled DWARF-1 attribute"); 1386 } /* switch (at_kind) */ 1387 } /* looping over attributes */ 1388 1389 /* So, did we find the required stuff for a line number table in 1390 this DIE? If yes, read it. */ 1391 if (stmt_list_found /* there is a line number table */ 1392 && src_filename != NULL /* we know the source filename */ 1393 ) { 1394 /* Table starts: 1395 Length: 1396 4 bytes, includes the entire table 1397 Base address: 1398 unclear (4? 8?), assuming native pointer size here. 1399 Then a sequence of triples 1400 (source line number -- 32 bits 1401 source line column -- 16 bits 1402 address delta -- 32 bits) 1403 */ 1404 Addr base; 1405 Int len; 1406 HChar* curr_filenm; 1407 UChar* ptr; 1408 UInt prev_line, prev_delta; 1409 1410 curr_filenm = ML_(addStr) ( di, src_filename, -1 ); 1411 prev_line = prev_delta = 0; 1412 1413 ptr = dwarf1l + stmt_list; 1414 len = ML_(read_Int)(ptr); ptr += sizeof(Int); 1415 base = ML_(read_Addr)(ptr); ptr += sizeof(void*); 1416 len -= (sizeof(Int) + sizeof(void*)); 1417 while (len > 0) { 1418 UInt line; 1419 UShort col; 1420 UInt delta; 1421 line = ML_(read_UInt)(ptr); ptr += sizeof(UInt); 1422 col = ML_(read_UShort)(ptr); ptr += sizeof(UShort); 1423 delta = ML_(read_UInt)(ptr); ptr += sizeof(UInt); 1424 if (0) VG_(printf)("line %d, col %d, delta %d\n", 1425 line, (Int)col, delta ); 1426 len -= (sizeof(UInt) + sizeof(UShort) + sizeof(UInt)); 1427 1428 if (delta > 0 && prev_line > 0) { 1429 if (0) VG_(printf) (" %d %d-%d\n", 1430 prev_line, prev_delta, delta-1); 1431 ML_(addLineInfo) ( di, curr_filenm, NULL, 1432 base + prev_delta, base + delta, 1433 prev_line, 0 ); 1434 } 1435 prev_line = line; 1436 prev_delta = delta; 1437 } 1438 } 1439 1440 /* Move on the the next DIE. */ 1441 die_offset += die_szb; 1442 1443 } /* Looping over DIEs */ 1444 1445 } 1446 #endif 1447 1448 /*------------------------------------------------------------*/ 1449 /*--- Read call-frame info from an .eh_frame section ---*/ 1450 /*------------------------------------------------------------*/ 1451 1452 /* Sources of info: 1453 1454 The DWARF3 spec, available from http://www.dwarfstd.org/Download.php 1455 1456 This describes how to read CFA data from .debug_frame sections. 1457 So as to maximise everybody's annoyance and confusion, .eh_frame 1458 sections are almost the same as .debug_frame sections, but differ 1459 in a few subtle and ill documented but important aspects. 1460 1461 Generic ELF Specification, sections 7.5 (DWARF Extensions) and 7.6 1462 (Exception Frames), available from 1463 1464 http://www.linux-foundation.org/spec/book/ELF-generic/ELF-generic.html 1465 1466 This really does describe .eh_frame, at least the aspects that 1467 differ from standard DWARF3. It's better than guessing, and 1468 (marginally) more fun than reading the gdb source code. 1469 */ 1470 1471 /* Useful info .. 1472 1473 In general: 1474 gdb-6.3/gdb/dwarf2-frame.c 1475 1476 gdb-6.3/gdb/i386-tdep.c: 1477 1478 DWARF2/GCC uses the stack address *before* the function call as a 1479 frame's CFA. [jrs: I presume this means %esp before the call as 1480 the CFA]. 1481 1482 JRS: on amd64, the dwarf register numbering is, as per 1483 gdb-6.3/gdb/amd64-tdep.c and also amd64-abi-0.98.pdf: 1484 1485 0 1 2 3 4 5 6 7 1486 RAX RDX RCX RBX RSI RDI RBP RSP 1487 1488 8 ... 15 1489 R8 ... R15 1490 1491 16 is the return address (RIP) 1492 "The table defines Return Address to have a register number, 1493 even though the address is stored in 0(%rsp) and not in a 1494 physical register." 1495 1496 17 ... 24 1497 XMM0 ... XMM7 1498 1499 25 ... 32 1500 XMM8 ... XMM15 1501 1502 33 ... 40 1503 ST0 ... ST7 1504 1505 41 ... 48 1506 MM0 ... MM7 1507 1508 49 RFLAGS 1509 50,51,52,53,54,55 ES,CS,SS,DS,FS,GS 1510 58 FS.BASE (what's that?) 1511 59 GS.BASE (what's that?) 1512 62 TR (task register) 1513 63 LDTR (LDT register) 1514 64 MXCSR 1515 65 FCW (x87 control word) 1516 66 FSW (x86 status word) 1517 1518 On x86 I cannot find any documentation. It _appears_ to be the 1519 actual instruction encoding, viz: 1520 1521 0 1 2 3 4 5 6 7 1522 EAX ECX EDX EBX ESP EBP ESI EDI 1523 1524 8 is the return address (EIP) */ 1525 1526 1527 /* Comments re DW_CFA_set_loc, 16 Nov 06. 1528 1529 JRS: 1530 Someone recently sent me a libcrypto.so.0.9.8 as distributed with 1531 Ubuntu of some flavour, compiled with gcc 4.1.2 on amd64. It 1532 causes V's CF reader to complain a lot: 1533 1534 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24 1535 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24 1536 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24 1537 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24 1538 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:48 1539 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24 1540 1541 After chasing this around a bit it seems that the CF bytecode 1542 parser lost sync at a DW_CFA_set_loc, which has a single argument 1543 denoting an address. 1544 1545 As it stands that address is extracted by read_Addr(). On amd64 1546 that just fetches 8 bytes regardless of anything else. 1547 1548 read_encoded_Addr() is more sophisticated. This appears to take 1549 into account some kind of encoding flag. When I replace the uses 1550 of read_Addr by read_encoded_Addr for DW_CFA_set_loc, the 1551 complaints go away, there is no loss of sync, and the parsed CF 1552 instructions are the same as shown by readelf --debug-dump=frames. 1553 1554 So it seems a plausible fix. The problem is I looked in the DWARF3 1555 spec and completely failed to figure out whether or not the arg to 1556 DW_CFA_set_loc is supposed to be encoded in a way suitable for 1557 read_encoded_Addr, nor for that matter any description of what it 1558 is that read_encoded_Addr is really decoding. 1559 1560 TomH: 1561 The problem is that the encoding is not standard - the eh_frame 1562 section uses the same encoding as the dwarf_frame section except 1563 for a few small changes, and this is one of them. So this is not 1564 something the DWARF standard covers. 1565 1566 There is an augmentation string to indicate what is going on though 1567 so that programs can recognise it. 1568 1569 What we are doing seems to match what gdb 6.5 and libdwarf 20060614 1570 do though. I'm not sure about readelf though. 1571 1572 (later): Well dwarfdump barfs on it: 1573 1574 dwarfdump ERROR: dwarf_get_fde_info_for_reg: 1575 DW_DLE_DF_FRAME_DECODING_ERROR(193) (193) 1576 1577 I've looked at binutils as well now, and the code in readelf agrees 1578 with your patch - ie it treats set_loc as having an encoded address 1579 if there is a zR augmentation indicating an encoding. 1580 1581 Quite why gdb and libdwarf don't understand this is an interesting 1582 question... 1583 1584 Final outcome: all uses of read_Addr were replaced by 1585 read_encoded_Addr. A new type AddressDecodingInfo was added to 1586 make it relatively clean to plumb through the extra info needed by 1587 read_encoded_Addr. 1588 */ 1589 1590 /* More badness re address encoding, 12 Jan 07. 1591 1592 Most gcc provided CIEs have a "zR" augmentation, which means they 1593 supply their own address encoding, and that works fine. However, 1594 some icc9 supplied CIEs have no augmentation, which means they use 1595 the default_Addr_encoding(). That says to use a machine-word sized 1596 value, literally unmodified. 1597 1598 Since .so's are, in general, relocated when loaded, having absolute 1599 addresses in the CFI data makes no sense when read_encoded_Addr is 1600 used to find the initial location for a FDE. The resulting saga: 1601 1602 TomH: 1603 > I'm chasing a stack backtrace failure for an amd64 .so which was 1604 > created I believe by icc 9.1. After a while I wound up looking at 1605 > this: (readdwarf.c) 1606 > 1607 > 5083 tom static UChar default_Addr_encoding ( void ) 1608 > 3584 tom { 1609 > 3584 tom switch (sizeof(Addr)) { 1610 > 3584 tom case 4: return DW_EH_PE_udata4; 1611 > 3584 tom case 8: return DW_EH_PE_udata8; 1612 > 3584 tom default: vg_assert(0); 1613 > 3584 tom } 1614 > 3584 tom } 1615 > 1616 > If a CIE does not have an "augmentation string" (typically "zR") then 1617 > addresses are decoded as described by default_Addr_encoding. If there 1618 > is an 'R' in the augmentation string then the encoding to use 1619 > is specified by the CIE itself, which works fine with GCC compiled code 1620 > since that always appears to specify zR. 1621 1622 Correct. 1623 1624 > Problem is this .so has no augmentation string and so uses the 1625 > default encoding, viz DW_EH_PE_udata8. That appears to mean 1626 > "read a 64 bit number" and use that as-is (for the starting value 1627 > of the program counter when running the CFA program). 1628 1629 Strictly speaking the default is DW_EH_PE_absptr, but that amounts 1630 to either udata4 or udata8 depending on the platform's pointer size 1631 which is a shortcut I used. 1632 1633 > For this .so that gives nonsense (very small) PCs which are later 1634 > rejected by the sanity check which ensures PC ranges fall inside 1635 > the mapped text segment. It seems like the .so expects to have the 1636 > start VMA of the text segment added on. This would correspond to 1637 > 1638 > static UChar default_Addr_encoding ( void ) 1639 > { 1640 > switch (sizeof(Addr)) { 1641 > case 4: return DW_EH_PE_textrel + DW_EH_PE_udata4; 1642 > case 8: return DW_EH_PE_textrel + DW_EH_PE_udata8; 1643 > default: vg_assert(0); 1644 > } 1645 > } 1646 1647 The problem you're seeing is that you have absolute pointers inside 1648 a shared library, which obviously makes little sense on the face of 1649 things as how would the linker know where the library will be 1650 loaded? 1651 1652 The answer of course is that it doesn't, so if it points absolute 1653 pointers in the frame unwind data is has to include relocations for 1654 them, and I'm betting that if you look at the relocations in the 1655 library you will there are some for that data. 1656 1657 That is fine of course when ld.so maps the library - it will 1658 relocate the eh_frame data as it maps it (or prelinking will 1659 already have done so) and when the g++ exception code kicks in and 1660 unwinds the stack it will see relocated data. 1661 1662 We of course are mapping the section from the ELF file ourselves 1663 and are not applying the relocations, hence the problem you are 1664 seeing. 1665 1666 Strictly speaking we should apply the relocations but the cheap 1667 solution is essentially to do what you've done - strictly speaking 1668 you should adjust by the difference between the address the library 1669 was linked for and the address it has been loaded at, but a shared 1670 library will normally be linked for address zero I believe. It's 1671 possible that prelinking might change that though? 1672 1673 JRS: 1674 That all syncs with what I am seeing. 1675 1676 So what I am inclined to do is: 1677 1678 - Leave default_Addr_encoding as it is 1679 1680 - Change read_encoded_Addr's handling of "case DW_EH_PE_absptr" so 1681 it sets base to, as you say, the difference between the address 1682 the library was linked for and the address it has been loaded at 1683 (== the SegInfo's text_bias) 1684 1685 Does that sound sane? I think it should even handle the prelinked 1686 case. 1687 1688 (JRS, later) 1689 1690 Hmm. Plausible as it sounds, it doesn't work. It now produces 1691 bogus backtraces for locations inside the (statically linked) 1692 memcheck executable. 1693 1694 Besides, there are a couple of other places where read_encoded_Addr 1695 is used -- one of which is used to establish the length of the 1696 address range covered by the current FDE: 1697 1698 fde_arange = read_encoded_Addr(&nbytes, &adi, data); 1699 1700 and it doesn't seem to make any sense for read_encoded_Addr to add 1701 on the text segment bias in that context. The DWARF3 spec says 1702 that both the initial_location and address_range (length) fields 1703 are encoded the same way ("target address"), so it is unclear at 1704 what stage in the process it would be appropriate to relocate the 1705 former but not the latter. 1706 1707 One unprincipled kludge that does work is the following: just 1708 before handing one of the address range fragments off to 1709 ML_(addDiCfSI) for permanent storage, check its start address. If 1710 that is very low (less than 2 M), and is far below the mapped text 1711 segment, and adding the text bias would move the fragment entirely 1712 inside the mapped text segment, then do so. A kind of kludged 1713 last-minute relocation, if you like. 1714 1715 12 Jan 07: committing said kludge (see kludge_then_addDiCfSI). If 1716 the situation clarifies, it can easily enough be backed out and 1717 replaced by a better fix. 1718 */ 1719 1720 /* --------------- Decls --------------- */ 1721 1722 #if defined(VGP_x86_linux) 1723 # define FP_REG 5 1724 # define SP_REG 4 1725 # define RA_REG_DEFAULT 8 1726 #elif defined(VGP_amd64_linux) 1727 # define FP_REG 6 1728 # define SP_REG 7 1729 # define RA_REG_DEFAULT 16 1730 #elif defined(VGP_ppc32_linux) 1731 # define FP_REG 1 1732 # define SP_REG 1 1733 # define RA_REG_DEFAULT 65 1734 #elif defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) 1735 # define FP_REG 1 1736 # define SP_REG 1 1737 # define RA_REG_DEFAULT 65 1738 #elif defined(VGP_arm_linux) 1739 # define FP_REG 12 1740 # define SP_REG 13 1741 # define RA_REG_DEFAULT 14 1742 #elif defined(VGP_arm64_linux) 1743 # define FP_REG 29 1744 # define SP_REG 31 1745 # define RA_REG_DEFAULT 30 1746 #elif defined(VGP_x86_darwin) 1747 # define FP_REG 5 1748 # define SP_REG 4 1749 # define RA_REG_DEFAULT 8 1750 #elif defined(VGP_amd64_darwin) 1751 # define FP_REG 6 1752 # define SP_REG 7 1753 # define RA_REG_DEFAULT 16 1754 #elif defined(VGP_s390x_linux) 1755 # define FP_REG 11 // sometimes s390 has a frame pointer in r11 1756 # define SP_REG 15 // stack is always r15 1757 # define RA_REG_DEFAULT 14 // the return address is in r14 1758 #elif defined(VGP_mips32_linux) 1759 # define FP_REG 30 1760 # define SP_REG 29 1761 # define RA_REG_DEFAULT 31 1762 #elif defined(VGP_mips64_linux) 1763 # define FP_REG 30 1764 # define SP_REG 29 1765 # define RA_REG_DEFAULT 31 1766 #elif defined(VGP_tilegx_linux) 1767 # define FP_REG 52 1768 # define SP_REG 54 1769 # define RA_REG_DEFAULT 55 1770 #else 1771 # error "Unknown platform" 1772 #endif 1773 1774 /* The number of regs we are prepared to unwind. The number for 1775 arm-linux (320) seems ludicrously high, but the ARM IHI 0040A page 1776 7 (DWARF for the ARM Architecture) specifies that values up to 320 1777 might exist, for Neon/VFP-v3. */ 1778 #if defined(VGP_ppc32_linux) || defined(VGP_ppc64be_linux) \ 1779 || defined(VGP_ppc64le_linux) || defined(VGP_mips32_linux) \ 1780 || defined(VGP_mips64_linux) 1781 # define N_CFI_REGS 72 1782 #elif defined(VGP_arm_linux) || defined(VGP_tilegx_linux) 1783 # define N_CFI_REGS 320 1784 #elif defined(VGP_arm64_linux) 1785 # define N_CFI_REGS 128 1786 #else 1787 # define N_CFI_REGS 20 1788 #endif 1789 1790 /* Instructions for the automaton */ 1791 enum dwarf_cfa_primary_ops 1792 { 1793 DW_CFA_use_secondary = 0, 1794 DW_CFA_advance_loc = 1, 1795 DW_CFA_offset = 2, 1796 DW_CFA_restore = 3 1797 }; 1798 1799 enum dwarf_cfa_secondary_ops 1800 { 1801 DW_CFA_nop = 0x00, 1802 DW_CFA_set_loc = 0x01, 1803 DW_CFA_advance_loc1 = 0x02, 1804 DW_CFA_advance_loc2 = 0x03, 1805 DW_CFA_advance_loc4 = 0x04, 1806 DW_CFA_offset_extended = 0x05, 1807 DW_CFA_restore_extended = 0x06, 1808 DW_CFA_undefined = 0x07, 1809 DW_CFA_same_value = 0x08, 1810 DW_CFA_register = 0x09, 1811 DW_CFA_remember_state = 0x0a, 1812 DW_CFA_restore_state = 0x0b, 1813 DW_CFA_def_cfa = 0x0c, 1814 DW_CFA_def_cfa_register = 0x0d, 1815 DW_CFA_def_cfa_offset = 0x0e, 1816 DW_CFA_def_cfa_expression = 0x0f, /* DWARF3 only */ 1817 DW_CFA_expression = 0x10, /* DWARF3 only */ 1818 DW_CFA_offset_extended_sf = 0x11, /* DWARF3 only */ 1819 DW_CFA_def_cfa_sf = 0x12, /* DWARF3 only */ 1820 DW_CFA_def_cfa_offset_sf = 0x13, /* DWARF3 only */ 1821 DW_CFA_val_offset = 0x14, /* DWARF3 only */ 1822 DW_CFA_val_offset_sf = 0x15, /* DWARF3 only */ 1823 DW_CFA_val_expression = 0x16, /* DWARF3 only */ 1824 DW_CFA_lo_user = 0x1c, 1825 DW_CFA_GNU_window_save = 0x2d, /* GNU extension */ 1826 DW_CFA_GNU_args_size = 0x2e, /* GNU extension */ 1827 DW_CFA_GNU_negative_offset_extended = 0x2f, /* GNU extension */ 1828 DW_CFA_hi_user = 0x3f 1829 }; 1830 1831 #define DW_EH_PE_absptr 0x00 1832 #define DW_EH_PE_omit 0xff 1833 1834 #define DW_EH_PE_uleb128 0x01 1835 #define DW_EH_PE_udata2 0x02 1836 #define DW_EH_PE_udata4 0x03 1837 #define DW_EH_PE_udata8 0x04 1838 #define DW_EH_PE_sleb128 0x09 1839 #define DW_EH_PE_sdata2 0x0A 1840 #define DW_EH_PE_sdata4 0x0B 1841 #define DW_EH_PE_sdata8 0x0C 1842 #define DW_EH_PE_signed 0x08 1843 1844 #define DW_EH_PE_pcrel 0x10 1845 #define DW_EH_PE_textrel 0x20 1846 #define DW_EH_PE_datarel 0x30 1847 #define DW_EH_PE_funcrel 0x40 1848 #define DW_EH_PE_aligned 0x50 1849 1850 #define DW_EH_PE_indirect 0x80 1851 1852 1853 /* RegRule and UnwindContext are used temporarily to do the unwinding. 1854 The result is then summarised into a sequence of CfiSIs, if 1855 possible. UnwindContext effectively holds the state of the 1856 abstract machine whilst it is running. 1857 1858 The CFA can either be a signed offset from a register, 1859 or an expression: 1860 1861 CFA = cfa_reg + cfa_off when UnwindContext.cfa_is_regoff==True 1862 | [[ cfa_expr_id ]] 1863 1864 When .cfa_is_regoff == True, cfa_expr_id must be zero 1865 When .cfa_is_regoff == False, cfa_reg must be zero 1866 and cfa_off must be zero 1867 1868 RegRule describes, for each register, how to get its 1869 value in the previous frame, where 'cfa' denotes the cfa 1870 for the frame as a whole: 1871 1872 RegRule = RR_Undef -- undefined 1873 | RR_Same -- same as in previous frame 1874 | RR_CFAOff arg -- is at * ( cfa + arg ) 1875 | RR_CFAValOff arg -- is ( cfa + arg ) 1876 | RR_Reg arg -- is in register 'arg' 1877 | RR_Expr arg -- is at * [[ arg ]] 1878 | RR_ValExpr arg -- is [[ arg ]] 1879 | RR_Arch -- dunno 1880 1881 Note that RR_Expr is redundant since the same can be represented 1882 using RR_ValExpr with an explicit dereference (CfiExpr_Deref) at 1883 the outermost level. 1884 1885 All expressions are stored in exprs in the containing 1886 UnwindContext. Since the UnwindContext gets reinitialised for each 1887 new FDE, summarise_context needs to copy out any expressions it 1888 wants to keep into the cfsi_exprs field of the containing SegInfo. 1889 */ 1890 typedef 1891 struct { 1892 enum { RR_Undef, RR_Same, RR_CFAOff, RR_CFAValOff, 1893 RR_Reg, /*RR_Expr,*/ RR_ValExpr, RR_Arch } tag; 1894 /* meaning: int offset for CFAoff/CFAValOff 1895 reg # for Reg 1896 expr index for Expr/ValExpr */ 1897 Int arg; 1898 } 1899 RegRule; 1900 1901 static void ppRegRule ( const XArray* exprs, const RegRule* rrule ) 1902 { 1903 vg_assert(exprs); 1904 switch (rrule->tag) { 1905 case RR_Undef: VG_(printf)("u "); break; 1906 case RR_Same: VG_(printf)("s "); break; 1907 case RR_CFAOff: VG_(printf)("c%d ", rrule->arg); break; 1908 case RR_CFAValOff: VG_(printf)("v%d ", rrule->arg); break; 1909 case RR_Reg: VG_(printf)("r%d ", rrule->arg); break; 1910 case RR_ValExpr: VG_(printf)("ve{"); 1911 ML_(ppCfiExpr)( exprs, rrule->arg ); 1912 VG_(printf)("} "); 1913 break; 1914 case RR_Arch: VG_(printf)("a "); break; 1915 default: VG_(core_panic)("ppRegRule"); 1916 } 1917 } 1918 1919 1920 /* Size of the stack of register unwind rules. This is only 1921 exceedingly rarely used, so a stack of size 1 should actually work 1922 with almost all compiler-generated CFA. */ 1923 #define N_RR_STACK 4 1924 1925 typedef 1926 struct { 1927 /* Read-only fields (set by the CIE) */ 1928 Int code_a_f; 1929 Int data_a_f; 1930 Addr initloc; 1931 Int ra_reg; 1932 /* The rest of these fields can be modifed by 1933 run_CF_instruction. */ 1934 /* The LOC entry */ 1935 Addr loc; 1936 /* We need a stack of these in order to handle 1937 DW_CFA_{remember,restore}_state. */ 1938 struct UnwindContextState { 1939 /* The CFA entry. This can be either reg+/-offset or an expr. */ 1940 Bool cfa_is_regoff; /* True=>is reg+offset; False=>is expr */ 1941 Int cfa_reg; 1942 Int cfa_off; /* in bytes */ 1943 Int cfa_expr_ix; /* index into cfa_exprs */ 1944 /* Register unwind rules. */ 1945 RegRule reg[N_CFI_REGS]; 1946 } 1947 state[N_RR_STACK]; 1948 Int state_sp; /* 0 <= state_sp < N_RR_STACK; points at the 1949 currently-in-use rule set. */ 1950 /* array of CfiExpr, shared by reg[] and cfa_expr_ix */ 1951 XArray* exprs; 1952 } 1953 UnwindContext; 1954 1955 static void ppUnwindContext ( const UnwindContext* ctx ) 1956 { 1957 Int j, i; 1958 VG_(printf)("0x%llx: ", (ULong)ctx->loc); 1959 for (j = 0; j <= ctx->state_sp; j++) { 1960 const struct UnwindContextState* ctxs = &ctx->state[j]; 1961 VG_(printf)("%s[%d]={ ", j > 0 ? " " : "", j); 1962 if (ctxs->cfa_is_regoff) { 1963 VG_(printf)("%d(r%d) ", ctxs->cfa_off, ctxs->cfa_reg); 1964 } else { 1965 vg_assert(ctx->exprs); 1966 VG_(printf)("{"); 1967 ML_(ppCfiExpr)( ctx->exprs, ctxs->cfa_expr_ix ); 1968 VG_(printf)("} "); 1969 } 1970 VG_(printf)("{ "); 1971 for (i = 0; i < N_CFI_REGS; i++) 1972 ppRegRule(ctx->exprs, &ctxs->reg[i]); 1973 VG_(printf)("}"); 1974 } 1975 VG_(printf)("\n"); 1976 } 1977 1978 static void initUnwindContext ( /*OUT*/UnwindContext* ctx ) 1979 { 1980 Int j, i; 1981 VG_(memset)(ctx, 0, sizeof(*ctx)); 1982 /* ctx->code_a_f = 0; 1983 ctx->data_a_f = 0; 1984 ctx->initloc = 0; */ 1985 ctx->ra_reg = RA_REG_DEFAULT; 1986 /* ctx->loc = 0; 1987 ctx->exprs = NULL; 1988 ctx->state_sp = 0; */ 1989 for (j = 0; j < N_RR_STACK; j++) { 1990 ctx->state[j].cfa_is_regoff = True; 1991 /* ctx->state[j].cfa_reg = 0; 1992 ctx->state[j].cfa_off = 0; 1993 ctx->state[j].cfa_expr_ix = 0; */ 1994 for (i = 0; i < N_CFI_REGS; i++) { 1995 if (RR_Undef != 0) 1996 ctx->state[j].reg[i].tag = RR_Undef; 1997 /* ctx->state[j].reg[i].arg = 0; */ 1998 } 1999 # if defined(VGA_arm) 2000 /* All callee-saved registers (or at least the ones we are 2001 summarising for) should start out as RR_Same, on ARM. */ 2002 ctx->state[j].reg[11].tag = RR_Same; 2003 /* ctx->state[j].reg[13].tag = RR_Same; */ 2004 ctx->state[j].reg[14].tag = RR_Same; 2005 ctx->state[j].reg[12].tag = RR_Same; 2006 ctx->state[j].reg[7].tag = RR_Same; 2007 /* this can't be right though: R12 (IP) isn't callee saved. */ 2008 # elif defined(VGA_arm64) 2009 /* Callee-saved registers (that we are interested in) should 2010 start out as RR_Same. */ 2011 ctx->state[j].reg[29/*FP*/].tag = RR_Same; 2012 ctx->state[j].reg[30/*LR*/].tag = RR_Same; 2013 # endif 2014 } 2015 } 2016 2017 2018 /* A structure which holds information needed by read_encoded_Addr(). 2019 */ 2020 typedef 2021 struct { 2022 UChar encoding; 2023 DiCursor ehframe_image; 2024 Addr ehframe_avma; 2025 Addr text_bias; 2026 } 2027 AddressDecodingInfo; 2028 2029 2030 /* ------------ Deal with summary-info records ------------ */ 2031 2032 /* --------------- Summarisation --------------- */ 2033 2034 /* Forward */ 2035 static 2036 Int copy_convert_CfiExpr_tree ( XArray* dst, const UnwindContext* srcuc, 2037 Int nd ); 2038 2039 /* Summarise ctx into si, if possible. Returns True if successful. 2040 This is taken to be just after ctx's loc advances; hence the 2041 summary is up to but not including the current loc. This works 2042 on both x86 and amd64. 2043 */ 2044 static Bool summarise_context(/*OUT*/Addr* base, 2045 /*OUT*/UInt* len, 2046 /*OUT*/DiCfSI_m* si_m, 2047 Addr loc_start, 2048 const UnwindContext* ctx, 2049 DebugInfo* debuginfo ) 2050 { 2051 Int why = 0; 2052 const struct UnwindContextState* ctxs; 2053 2054 *base = 0; 2055 *len = 0; 2056 VG_(bzero_inline)(si_m, sizeof(*si_m)); 2057 2058 2059 /* Guard against obviously stupid settings of the reg-rule stack 2060 pointer. */ 2061 if (ctx->state_sp < 0) { why = 8; goto failed; } 2062 if (ctx->state_sp >= N_RR_STACK) { why = 9; goto failed; } 2063 ctxs = &ctx->state[ctx->state_sp]; 2064 2065 /* First, summarise the method for generating the CFA */ 2066 if (!ctxs->cfa_is_regoff) { 2067 /* it was set by DW_CFA_def_cfa_expression; try to convert */ 2068 XArray *src, *dst; 2069 Int conv; 2070 src = ctx->exprs; 2071 dst = debuginfo->cfsi_exprs; 2072 if (src && (VG_(sizeXA)(src) > 0) && (!dst)) { 2073 dst = VG_(newXA)( ML_(dinfo_zalloc), "di.ccCt.1", ML_(dinfo_free), 2074 sizeof(CfiExpr) ); 2075 debuginfo->cfsi_exprs = dst; 2076 } 2077 conv = copy_convert_CfiExpr_tree 2078 ( dst, ctx, ctxs->cfa_expr_ix ); 2079 vg_assert(conv >= -1); 2080 if (conv == -1) { why = 6; goto failed; } 2081 si_m->cfa_how = CFIC_EXPR; 2082 si_m->cfa_off = conv; 2083 if (0 && debuginfo->ddump_frames) 2084 ML_(ppCfiExpr)(dst, conv); 2085 } 2086 else 2087 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) { 2088 si_m->cfa_off = ctxs->cfa_off; 2089 # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \ 2090 || defined(VGA_mips32) || defined(VGA_mips64) \ 2091 || defined(VGA_tilegx) 2092 si_m->cfa_how = CFIC_IA_SPREL; 2093 # elif defined(VGA_arm) 2094 si_m->cfa_how = CFIC_ARM_R13REL; 2095 # elif defined(VGA_arm64) 2096 si_m->cfa_how = CFIC_ARM64_SPREL; 2097 # else 2098 si_m->cfa_how = 0; /* invalid */ 2099 # endif 2100 } 2101 else 2102 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) { 2103 si_m->cfa_off = ctxs->cfa_off; 2104 # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \ 2105 || defined(VGA_mips32) || defined(VGA_mips64) \ 2106 || defined(VGA_tilegx) 2107 si_m->cfa_how = CFIC_IA_BPREL; 2108 # elif defined(VGA_arm) 2109 si_m->cfa_how = CFIC_ARM_R12REL; 2110 # elif defined(VGA_arm64) 2111 si_m->cfa_how = CFIC_ARM64_X29REL; 2112 # else 2113 si_m->cfa_how = 0; /* invalid */ 2114 # endif 2115 } 2116 # if defined(VGA_arm) 2117 else 2118 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == 11/*??_REG*/) { 2119 si_m->cfa_how = CFIC_ARM_R11REL; 2120 si_m->cfa_off = ctxs->cfa_off; 2121 } 2122 else 2123 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == 7/*??_REG*/) { 2124 si_m->cfa_how = CFIC_ARM_R7REL; 2125 si_m->cfa_off = ctxs->cfa_off; 2126 } 2127 # elif defined(VGA_arm64) 2128 // do we need any arm64 specifics here? 2129 # endif 2130 else { 2131 why = 1; 2132 goto failed; 2133 } 2134 2135 # define SUMMARISE_HOW(_how, _off, _ctxreg) \ 2136 switch (_ctxreg.tag) { \ 2137 case RR_Undef: \ 2138 _how = CFIR_UNKNOWN; _off = 0; break; \ 2139 case RR_Same: \ 2140 _how = CFIR_SAME; _off = 0; break; \ 2141 case RR_CFAOff: \ 2142 _how = CFIR_MEMCFAREL; _off = _ctxreg.arg; break; \ 2143 case RR_CFAValOff: \ 2144 _how = CFIR_CFAREL; _off = _ctxreg.arg; break; \ 2145 case RR_ValExpr: { \ 2146 XArray *src, *dst; \ 2147 Int conv; \ 2148 src = ctx->exprs; \ 2149 dst = debuginfo->cfsi_exprs; \ 2150 if (src && (VG_(sizeXA)(src) > 0) && (!dst)) { \ 2151 dst = VG_(newXA)( ML_(dinfo_zalloc), \ 2152 "di.ccCt.2", \ 2153 ML_(dinfo_free), \ 2154 sizeof(CfiExpr) ); \ 2155 debuginfo->cfsi_exprs = dst; \ 2156 } \ 2157 conv = copy_convert_CfiExpr_tree \ 2158 ( dst, ctx, _ctxreg.arg ); \ 2159 vg_assert(conv >= -1); \ 2160 if (conv == -1) { why = 7; goto failed; } \ 2161 _how = CFIR_EXPR; \ 2162 _off = conv; \ 2163 if (0 && debuginfo->ddump_frames) \ 2164 ML_(ppCfiExpr)(dst, conv); \ 2165 break; \ 2166 } \ 2167 default: \ 2168 why = 2; goto failed; /* otherwise give up */ \ 2169 } 2170 2171 2172 # if defined(VGA_x86) || defined(VGA_amd64) 2173 2174 /* --- entire tail of this fn specialised for x86/amd64 --- */ 2175 2176 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, 2177 ctxs->reg[ctx->ra_reg] ); 2178 SUMMARISE_HOW(si_m->bp_how, si_m->bp_off, 2179 ctxs->reg[FP_REG] ); 2180 2181 /* on x86/amd64, it seems the old %{e,r}sp value before the call is 2182 always the same as the CFA. Therefore ... */ 2183 si_m->sp_how = CFIR_CFAREL; 2184 si_m->sp_off = 0; 2185 2186 /* also, gcc says "Undef" for %{e,r}bp when it is unchanged. So 2187 .. */ 2188 if (ctxs->reg[FP_REG].tag == RR_Undef) 2189 si_m->bp_how = CFIR_SAME; 2190 2191 /* knock out some obviously stupid cases */ 2192 if (si_m->ra_how == CFIR_SAME) 2193 { why = 3; goto failed; } 2194 2195 /* bogus looking range? Note, we require that the difference is 2196 representable in 32 bits. */ 2197 if (loc_start >= ctx->loc) 2198 { why = 4; goto failed; } 2199 if (ctx->loc - loc_start > 10000000 /* let's say */) 2200 { why = 5; goto failed; } 2201 2202 *base = loc_start + ctx->initloc; 2203 *len = (UInt)(ctx->loc - loc_start); 2204 2205 return True; 2206 2207 # elif defined(VGA_arm) 2208 2209 /* ---- entire tail of this fn specialised for arm ---- */ 2210 2211 SUMMARISE_HOW(si_m->r14_how, si_m->r14_off, 2212 ctxs->reg[14] ); 2213 2214 //SUMMARISE_HOW(si_m->r13_how, si_m->r13_off, 2215 // ctxs->reg[13] ); 2216 2217 SUMMARISE_HOW(si_m->r12_how, si_m->r12_off, 2218 ctxs->reg[FP_REG] ); 2219 2220 SUMMARISE_HOW(si_m->r11_how, si_m->r11_off, 2221 ctxs->reg[11/*FP_REG*/] ); 2222 2223 SUMMARISE_HOW(si_m->r7_how, si_m->r7_off, 2224 ctxs->reg[7] ); 2225 2226 if (ctxs->reg[14/*LR*/].tag == RR_Same 2227 && ctx->ra_reg == 14/*as we expect it always to be*/) { 2228 /* Generate a trivial CfiExpr, which merely says "r14". First 2229 ensure this DebugInfo has a cfsi_expr array in which to park 2230 it. */ 2231 if (!debuginfo->cfsi_exprs) 2232 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc), 2233 "di.ccCt.2a", 2234 ML_(dinfo_free), 2235 sizeof(CfiExpr) ); 2236 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs, 2237 Creg_ARM_R14); 2238 si_m->ra_how = CFIR_EXPR; 2239 } else { 2240 /* Just summarise it in the normal way */ 2241 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, 2242 ctxs->reg[ctx->ra_reg] ); 2243 } 2244 2245 /* on arm, it seems the old r13 (SP) value before the call is 2246 always the same as the CFA. Therefore ... */ 2247 si_m->r13_how = CFIR_CFAREL; 2248 si_m->r13_off = 0; 2249 2250 /* bogus looking range? Note, we require that the difference is 2251 representable in 32 bits. */ 2252 if (loc_start >= ctx->loc) 2253 { why = 4; goto failed; } 2254 if (ctx->loc - loc_start > 10000000 /* let's say */) 2255 { why = 5; goto failed; } 2256 2257 *base = loc_start + ctx->initloc; 2258 *len = (UInt)(ctx->loc - loc_start); 2259 2260 return True; 2261 2262 # elif defined(VGA_arm64) 2263 2264 /* --- entire tail of this fn specialised for arm64 --- */ 2265 2266 SUMMARISE_HOW(si_m->x30_how, si_m->x30_off, ctxs->reg[30/*LR*/]); 2267 SUMMARISE_HOW(si_m->x29_how, si_m->x29_off, ctxs->reg[29/*FP*/]); 2268 2269 if (ctxs->reg[30/*LR*/].tag == RR_Same 2270 && ctx->ra_reg == 30/*as we expect it always to be*/) { 2271 /* Generate a trivial CfiExpr, which merely says "x30". First 2272 ensure this DebugInfo has a cfsi_expr array in which to park 2273 it. */ 2274 if (!debuginfo->cfsi_exprs) 2275 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc), 2276 "di.ccCt.2a-arm64", 2277 ML_(dinfo_free), 2278 sizeof(CfiExpr) ); 2279 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs, 2280 Creg_ARM64_X30); 2281 si_m->ra_how = CFIR_EXPR; 2282 } else { 2283 /* Just summarise it in the normal way */ 2284 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, ctxs->reg[ctx->ra_reg]); 2285 } 2286 2287 /* on arm64, it seems the old SP value before the call is always 2288 the same as the CFA. Therefore ... */ 2289 si_m->sp_how = CFIR_CFAREL; 2290 si_m->sp_off = 0; 2291 2292 /* bogus looking range? Note, we require that the difference is 2293 representable in 32 bits. */ 2294 if (loc_start >= ctx->loc) 2295 { why = 4; goto failed; } 2296 if (ctx->loc - loc_start > 10000000 /* let's say */) 2297 { why = 5; goto failed; } 2298 2299 *base = loc_start + ctx->initloc; 2300 *len = (UInt)(ctx->loc - loc_start); 2301 2302 return True; 2303 2304 # elif defined(VGA_s390x) 2305 2306 /* --- entire tail of this fn specialised for s390 --- */ 2307 2308 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, 2309 ctxs->reg[ctx->ra_reg] ); 2310 SUMMARISE_HOW(si_m->fp_how, si_m->fp_off, 2311 ctxs->reg[FP_REG] ); 2312 SUMMARISE_HOW(si_m->sp_how, si_m->sp_off, 2313 ctxs->reg[SP_REG] ); 2314 2315 /* change some defaults to consumable values */ 2316 if (si_m->sp_how == CFIR_UNKNOWN) 2317 si_m->sp_how = CFIR_SAME; 2318 2319 if (si_m->fp_how == CFIR_UNKNOWN) 2320 si_m->fp_how = CFIR_SAME; 2321 2322 if (si_m->cfa_how == CFIR_UNKNOWN) { 2323 si_m->cfa_how = CFIC_IA_SPREL; 2324 si_m->cfa_off = 160; 2325 } 2326 if (si_m->ra_how == CFIR_UNKNOWN) { 2327 if (!debuginfo->cfsi_exprs) 2328 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc), 2329 "di.ccCt.2a", 2330 ML_(dinfo_free), 2331 sizeof(CfiExpr) ); 2332 si_m->ra_how = CFIR_EXPR; 2333 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs, 2334 Creg_S390_LR); 2335 } 2336 2337 /* knock out some obviously stupid cases */ 2338 if (si_m->ra_how == CFIR_SAME) 2339 { why = 3; goto failed; } 2340 2341 /* bogus looking range? Note, we require that the difference is 2342 representable in 32 bits. */ 2343 if (loc_start >= ctx->loc) 2344 { why = 4; goto failed; } 2345 if (ctx->loc - loc_start > 10000000 /* let's say */) 2346 { why = 5; goto failed; } 2347 2348 *base = loc_start + ctx->initloc; 2349 *len = (UInt)(ctx->loc - loc_start); 2350 2351 return True; 2352 2353 # elif defined(VGA_mips32) || defined(VGA_mips64) 2354 2355 /* --- entire tail of this fn specialised for mips --- */ 2356 2357 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, 2358 ctxs->reg[ctx->ra_reg] ); 2359 SUMMARISE_HOW(si_m->fp_how, si_m->fp_off, 2360 ctxs->reg[FP_REG] ); 2361 SUMMARISE_HOW(si_m->sp_how, si_m->sp_off, 2362 ctxs->reg[SP_REG] ); 2363 si_m->sp_how = CFIR_CFAREL; 2364 si_m->sp_off = 0; 2365 2366 if (si_m->fp_how == CFIR_UNKNOWN) 2367 si_m->fp_how = CFIR_SAME; 2368 if (si_m->cfa_how == CFIR_UNKNOWN) { 2369 si_m->cfa_how = CFIC_IA_SPREL; 2370 si_m->cfa_off = 160; 2371 } 2372 if (si_m->ra_how == CFIR_UNKNOWN) { 2373 if (!debuginfo->cfsi_exprs) 2374 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc), 2375 "di.ccCt.2a", 2376 ML_(dinfo_free), 2377 sizeof(CfiExpr) ); 2378 si_m->ra_how = CFIR_EXPR; 2379 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs, 2380 Creg_MIPS_RA); 2381 } 2382 2383 if (si_m->ra_how == CFIR_SAME) 2384 { why = 3; goto failed; } 2385 2386 if (loc_start >= ctx->loc) 2387 { why = 4; goto failed; } 2388 if (ctx->loc - loc_start > 10000000 /* let's say */) 2389 { why = 5; goto failed; } 2390 2391 *base = loc_start + ctx->initloc; 2392 *len = (UInt)(ctx->loc - loc_start); 2393 2394 return True; 2395 # elif defined(VGA_tilegx) 2396 2397 /* --- entire tail of this fn specialised for tilegx --- */ 2398 2399 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, 2400 ctxs->reg[ctx->ra_reg] ); 2401 SUMMARISE_HOW(si_m->fp_how, si_m->fp_off, 2402 ctxs->reg[FP_REG] ); 2403 SUMMARISE_HOW(si_m->sp_how, si_m->sp_off, 2404 ctxs->reg[SP_REG] ); 2405 si_m->sp_how = CFIR_CFAREL; 2406 si_m->sp_off = 0; 2407 2408 if (si_m->fp_how == CFIR_UNKNOWN) 2409 si_m->fp_how = CFIR_SAME; 2410 if (si_m->cfa_how == CFIR_UNKNOWN) { 2411 si_m->cfa_how = CFIC_IA_SPREL; 2412 si_m->cfa_off = 160; 2413 } 2414 if (si_m->ra_how == CFIR_UNKNOWN) { 2415 if (!debuginfo->cfsi_exprs) 2416 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc), 2417 "di.ccCt.2a", 2418 ML_(dinfo_free), 2419 sizeof(CfiExpr) ); 2420 si_m->ra_how = CFIR_EXPR; 2421 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs, 2422 Creg_TILEGX_LR); 2423 } 2424 2425 if (si_m->ra_how == CFIR_SAME) 2426 { why = 3; goto failed; } 2427 2428 if (loc_start >= ctx->loc) 2429 { why = 4; goto failed; } 2430 if (ctx->loc - loc_start > 10000000 /* let's say */) 2431 { why = 5; goto failed; } 2432 2433 *base = loc_start + ctx->initloc; 2434 *len = (UInt)(ctx->loc - loc_start); 2435 2436 return True; 2437 # elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) 2438 /* These don't use CFI based unwinding (is that really true?) */ 2439 2440 # else 2441 # error "Unknown arch" 2442 # endif 2443 2444 /* --- non-specialised code after this point --- */ 2445 2446 # undef SUMMARISE_HOW 2447 2448 failed: 2449 if (VG_(clo_verbosity) > 2 || debuginfo->trace_cfi) { 2450 VG_(message)(Vg_DebugMsg, 2451 "summarise_context(loc_start = %#lx)" 2452 ": cannot summarise(why=%d): \n", loc_start, why); 2453 ppUnwindContext(ctx); 2454 } 2455 return False; 2456 } 2457 2458 /* Copy the tree rooted at srcuc->exprs node srcix to dstxa, on the 2459 way converting any DwReg regs (regs numbered using the Dwarf scheme 2460 defined by each architecture's ABI) into CfiRegs, which are 2461 platform independent. If the conversion isn't possible because 2462 there is no equivalent register, return -1. This has the 2463 undesirable side effect of de-dagifying the input; oh well. */ 2464 static Int copy_convert_CfiExpr_tree ( XArray* dstxa, 2465 const UnwindContext* srcuc, 2466 Int srcix ) 2467 { 2468 CfiExpr* src; 2469 Int cpL, cpR, cpA; 2470 XArray* srcxa = srcuc->exprs; 2471 vg_assert(srcxa); 2472 vg_assert(dstxa); 2473 vg_assert(srcix >= 0 && srcix < VG_(sizeXA)(srcxa)); 2474 2475 src = VG_(indexXA)( srcxa, srcix ); 2476 switch (src->tag) { 2477 case Cex_Undef: 2478 return ML_(CfiExpr_Undef)( dstxa ); 2479 case Cex_Deref: 2480 cpA = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Deref.ixAddr ); 2481 if (cpA == -1) 2482 return -1; /* propagate failure */ 2483 return ML_(CfiExpr_Deref)( dstxa, cpA ); 2484 case Cex_Const: 2485 return ML_(CfiExpr_Const)( dstxa, src->Cex.Const.con ); 2486 case Cex_Binop: 2487 cpL = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Binop.ixL ); 2488 cpR = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Binop.ixR ); 2489 vg_assert(cpL >= -1 && cpR >= -1); 2490 if (cpL == -1 || cpR == -1) 2491 return -1; /* propagate failure */ 2492 return ML_(CfiExpr_Binop)( dstxa, src->Cex.Binop.op, cpL, cpR ); 2493 case Cex_CfiReg: 2494 /* should not see these in input (are created only by this 2495 conversion step!) */ 2496 VG_(core_panic)("copy_convert_CfiExpr_tree: CfiReg in input"); 2497 case Cex_DwReg: { 2498 /* This is the only place where the conversion can fail. */ 2499 Int dwreg __attribute__((unused)); 2500 dwreg = src->Cex.DwReg.reg; 2501 # if defined(VGA_x86) || defined(VGA_amd64) 2502 if (dwreg == SP_REG) 2503 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP ); 2504 if (dwreg == FP_REG) 2505 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP ); 2506 if (dwreg == srcuc->ra_reg) 2507 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP ); /* correct? */ 2508 # elif defined(VGA_arm) 2509 if (dwreg == SP_REG) 2510 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R13 ); 2511 if (dwreg == FP_REG) 2512 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R12 ); 2513 if (dwreg == srcuc->ra_reg) 2514 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R15 ); /* correct? */ 2515 # elif defined(VGA_s390x) 2516 if (dwreg == SP_REG) 2517 return ML_(CfiExpr_CfiReg)( dstxa, Creg_S390_SP ); 2518 if (dwreg == FP_REG) 2519 return ML_(CfiExpr_CfiReg)( dstxa, Creg_S390_FP ); 2520 if (dwreg == srcuc->ra_reg) 2521 return ML_(CfiExpr_CfiReg)( dstxa, Creg_S390_IA ); 2522 # elif defined(VGA_mips32) || defined(VGA_mips64) 2523 if (dwreg == SP_REG) 2524 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP ); 2525 if (dwreg == FP_REG) 2526 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP ); 2527 if (dwreg == srcuc->ra_reg) 2528 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP ); 2529 # elif defined(VGA_arm64) 2530 I_die_here; 2531 # elif defined(VGA_ppc32) || defined(VGA_ppc64be) \ 2532 || defined(VGA_ppc64le) 2533 # elif defined(VGA_tilegx) 2534 if (dwreg == SP_REG) 2535 return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_SP ); 2536 if (dwreg == FP_REG) 2537 return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_BP ); 2538 if (dwreg == srcuc->ra_reg) 2539 return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_IP ); 2540 # else 2541 # error "Unknown arch" 2542 # endif 2543 /* else we must fail - can't represent the reg */ 2544 return -1; 2545 } 2546 default: 2547 VG_(core_panic)("copy_convert_CfiExpr_tree: default"); 2548 } 2549 } 2550 2551 2552 static void ppUnwindContext_summary ( const UnwindContext* ctx ) 2553 { 2554 const struct UnwindContextState* ctxs = &ctx->state[ctx->state_sp]; 2555 2556 VG_(printf)("0x%llx-1: ", (ULong)ctx->loc); 2557 2558 if (ctxs->cfa_reg == SP_REG) { 2559 VG_(printf)("SP/CFA=%d+SP ", ctxs->cfa_off); 2560 } else 2561 if (ctxs->cfa_reg == FP_REG) { 2562 VG_(printf)("SP/CFA=%d+FP ", ctxs->cfa_off); 2563 } else { 2564 VG_(printf)("SP/CFA=unknown "); 2565 } 2566 2567 VG_(printf)("RA="); 2568 ppRegRule( ctx->exprs, &ctxs->reg[ctx->ra_reg] ); 2569 2570 VG_(printf)("FP="); 2571 ppRegRule( ctx->exprs, &ctxs->reg[FP_REG] ); 2572 VG_(printf)("\n"); 2573 } 2574 2575 2576 /* ------------ Pick apart DWARF2 byte streams ------------ */ 2577 2578 static ULong step_le_u_encoded_literal ( DiCursor* data, UInt size ) 2579 { 2580 switch (size) { 2581 case 8: return (ULong)ML_(cur_step_ULong)( data ); 2582 case 4: return (ULong)ML_(cur_step_UInt)( data ); 2583 case 2: return (ULong)ML_(cur_step_UShort)( data ); 2584 case 1: return (ULong)ML_(cur_step_UChar)( data ); 2585 default: vg_assert(0); /*NOTREACHED*/ return 0; 2586 } 2587 } 2588 2589 static Long step_le_s_encoded_literal ( DiCursor* data, UInt size ) 2590 { 2591 ULong u64 = step_le_u_encoded_literal( data, size ); 2592 Long s64; 2593 switch (size) { 2594 case 8: s64 = u64; break; 2595 case 4: s64 = u64 << 32; s64 >>= 32; break; 2596 case 2: s64 = u64 << 48; s64 >>= 48; break; 2597 case 1: s64 = u64 << 56; s64 >>= 56; break; 2598 default: vg_assert(0); /*NOTREACHED*/ return 0; 2599 } 2600 return s64; 2601 } 2602 2603 static UChar default_Addr_encoding ( void ) 2604 { 2605 switch (sizeof(Addr)) { 2606 case 4: return DW_EH_PE_udata4; 2607 case 8: return DW_EH_PE_udata8; 2608 default: vg_assert(0); 2609 } 2610 } 2611 2612 static UInt size_of_encoded_Addr ( UChar encoding ) 2613 { 2614 if (encoding == DW_EH_PE_omit) 2615 return 0; 2616 2617 switch (encoding & 0x07) { 2618 case DW_EH_PE_absptr: return sizeof(Addr); 2619 case DW_EH_PE_udata2: return sizeof(UShort); 2620 case DW_EH_PE_udata4: return sizeof(UInt); 2621 case DW_EH_PE_udata8: return sizeof(ULong); 2622 default: vg_assert(0); 2623 } 2624 } 2625 2626 static Addr step_encoded_Addr ( const AddressDecodingInfo* adi, 2627 /*MOD*/DiCursor* data ) 2628 { 2629 /* Regarding the handling of DW_EH_PE_absptr. DWARF3 says this 2630 denotes an absolute address, hence you would think 'base' is 2631 zero. However, that is nonsensical (unless relocations are to 2632 be applied to the unwind data before reading it, which sounds 2633 unlikely). My interpretation is that DW_EH_PE_absptr indicates 2634 an address relative to where the object was loaded (technically, 2635 relative to its stated load VMA, hence the use of text_bias 2636 rather than text_avma). Hmm, should we use text_bias or 2637 text_avma here? Not sure. 2638 2639 This view appears to be supported by DWARF3 spec sec 7.3 2640 "Executable Objects and Shared Objects": 2641 2642 This requirement makes the debugging information for shared 2643 objects position independent. Virtual addresses in a shared 2644 object may be calculated by adding the offset to the base 2645 address at which the object was attached. This offset is 2646 available in the run-time linker's data structures. 2647 */ 2648 Addr base; 2649 Word offset; 2650 UChar encoding = adi->encoding; 2651 DiCursor ehframe_image = adi->ehframe_image; 2652 Addr ehframe_avma = adi->ehframe_avma; 2653 2654 vg_assert((encoding & DW_EH_PE_indirect) == 0); 2655 2656 switch (encoding & 0x70) { 2657 case DW_EH_PE_absptr: 2658 base = adi->text_bias; 2659 break; 2660 case DW_EH_PE_pcrel: 2661 base = ehframe_avma + ML_(cur_minus)(*data, ehframe_image); 2662 break; 2663 case DW_EH_PE_datarel: 2664 vg_assert(0); 2665 base = /* data base address */ 0; 2666 break; 2667 case DW_EH_PE_textrel: 2668 vg_assert(0); 2669 base = /* text base address */ 0; 2670 break; 2671 case DW_EH_PE_funcrel: 2672 base = 0; 2673 break; 2674 case DW_EH_PE_aligned: 2675 base = 0; 2676 offset = ML_(cur_minus)(*data, ehframe_image); 2677 if ((offset % sizeof(Addr)) != 0) { 2678 Word nbytes = sizeof(Addr) - (offset % sizeof(Addr)); 2679 *data = ML_(cur_plus)(*data, nbytes); 2680 } 2681 break; 2682 default: 2683 vg_assert(0); 2684 } 2685 2686 if ((encoding & 0x07) == 0x00) 2687 encoding |= default_Addr_encoding(); 2688 2689 switch (encoding & 0x0f) { 2690 case DW_EH_PE_udata2: 2691 return base + ML_(cur_step_UShort)(data); 2692 case DW_EH_PE_udata4: 2693 return base + ML_(cur_step_UInt)(data); 2694 case DW_EH_PE_udata8: 2695 return base + ML_(cur_step_ULong)(data); 2696 case DW_EH_PE_sdata2: 2697 return base + ML_(cur_step_Short)(data); 2698 case DW_EH_PE_sdata4: 2699 return base + ML_(cur_step_Int)(data); 2700 case DW_EH_PE_sdata8: 2701 return base + ML_(cur_step_Long)(data); 2702 default: 2703 vg_assert2(0, "read encoded address %d\n", encoding & 0x0f); 2704 } 2705 } 2706 2707 2708 /* ------------ Run/show DWARF3 expressions ---------- */ 2709 2710 /* Convert the DWARF3 expression in expr[0 .. exprlen-1] into a dag 2711 (of CfiExprs) stored in ctx->exprs, and return the index in 2712 ctx->exprs of the root node. Or fail in which case return -1. */ 2713 /* IMPORTANT: when adding expression forms here, also remember to 2714 add suitable evaluation code in evalCfiExpr in debuginfo.c. */ 2715 static Int dwarfexpr_to_dag ( const UnwindContext* ctx, 2716 DiCursor expr, Int exprlen, 2717 Bool push_cfa_at_start, 2718 Bool ddump_frames ) 2719 { 2720 # define N_EXPR_STACK 20 2721 2722 # define PUSH(_arg) \ 2723 do { \ 2724 vg_assert(sp >= -1 && sp < N_EXPR_STACK); \ 2725 if (sp == N_EXPR_STACK-1) \ 2726 return -1; \ 2727 sp++; \ 2728 stack[sp] = (_arg); \ 2729 } while (0) 2730 2731 # define POP(_lval) \ 2732 do { \ 2733 vg_assert(sp >= -1 && sp < N_EXPR_STACK); \ 2734 if (sp == -1) \ 2735 return -1; \ 2736 _lval = stack[sp]; \ 2737 sp--; \ 2738 } while (0) 2739 2740 Int ix, ix2, reg; 2741 UChar opcode; 2742 Word sw; 2743 UWord uw; 2744 CfiUnop uop; 2745 CfiBinop bop; 2746 const HChar* opname; 2747 2748 Int sp; /* # of top element: valid is -1 .. N_EXPR_STACK-1 */ 2749 Int stack[N_EXPR_STACK]; /* indices into ctx->exprs */ 2750 const struct UnwindContextState* ctxs = &ctx->state[ctx->state_sp]; 2751 2752 XArray* dst = ctx->exprs; 2753 DiCursor limit = ML_(cur_plus)(expr, exprlen); 2754 2755 vg_assert(dst); 2756 vg_assert(exprlen >= 0); 2757 2758 sp = -1; /* empty */ 2759 2760 /* Synthesise the CFA as a CfiExpr */ 2761 if (push_cfa_at_start) { 2762 if (ctxs->cfa_is_regoff) { 2763 /* cfa is reg +/- offset */ 2764 ix = ML_(CfiExpr_Binop)( dst, 2765 Cbinop_Add, 2766 ML_(CfiExpr_DwReg)( dst, ctxs->cfa_reg ), 2767 ML_(CfiExpr_Const)( dst, (UWord)(Word)ctxs->cfa_off ) 2768 ); 2769 PUSH(ix); 2770 } else { 2771 /* CFA is already an expr; use its root node */ 2772 PUSH(ctxs->cfa_expr_ix); 2773 } 2774 } 2775 2776 while (True) { 2777 2778 vg_assert(sp >= -1 && sp < N_EXPR_STACK); 2779 2780 if (ML_(cur_cmpGT)(expr, limit)) /* "expr > limit" */ 2781 return -1; /* overrun - something's wrong */ 2782 2783 if (ML_(cur_cmpEQ)(expr, limit)) { /* "expr == limit" */ 2784 /* end of expr - return expr on the top of stack. */ 2785 if (sp == -1) 2786 return -1; /* stack empty. Bad. */ 2787 else 2788 break; 2789 } 2790 2791 uop = 0; bop = 0; opname = NULL; /* excessively conservative */ 2792 2793 opcode = ML_(cur_step_UChar)(&expr); 2794 switch (opcode) { 2795 2796 case DW_OP_lit0 ... DW_OP_lit31: 2797 /* push: literal 0 .. 31 */ 2798 sw = (Word)opcode - (Word)DW_OP_lit0; 2799 vg_assert(sw >= 0 && sw <= 31); 2800 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) ); 2801 if (ddump_frames) 2802 VG_(printf)("DW_OP_lit%ld", sw); 2803 break; 2804 2805 case DW_OP_breg0 ... DW_OP_breg31: 2806 /* push: reg + sleb128 */ 2807 reg = (Int)opcode - (Int)DW_OP_breg0; 2808 vg_assert(reg >= 0 && reg <= 31); 2809 sw = step_leb128S( &expr ); 2810 ix = ML_(CfiExpr_Binop)( dst, 2811 Cbinop_Add, 2812 ML_(CfiExpr_DwReg)( dst, reg ), 2813 ML_(CfiExpr_Const)( dst, (UWord)sw ) 2814 ); 2815 PUSH(ix); 2816 if (ddump_frames) 2817 VG_(printf)("DW_OP_breg%d: %ld", reg, sw); 2818 break; 2819 2820 case DW_OP_reg0 ... DW_OP_reg31: 2821 /* push: reg */ 2822 reg = (Int)opcode - (Int)DW_OP_reg0; 2823 vg_assert(reg >= 0 && reg <= 31); 2824 ix = ML_(CfiExpr_DwReg)( dst, reg ); 2825 PUSH(ix); 2826 if (ddump_frames) 2827 VG_(printf)("DW_OP_reg%d", reg); 2828 break; 2829 2830 case DW_OP_plus_uconst: 2831 uw = step_leb128U( &expr ); 2832 PUSH( ML_(CfiExpr_Const)( dst, uw ) ); 2833 POP( ix ); 2834 POP( ix2 ); 2835 PUSH( ML_(CfiExpr_Binop)( dst, Cbinop_Add, ix2, ix ) ); 2836 if (ddump_frames) 2837 VG_(printf)("DW_OP_plus_uconst: %lu", uw); 2838 break; 2839 2840 case DW_OP_const4s: 2841 /* push: 32-bit signed immediate */ 2842 sw = step_le_s_encoded_literal( &expr, 4 ); 2843 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) ); 2844 if (ddump_frames) 2845 VG_(printf)("DW_OP_const4s: %ld", sw); 2846 break; 2847 2848 case DW_OP_const2s: 2849 /* push: 16-bit signed immediate */ 2850 sw = step_le_s_encoded_literal( &expr, 2 ); 2851 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) ); 2852 if (ddump_frames) 2853 VG_(printf)("DW_OP_const2s: %ld", sw); 2854 break; 2855 2856 case DW_OP_const1s: 2857 /* push: 8-bit signed immediate */ 2858 sw = step_le_s_encoded_literal( &expr, 1 ); 2859 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) ); 2860 if (ddump_frames) 2861 VG_(printf)("DW_OP_const1s: %ld", sw); 2862 break; 2863 2864 case DW_OP_const1u: 2865 /* push: 8-bit unsigned immediate */ 2866 uw = step_le_u_encoded_literal( &expr, 1 ); 2867 PUSH( ML_(CfiExpr_Const)( dst, uw ) ); 2868 if (ddump_frames) 2869 VG_(printf)("DW_OP_const1: %lu", uw); 2870 break; 2871 2872 case DW_OP_const2u: 2873 /* push: 16-bit unsigned immediate */ 2874 uw = step_le_u_encoded_literal( &expr, 2 ); 2875 PUSH( ML_(CfiExpr_Const)( dst, uw ) ); 2876 if (ddump_frames) 2877 VG_(printf)("DW_OP_const2: %lu", uw); 2878 break; 2879 2880 case DW_OP_const4u: 2881 /* push: 32-bit unsigned immediate */ 2882 uw = step_le_u_encoded_literal( &expr, 4 ); 2883 PUSH( ML_(CfiExpr_Const)( dst, uw ) ); 2884 if (ddump_frames) 2885 VG_(printf)("DW_OP_const4: %lu", uw); 2886 break; 2887 2888 case DW_OP_abs: 2889 uop = Cunop_Abs; opname = "abs"; goto unop; 2890 case DW_OP_neg: 2891 uop = Cunop_Neg; opname = "neg"; goto unop; 2892 case DW_OP_not: 2893 uop = Cunop_Not; opname = "not"; goto unop; 2894 unop: 2895 POP( ix ); 2896 PUSH( ML_(CfiExpr_Unop)( dst, uop, ix ) ); 2897 if (ddump_frames) 2898 VG_(printf)("DW_OP_%s", opname); 2899 break; 2900 2901 case DW_OP_minus: 2902 bop = Cbinop_Sub; opname = "minus"; goto binop; 2903 case DW_OP_plus: 2904 bop = Cbinop_Add; opname = "plus"; goto binop; 2905 case DW_OP_and: 2906 bop = Cbinop_And; opname = "and"; goto binop; 2907 case DW_OP_mul: 2908 bop = Cbinop_Mul; opname = "mul"; goto binop; 2909 case DW_OP_shl: 2910 bop = Cbinop_Shl; opname = "shl"; goto binop; 2911 case DW_OP_shr: 2912 bop = Cbinop_Shr; opname = "shr"; goto binop; 2913 case DW_OP_eq: 2914 bop = Cbinop_Eq; opname = "eq"; goto binop; 2915 case DW_OP_ge: 2916 bop = Cbinop_Ge; opname = "ge"; goto binop; 2917 case DW_OP_gt: 2918 bop = Cbinop_Gt; opname = "gt"; goto binop; 2919 case DW_OP_le: 2920 bop = Cbinop_Le; opname = "le"; goto binop; 2921 case DW_OP_lt: 2922 bop = Cbinop_Lt; opname = "lt"; goto binop; 2923 case DW_OP_ne: 2924 bop = Cbinop_Ne; opname = "ne"; goto binop; 2925 binop: 2926 POP( ix ); 2927 POP( ix2 ); 2928 PUSH( ML_(CfiExpr_Binop)( dst, bop, ix2, ix ) ); 2929 if (ddump_frames) 2930 VG_(printf)("DW_OP_%s", opname); 2931 break; 2932 2933 case DW_OP_deref: 2934 POP( ix ); 2935 PUSH( ML_(CfiExpr_Deref)( dst, ix ) ); 2936 if (ddump_frames) 2937 VG_(printf)("DW_OP_deref"); 2938 break; 2939 2940 default: 2941 if (!VG_(clo_xml)) 2942 VG_(message)(Vg_DebugMsg, 2943 "Warning: DWARF2 CFI reader: unhandled DW_OP_ " 2944 "opcode 0x%x\n", (Int)opcode); 2945 return -1; 2946 } 2947 2948 if (ML_(cur_cmpLT)(expr, limit) && ddump_frames) 2949 VG_(printf)("; "); 2950 2951 } 2952 2953 vg_assert(sp >= -1 && sp < N_EXPR_STACK); 2954 if (sp == -1) 2955 return -1; 2956 2957 if (0 && ddump_frames) 2958 ML_(ppCfiExpr)( dst, stack[sp] ); 2959 return stack[sp]; 2960 2961 # undef POP 2962 # undef PUSH 2963 # undef N_EXPR_STACK 2964 } 2965 2966 2967 /* ------------ Run/show CFI instructions ------------ */ 2968 2969 /* Run a CFI instruction, and also return its length. 2970 Returns 0 if the instruction could not be executed. 2971 */ 2972 static Int run_CF_instruction ( /*MOD*/UnwindContext* ctx, 2973 DiCursor instrIN, 2974 const UnwindContext* restore_ctx, 2975 const AddressDecodingInfo* adi, 2976 const DebugInfo* di ) 2977 { 2978 Int off, reg, reg2, len, j; 2979 UInt delta; 2980 Addr printing_bias = ((Addr)ctx->initloc) - ((Addr)di->text_bias); 2981 struct UnwindContextState* ctxs; 2982 2983 DiCursor instr = instrIN; 2984 UChar instr_0 = ML_(cur_step_UChar)(&instr); 2985 UChar hi2 = (instr_0 >> 6) & 3; 2986 UChar lo6 = instr_0 & 0x3F; 2987 2988 if (ctx->state_sp < 0 || ctx->state_sp >= N_RR_STACK) 2989 return 0; /* bogus reg-rule stack pointer */ 2990 2991 ctxs = &ctx->state[ctx->state_sp]; 2992 if (hi2 == DW_CFA_advance_loc) { 2993 delta = (UInt)lo6; 2994 delta *= ctx->code_a_f; 2995 ctx->loc += delta; 2996 if (di->ddump_frames) 2997 VG_(printf)(" DW_CFA_advance_loc: %d to %08lx\n", 2998 (Int)delta, (Addr)ctx->loc + printing_bias); 2999 return ML_(cur_minus)(instr, instrIN); 3000 } 3001 3002 if (hi2 == DW_CFA_offset) { 3003 /* Set rule for reg 'lo6' to CFAOff(off * data_af) */ 3004 off = step_leb128( &instr, 0 ); 3005 reg = (Int)lo6; 3006 if (reg < 0 || reg >= N_CFI_REGS) 3007 return 0; /* fail */ 3008 ctxs->reg[reg].tag = RR_CFAOff; 3009 ctxs->reg[reg].arg = off * ctx->data_a_f; 3010 if (di->ddump_frames) 3011 VG_(printf)(" DW_CFA_offset: r%d at cfa%s%d\n", 3012 (Int)reg, 3013 ctxs->reg[reg].arg < 0 ? "" : "+", 3014 (Int)ctxs->reg[reg].arg ); 3015 return ML_(cur_minus)(instr, instrIN); 3016 } 3017 3018 if (hi2 == DW_CFA_restore) { 3019 reg = (Int)lo6; 3020 if (reg < 0 || reg >= N_CFI_REGS) 3021 return 0; /* fail */ 3022 if (restore_ctx == NULL) 3023 return 0; /* fail */ 3024 ctxs->reg[reg] = restore_ctx->state[restore_ctx->state_sp].reg[reg]; 3025 if (di->ddump_frames) 3026 VG_(printf)(" DW_CFA_restore: r%d\n", (Int)reg); 3027 return ML_(cur_minus)(instr, instrIN); 3028 } 3029 3030 vg_assert(hi2 == DW_CFA_use_secondary); 3031 3032 switch (lo6) { 3033 case DW_CFA_nop: 3034 if (di->ddump_frames) 3035 VG_(printf)(" DW_CFA_nop\n"); 3036 break; 3037 case DW_CFA_set_loc: 3038 /* WAS: 3039 ctx->loc = read_Addr(&instr[i]) - ctx->initloc; i+= sizeof(Addr); 3040 Was this ever right? */ 3041 /* 2007 Feb 23: No. binutils/dwarf.c treats it as an encoded 3042 address and that appears to be in accordance with the 3043 DWARF3 spec. */ 3044 ctx->loc = step_encoded_Addr(adi, &instr); 3045 if (di->ddump_frames) 3046 VG_(printf)(" rci:DW_CFA_set_loc\n"); 3047 break; 3048 case DW_CFA_advance_loc1: 3049 delta = (UInt)ML_(cur_step_UChar)(&instr); 3050 delta *= ctx->code_a_f; 3051 ctx->loc += delta; 3052 if (di->ddump_frames) 3053 VG_(printf)(" DW_CFA_advance_loc1: %d to %08lx\n", 3054 (Int)delta, (Addr)ctx->loc + printing_bias); 3055 break; 3056 case DW_CFA_advance_loc2: 3057 delta = (UInt)ML_(cur_step_UShort)(&instr); 3058 delta *= ctx->code_a_f; 3059 ctx->loc += delta; 3060 if (di->ddump_frames) 3061 VG_(printf)(" DW_CFA_advance_loc2: %d to %08lx\n", 3062 (Int)delta, (Addr)ctx->loc + printing_bias); 3063 break; 3064 case DW_CFA_advance_loc4: 3065 delta = (UInt)ML_(cur_step_UInt)(&instr); 3066 delta *= ctx->code_a_f; 3067 ctx->loc += delta; 3068 if (di->ddump_frames) 3069 VG_(printf)(" DW_CFA_advance_loc4: %d to %08lx\n", 3070 (Int)delta, (Addr)ctx->loc + printing_bias); 3071 break; 3072 3073 case DW_CFA_def_cfa: 3074 reg = step_leb128( &instr, 0 ); 3075 off = step_leb128( &instr, 0 ); 3076 if (reg < 0 || reg >= N_CFI_REGS) 3077 return 0; /* fail */ 3078 ctxs->cfa_is_regoff = True; 3079 ctxs->cfa_expr_ix = 0; 3080 ctxs->cfa_reg = reg; 3081 ctxs->cfa_off = off; 3082 if (di->ddump_frames) 3083 VG_(printf)(" DW_CFA_def_cfa: r%d ofs %d\n", (Int)reg, (Int)off); 3084 break; 3085 3086 case DW_CFA_def_cfa_sf: 3087 reg = step_leb128( &instr, 0 ); 3088 off = step_leb128( &instr, 1 ); 3089 if (reg < 0 || reg >= N_CFI_REGS) 3090 return 0; /* fail */ 3091 ctxs->cfa_is_regoff = True; 3092 ctxs->cfa_expr_ix = 0; 3093 ctxs->cfa_reg = reg; 3094 ctxs->cfa_off = off * ctx->data_a_f; 3095 if (di->ddump_frames) 3096 VG_(printf)(" rci:DW_CFA_def_cfa_sf\n"); 3097 break; 3098 3099 case DW_CFA_register: 3100 reg = step_leb128( &instr, 0 ); 3101 reg2 = step_leb128( &instr, 0 ); 3102 if (reg < 0 || reg >= N_CFI_REGS) 3103 return 0; /* fail */ 3104 if (reg2 < 0 || reg2 >= N_CFI_REGS) 3105 return 0; /* fail */ 3106 ctxs->reg[reg].tag = RR_Reg; 3107 ctxs->reg[reg].arg = reg2; 3108 if (di->ddump_frames) 3109 VG_(printf)(" DW_CFA_register: r%d in r%d\n", 3110 (Int)reg, (Int)reg2); 3111 break; 3112 3113 case DW_CFA_offset_extended: 3114 reg = step_leb128( &instr, 0 ); 3115 off = step_leb128( &instr, 0 ); 3116 if (reg < 0 || reg >= N_CFI_REGS) 3117 return 0; /* fail */ 3118 ctxs->reg[reg].tag = RR_CFAOff; 3119 ctxs->reg[reg].arg = off * ctx->data_a_f; 3120 if (di->ddump_frames) 3121 VG_(printf)(" rci:DW_CFA_offset_extended\n"); 3122 break; 3123 3124 case DW_CFA_offset_extended_sf: 3125 reg = step_leb128( &instr, 0 ); 3126 off = step_leb128( &instr, 1 ); 3127 if (reg < 0 || reg >= N_CFI_REGS) 3128 return 0; /* fail */ 3129 ctxs->reg[reg].tag = RR_CFAOff; 3130 ctxs->reg[reg].arg = off * ctx->data_a_f; 3131 if (di->ddump_frames) 3132 VG_(printf)(" DW_CFA_offset_extended_sf: r%d at cfa%s%d\n", 3133 reg, 3134 ctxs->reg[reg].arg < 0 ? "" : "+", 3135 (Int)ctxs->reg[reg].arg); 3136 break; 3137 3138 case DW_CFA_GNU_negative_offset_extended: 3139 reg = step_leb128( &instr, 0 ); 3140 off = step_leb128( &instr, 0 ); 3141 if (reg < 0 || reg >= N_CFI_REGS) 3142 return 0; /* fail */ 3143 ctxs->reg[reg].tag = RR_CFAOff; 3144 ctxs->reg[reg].arg = (-off) * ctx->data_a_f; 3145 if (di->ddump_frames) 3146 VG_(printf)(" rci:DW_CFA_GNU_negative_offset_extended\n"); 3147 break; 3148 3149 case DW_CFA_restore_extended: 3150 reg = step_leb128( &instr, 0 ); 3151 if (reg < 0 || reg >= N_CFI_REGS) 3152 return 0; /* fail */ 3153 if (restore_ctx == NULL) 3154 return 0; /* fail */ 3155 ctxs->reg[reg] = restore_ctx->state[restore_ctx->state_sp].reg[reg]; 3156 if (di->ddump_frames) 3157 VG_(printf)(" rci:DW_CFA_restore_extended\n"); 3158 break; 3159 3160 case DW_CFA_val_offset: 3161 reg = step_leb128( &instr, 0 ); 3162 off = step_leb128( &instr, 0 ); 3163 if (reg < 0 || reg >= N_CFI_REGS) 3164 return 0; /* fail */ 3165 ctxs->reg[reg].tag = RR_CFAValOff; 3166 ctxs->reg[reg].arg = off * ctx->data_a_f; 3167 if (di->ddump_frames) 3168 VG_(printf)(" rci:DW_CFA_val_offset\n"); 3169 break; 3170 3171 case DW_CFA_val_offset_sf: 3172 reg = step_leb128( &instr, 0 ); 3173 off = step_leb128( &instr, 1 ); 3174 if (reg < 0 || reg >= N_CFI_REGS) 3175 return 0; /* fail */ 3176 ctxs->reg[reg].tag = RR_CFAValOff; 3177 ctxs->reg[reg].arg = off * ctx->data_a_f; 3178 if (di->ddump_frames) 3179 VG_(printf)(" rci:DW_CFA_val_offset_sf\n"); 3180 break; 3181 3182 case DW_CFA_def_cfa_register: 3183 reg = step_leb128( &instr, 0); 3184 if (reg < 0 || reg >= N_CFI_REGS) 3185 return 0; /* fail */ 3186 ctxs->cfa_is_regoff = True; 3187 ctxs->cfa_expr_ix = 0; 3188 ctxs->cfa_reg = reg; 3189 /* ->cfa_off unchanged */ 3190 if (di->ddump_frames) 3191 VG_(printf)(" DW_CFA_def_cfa_register: r%d\n", (Int)reg ); 3192 break; 3193 3194 case DW_CFA_def_cfa_offset: 3195 off = step_leb128( &instr, 0); 3196 ctxs->cfa_is_regoff = True; 3197 ctxs->cfa_expr_ix = 0; 3198 /* ->reg is unchanged */ 3199 ctxs->cfa_off = off; 3200 if (di->ddump_frames) 3201 VG_(printf)(" DW_CFA_def_cfa_offset: %d\n", (Int)off); 3202 break; 3203 3204 case DW_CFA_def_cfa_offset_sf: 3205 off = step_leb128( &instr, 1); 3206 ctxs->cfa_is_regoff = True; 3207 ctxs->cfa_expr_ix = 0; 3208 /* ->reg is unchanged */ 3209 ctxs->cfa_off = off * ctx->data_a_f; 3210 if (di->ddump_frames) 3211 VG_(printf)(" DW_CFA_def_cfa_offset_sf: %d\n", ctxs->cfa_off); 3212 break; 3213 3214 case DW_CFA_undefined: 3215 reg = step_leb128( &instr, 0); 3216 if (reg < 0 || reg >= N_CFI_REGS) 3217 return 0; /* fail */ 3218 ctxs->reg[reg].tag = RR_Undef; 3219 ctxs->reg[reg].arg = 0; 3220 if (di->ddump_frames) 3221 VG_(printf)(" rci:DW_CFA_undefined\n"); 3222 break; 3223 3224 case DW_CFA_same_value: 3225 reg = step_leb128( &instr, 0); 3226 if (reg < 0 || reg >= N_CFI_REGS) 3227 return 0; /* fail */ 3228 ctxs->reg[reg].tag = RR_Same; 3229 ctxs->reg[reg].arg = 0; 3230 if (di->ddump_frames) 3231 VG_(printf)(" rci:DW_CFA_same_value\n"); 3232 break; 3233 3234 case DW_CFA_GNU_args_size: 3235 /* No idea what is supposed to happen. gdb-6.3 simply 3236 ignores these. */ 3237 /*off = */ (void)step_leb128( &instr, 0 ); 3238 if (di->ddump_frames) 3239 VG_(printf)(" rci:DW_CFA_GNU_args_size (ignored)\n"); 3240 break; 3241 3242 case DW_CFA_expression: { 3243 /* Identical to DW_CFA_val_expression except that the value 3244 computed is an address and so needs one final 3245 dereference. */ 3246 DiCursor expr; 3247 reg = step_leb128( &instr, 0 ); 3248 len = step_leb128( &instr, 0 ); 3249 expr = instr; 3250 instr = ML_(cur_plus)(instr, len); 3251 if (reg < 0 || reg >= N_CFI_REGS) 3252 return 0; /* fail */ 3253 if (di->ddump_frames) 3254 VG_(printf)(" DW_CFA_expression: r%d (", 3255 (Int)reg); 3256 /* Convert the expression into a dag rooted at ctx->exprs index j, 3257 or fail. */ 3258 j = dwarfexpr_to_dag ( ctx, expr, len, True/*push CFA at start*/, 3259 di->ddump_frames); 3260 if (di->ddump_frames) 3261 VG_(printf)(")\n"); 3262 vg_assert(j >= -1); 3263 if (j >= 0) { 3264 vg_assert(ctx->exprs); 3265 vg_assert( j < VG_(sizeXA)(ctx->exprs) ); 3266 } 3267 if (j == -1) 3268 return 0; /* fail */ 3269 /* Add an extra dereference */ 3270 j = ML_(CfiExpr_Deref)( ctx->exprs, j ); 3271 ctxs->reg[reg].tag = RR_ValExpr; 3272 ctxs->reg[reg].arg = j; 3273 break; 3274 } 3275 3276 case DW_CFA_val_expression: { 3277 DiCursor expr; 3278 reg = step_leb128( &instr, 0 ); 3279 len = step_leb128( &instr, 0 ); 3280 expr = instr; 3281 instr = ML_(cur_plus)(instr, len); 3282 if (reg < 0 || reg >= N_CFI_REGS) 3283 return 0; /* fail */ 3284 if (di->ddump_frames) 3285 VG_(printf)(" DW_CFA_val_expression: r%d (", 3286 (Int)reg); 3287 /* Convert the expression into a dag rooted at ctx->exprs index j, 3288 or fail. */ 3289 j = dwarfexpr_to_dag ( ctx, expr, len, True/*push CFA at start*/, 3290 di->ddump_frames); 3291 if (di->ddump_frames) 3292 VG_(printf)(")\n"); 3293 vg_assert(j >= -1); 3294 if (j >= 0) { 3295 vg_assert(ctx->exprs); 3296 vg_assert( j < VG_(sizeXA)(ctx->exprs) ); 3297 } 3298 if (j == -1) 3299 return 0; /* fail */ 3300 ctxs->reg[reg].tag = RR_ValExpr; 3301 ctxs->reg[reg].arg = j; 3302 break; 3303 } 3304 3305 case DW_CFA_def_cfa_expression: { 3306 DiCursor expr; 3307 len = step_leb128( &instr, 0 ); 3308 expr = instr; 3309 instr = ML_(cur_plus)(instr, len); 3310 if (di->ddump_frames) 3311 VG_(printf)(" DW_CFA_def_cfa_expression ("); 3312 /* Convert the expression into a dag rooted at ctx->exprs index j, 3313 or fail. */ 3314 j = dwarfexpr_to_dag ( ctx, expr, len, False/*!push CFA at start*/, 3315 di->ddump_frames); 3316 if (di->ddump_frames) 3317 VG_(printf)(")\n"); 3318 ctxs->cfa_is_regoff = False; 3319 ctxs->cfa_reg = 0; 3320 ctxs->cfa_off = 0; 3321 ctxs->cfa_expr_ix = j; 3322 break; 3323 } 3324 3325 case DW_CFA_GNU_window_save: 3326 /* Ignored. This appears to be sparc-specific; quite why it 3327 turns up in SuSE-supplied x86 .so's beats me. */ 3328 if (di->ddump_frames) 3329 VG_(printf)(" DW_CFA_GNU_window_save\n"); 3330 break; 3331 3332 case DW_CFA_remember_state: 3333 if (di->ddump_frames) 3334 VG_(printf)(" DW_CFA_remember_state\n"); 3335 /* we just checked this at entry, so: */ 3336 vg_assert(ctx->state_sp >= 0 && ctx->state_sp < N_RR_STACK); 3337 ctx->state_sp++; 3338 if (ctx->state_sp == N_RR_STACK) { 3339 /* stack overflow. We're hosed. */ 3340 VG_(message)(Vg_DebugMsg, "DWARF2 CFI reader: N_RR_STACK is " 3341 "too low; increase and recompile."); 3342 return 0; /* indicate failure */ 3343 } else { 3344 VG_(memcpy)(/*dst*/&ctx->state[ctx->state_sp], 3345 /*src*/&ctx->state[ctx->state_sp - 1], 3346 sizeof(ctx->state[ctx->state_sp]) ); 3347 } 3348 break; 3349 3350 case DW_CFA_restore_state: 3351 if (di->ddump_frames) 3352 VG_(printf)(" DW_CFA_restore_state\n"); 3353 /* we just checked this at entry, so: */ 3354 vg_assert(ctx->state_sp >= 0 && ctx->state_sp < N_RR_STACK); 3355 if (ctx->state_sp == 0) { 3356 /* stack undefflow. Give up. */ 3357 return 0; /* indicate failure */ 3358 } else { 3359 /* simply fall back to previous entry */ 3360 ctx->state_sp--; 3361 } 3362 break; 3363 3364 default: 3365 VG_(message)(Vg_DebugMsg, "DWARF2 CFI reader: unhandled CFI " 3366 "instruction 0:%d\n", (Int)lo6); 3367 if (di->ddump_frames) 3368 VG_(printf)(" rci:run_CF_instruction:default\n"); 3369 return 0; /* failure */ 3370 /*NOTREACHED*/ 3371 } 3372 3373 return ML_(cur_minus)(instr, instrIN); 3374 } 3375 3376 3377 /* Show a CFI instruction, and also return its length. Show it as 3378 close as possible (preferably identical) to how GNU binutils 3379 readelf --debug-dump=frames would. */ 3380 3381 static Int show_CF_instruction ( DiCursor instrIN, 3382 const AddressDecodingInfo* adi, 3383 Int code_a_f, Int data_a_f ) 3384 { 3385 Int off, coff, reg, reg2, len; 3386 UInt delta; 3387 Addr loc; 3388 DiCursor instr = instrIN; 3389 UChar instr_0 = ML_(cur_step_UChar)(&instr); 3390 UChar hi2 = (instr_0 >> 6) & 3; 3391 UChar lo6 = instr_0 & 0x3F; 3392 3393 if (0) { 3394 DiCursor tmpi = instrIN; 3395 UInt i_0 = ML_(cur_step_UChar)(&tmpi); 3396 UInt i_1 = ML_(cur_step_UChar)(&tmpi); 3397 UInt i_2 = ML_(cur_step_UChar)(&tmpi); 3398 UInt i_3 = ML_(cur_step_UChar)(&tmpi); 3399 UInt i_4 = ML_(cur_step_UChar)(&tmpi); 3400 UInt i_5 = ML_(cur_step_UChar)(&tmpi); 3401 UInt i_6 = ML_(cur_step_UChar)(&tmpi); 3402 UInt i_7 = ML_(cur_step_UChar)(&tmpi); 3403 VG_(printf)("raw:%x/%x:%x:%x:%x:%x:%x:%x:%x:%x\n", 3404 hi2, lo6, i_0, i_1, i_2, i_3, i_4, i_5, i_6, i_7); 3405 } 3406 3407 if (hi2 == DW_CFA_advance_loc) { 3408 VG_(printf)(" sci:DW_CFA_advance_loc(%d)\n", (Int)lo6); 3409 return ML_(cur_minus)(instr, instrIN); 3410 } 3411 3412 if (hi2 == DW_CFA_offset) { 3413 off = step_leb128( &instr, 0 ); 3414 coff = off * data_a_f; 3415 VG_(printf)(" DW_CFA_offset: r%d at cfa%s%d\n", 3416 (Int)lo6, coff < 0 ? "" : "+", (Int)coff ); 3417 return ML_(cur_minus)(instr, instrIN); 3418 } 3419 3420 if (hi2 == DW_CFA_restore) { 3421 VG_(printf)(" sci:DW_CFA_restore(r%d)\n", (Int)lo6); 3422 return ML_(cur_minus)(instr, instrIN); 3423 } 3424 3425 vg_assert(hi2 == DW_CFA_use_secondary); 3426 3427 switch (lo6) { 3428 3429 case DW_CFA_nop: 3430 VG_(printf)(" DW_CFA_nop\n"); 3431 break; 3432 3433 case DW_CFA_set_loc: 3434 /* WAS: loc = read_Addr(&instr[i]); i+= sizeof(Addr); 3435 (now known to be incorrect -- the address is encoded) */ 3436 loc = step_encoded_Addr(adi, &instr); 3437 VG_(printf)(" sci:DW_CFA_set_loc(%#lx)\n", loc); 3438 break; 3439 3440 case DW_CFA_advance_loc1: 3441 delta = (UInt)ML_(cur_step_UChar)(&instr); 3442 VG_(printf)(" sci:DW_CFA_advance_loc1(%d)\n", delta); 3443 break; 3444 3445 case DW_CFA_advance_loc2: 3446 delta = (UInt)ML_(cur_step_UShort)(&instr); 3447 VG_(printf)(" sci:DW_CFA_advance_loc2(%d)\n", delta); 3448 break; 3449 3450 case DW_CFA_advance_loc4: 3451 delta = (UInt)ML_(cur_step_UInt)(&instr); 3452 VG_(printf)(" DW_CFA_advance_loc4(%d)\n", delta); 3453 break; 3454 3455 case DW_CFA_def_cfa: 3456 reg = step_leb128( &instr, 0 ); 3457 off = step_leb128( &instr, 0 ); 3458 VG_(printf)(" DW_CFA_def_cfa: r%d ofs %d\n", (Int)reg, (Int)off); 3459 break; 3460 3461 case DW_CFA_def_cfa_sf: 3462 reg = step_leb128( &instr, 0 ); 3463 off = step_leb128( &instr, 1 ); 3464 VG_(printf)(" DW_CFA_def_cfa_sf: r%d ofs %d\n", 3465 (Int)reg, (Int)(off * data_a_f)); 3466 break; 3467 3468 case DW_CFA_register: 3469 reg = step_leb128( &instr, 0); 3470 reg2 = step_leb128( &instr, 0); 3471 VG_(printf)(" sci:DW_CFA_register(r%d, r%d)\n", reg, reg2); 3472 break; 3473 3474 case DW_CFA_def_cfa_register: 3475 reg = step_leb128( &instr, 0); 3476 VG_(printf)(" sci:DW_CFA_def_cfa_register(r%d)\n", reg); 3477 break; 3478 3479 case DW_CFA_def_cfa_offset: 3480 off = step_leb128( &instr, 0); 3481 VG_(printf)(" sci:DW_CFA_def_cfa_offset(%d)\n", off); 3482 break; 3483 3484 case DW_CFA_def_cfa_offset_sf: 3485 off = step_leb128( &instr, 1); 3486 VG_(printf)(" sci:DW_CFA_def_cfa_offset_sf(%d)\n", off); 3487 break; 3488 3489 case DW_CFA_restore_extended: 3490 reg = step_leb128( &instr, 0); 3491 VG_(printf)(" sci:DW_CFA_restore_extended(r%d)\n", reg); 3492 break; 3493 3494 case DW_CFA_undefined: 3495 reg = step_leb128( &instr, 0); 3496 VG_(printf)(" sci:DW_CFA_undefined(r%d)\n", reg); 3497 break; 3498 3499 case DW_CFA_same_value: 3500 reg = step_leb128( &instr, 0); 3501 VG_(printf)(" sci:DW_CFA_same_value(r%d)\n", reg); 3502 break; 3503 3504 case DW_CFA_remember_state: 3505 VG_(printf)(" sci:DW_CFA_remember_state\n"); 3506 break; 3507 3508 case DW_CFA_restore_state: 3509 VG_(printf)(" sci:DW_CFA_restore_state\n"); 3510 break; 3511 3512 case DW_CFA_GNU_args_size: 3513 off = step_leb128( &instr, 0 ); 3514 VG_(printf)(" sci:DW_CFA_GNU_args_size(%d)\n", off ); 3515 break; 3516 3517 case DW_CFA_def_cfa_expression: 3518 len = step_leb128( &instr, 0 ); 3519 instr = ML_(cur_plus)(instr, len); 3520 VG_(printf)(" sci:DW_CFA_def_cfa_expression(length %d)\n", len); 3521 break; 3522 3523 case DW_CFA_expression: 3524 reg = step_leb128( &instr, 0 ); 3525 len = step_leb128( &instr, 0 ); 3526 instr = ML_(cur_plus)(instr, len); 3527 VG_(printf)(" sci:DW_CFA_expression(r%d, length %d)\n", reg, len); 3528 break; 3529 3530 case DW_CFA_val_expression: 3531 reg = step_leb128( &instr, 0 ); 3532 len = step_leb128( &instr, 0 ); 3533 instr = ML_(cur_plus)(instr, len); 3534 VG_(printf)(" sci:DW_CFA_val_expression(r%d, length %d)\n", reg, len); 3535 break; 3536 3537 case DW_CFA_offset_extended: 3538 reg = step_leb128( &instr, 0 ); 3539 off = step_leb128( &instr, 0 ); 3540 VG_(printf)(" sci:DW_CFA_offset_extended(r%d, " 3541 "off %d x data_af)\n", reg, off); 3542 break; 3543 3544 case DW_CFA_offset_extended_sf: 3545 reg = step_leb128( &instr, 0 ); 3546 off = step_leb128( &instr, 1 ); 3547 coff = (Int)(off * data_a_f); 3548 VG_(printf)(" DW_CFA_offset_extended_sf: r%d at cfa%s%d\n", 3549 reg, coff < 0 ? "" : "+", coff); 3550 break; 3551 3552 case DW_CFA_GNU_negative_offset_extended: 3553 reg = step_leb128( &instr, 0 ); 3554 off = step_leb128( &instr, 0 ); 3555 VG_(printf)(" sci:DW_CFA_GNU_negative_offset_extended" 3556 "(r%d, off %d x data_af)\n", reg, -off); 3557 break; 3558 3559 case DW_CFA_val_offset: 3560 reg = step_leb128( &instr, 0 ); 3561 off = step_leb128( &instr, 0 ); 3562 VG_(printf)(" sci:DW_CFA_val_offset(r%d, off %d x data_af)\n", 3563 reg, off); 3564 break; 3565 3566 case DW_CFA_val_offset_sf: 3567 reg = step_leb128( &instr, 0 ); 3568 off = step_leb128( &instr, 1 ); 3569 VG_(printf)(" sci:DW_CFA_val_offset_sf(r%d, off %d x data_af)\n", 3570 reg, off); 3571 break; 3572 3573 case DW_CFA_GNU_window_save: 3574 VG_(printf)(" sci:DW_CFA_GNU_window_save\n"); 3575 break; 3576 3577 default: 3578 VG_(printf)(" sci:0:%d\n", (Int)lo6); 3579 break; 3580 } 3581 3582 return ML_(cur_minus)(instr, instrIN); 3583 } 3584 3585 3586 /* Show the instructions in instrs[0 .. ilen-1]. */ 3587 static void show_CF_instructions ( DiCursor instrs, Int ilen, 3588 const AddressDecodingInfo* adi, 3589 Int code_a_f, Int data_a_f ) 3590 { 3591 Int i = 0; 3592 while (True) { 3593 if (i >= ilen) break; 3594 i += show_CF_instruction( ML_(cur_plus)(instrs, i), 3595 adi, code_a_f, data_a_f ); 3596 } 3597 } 3598 3599 3600 /* Run the CF instructions in instrs[0 .. ilen-1], until the end is 3601 reached, or until there is a failure. Return True iff success. 3602 */ 3603 static 3604 Bool run_CF_instructions ( DebugInfo* di, 3605 Bool record, 3606 UnwindContext* ctx, DiCursor instrs, Int ilen, 3607 UWord fde_arange, 3608 const UnwindContext* restore_ctx, 3609 const AddressDecodingInfo* adi ) 3610 { 3611 Addr base; 3612 UInt len; 3613 DiCfSI_m cfsi_m; 3614 Bool summ_ok; 3615 Int j, i = 0; 3616 Addr loc_prev; 3617 if (0) ppUnwindContext(ctx); 3618 if (0) ppUnwindContext_summary(ctx); 3619 while (True) { 3620 loc_prev = ctx->loc; 3621 if (i >= ilen) break; 3622 if (0) (void)show_CF_instruction( ML_(cur_plus)(instrs,i), adi, 3623 ctx->code_a_f, ctx->data_a_f ); 3624 j = run_CF_instruction( ctx, ML_(cur_plus)(instrs,i), 3625 restore_ctx, adi, di ); 3626 if (j == 0) 3627 return False; /* execution failed */ 3628 i += j; 3629 if (0) ppUnwindContext(ctx); 3630 if (record && loc_prev != ctx->loc) { 3631 summ_ok = summarise_context ( &base, &len, &cfsi_m, 3632 loc_prev, ctx, di ); 3633 if (summ_ok) { 3634 ML_(addDiCfSI)(di, base, len, &cfsi_m); 3635 if (di->trace_cfi) 3636 ML_(ppDiCfSI)(di->cfsi_exprs, base, len, &cfsi_m); 3637 } 3638 } 3639 } 3640 if (ctx->loc < fde_arange) { 3641 loc_prev = ctx->loc; 3642 ctx->loc = fde_arange; 3643 if (record) { 3644 summ_ok = summarise_context ( &base, &len, &cfsi_m, 3645 loc_prev, ctx, di ); 3646 if (summ_ok) { 3647 ML_(addDiCfSI)(di, base, len, &cfsi_m); 3648 if (di->trace_cfi) 3649 ML_(ppDiCfSI)(di->cfsi_exprs, base, len, &cfsi_m); 3650 } 3651 } 3652 } 3653 return True; 3654 } 3655 3656 3657 /* ------------ Main entry point for CFI reading ------------ */ 3658 3659 typedef 3660 struct { 3661 /* This gives the CIE an identity to which FDEs will refer. */ 3662 ULong offset; 3663 /* Code, data factors. */ 3664 Int code_a_f; 3665 Int data_a_f; 3666 /* Return-address pseudo-register. */ 3667 Int ra_reg; 3668 UChar address_encoding; 3669 /* Where are the instrs? */ 3670 DiCursor instrs; 3671 Int ilen; 3672 /* God knows .. don't ask */ 3673 Bool saw_z_augmentation; 3674 } 3675 CIE; 3676 3677 static void init_CIE ( CIE* cie ) 3678 { 3679 cie->offset = 0; 3680 cie->code_a_f = 0; 3681 cie->data_a_f = 0; 3682 cie->ra_reg = 0; 3683 cie->address_encoding = 0; 3684 cie->instrs = DiCursor_INVALID; 3685 cie->ilen = 0; 3686 cie->saw_z_augmentation = False; 3687 } 3688 3689 static CIE *the_CIEs = NULL; 3690 static SizeT N_CIEs = 0; 3691 3692 /* Read, summarise and store CFA unwind info from .eh_frame and 3693 .debug_frame sections. is_ehframe tells us which kind we are 3694 dealing with -- they are slightly different. */ 3695 void ML_(read_callframe_info_dwarf3) 3696 ( /*OUT*/struct _DebugInfo* di, 3697 DiSlice escn_frame, Addr frame_avma, Bool is_ehframe ) 3698 { 3699 const HChar* how = NULL; 3700 Int n_CIEs = 0; 3701 DiCursor frame_image = ML_(cur_from_sli)(escn_frame); /* fixed */ 3702 DiOffT frame_size = escn_frame.szB; 3703 DiCursor data = frame_image; 3704 UWord cfsi_used_orig; 3705 3706 /* If we're dealing with a .debug_frame, assume zero frame_avma. */ 3707 if (!is_ehframe) 3708 vg_assert(frame_avma == 0); 3709 3710 # if defined(VGP_ppc32_linux) || defined(VGP_ppc64be_linux) \ 3711 || defined(VGP_ppc64le_linux) 3712 /* These targets don't use CFI-based stack unwinding. */ 3713 return; 3714 # endif 3715 3716 /* If we read more than one .debug_frame or .eh_frame for this 3717 DebugInfo*, the second and subsequent reads should only add FDEs 3718 for address ranges not already covered by the FDEs already 3719 present. To be able to quickly check which address ranges are 3720 already present, any existing records (DiCFSIs) must be sorted, 3721 so we can binary-search them in the code below. We also record 3722 di->cfsi_used so that we know where the boundary is between 3723 existing and new records. */ 3724 if (di->cfsi_used > 0) { 3725 ML_(canonicaliseCFI) ( di ); 3726 } 3727 cfsi_used_orig = di->cfsi_used; 3728 3729 if (di->trace_cfi) { 3730 VG_(printf)("\n-----------------------------------------------\n"); 3731 VG_(printf)("CFI info: szB %lld, _avma %#lx\n", 3732 escn_frame.szB, frame_avma ); 3733 VG_(printf)("CFI info: name %s\n", di->fsm.filename ); 3734 } 3735 3736 /* Loop over CIEs/FDEs */ 3737 3738 /* Conceptually, the frame info is a sequence of FDEs, one for each 3739 function. Inside an FDE is a miniature program for a special 3740 state machine, which, when run, produces the stack-unwinding 3741 info for that function. 3742 3743 Because the FDEs typically have much in common, and because the 3744 DWARF designers appear to have been fanatical about space 3745 saving, the common parts are factored out into so-called CIEs. 3746 That means that what we traverse is a sequence of structs, each 3747 of which is either a FDE (usually) or a CIE (occasionally). 3748 Each FDE has a field indicating which CIE is the one pertaining 3749 to it. 3750 3751 The following loop traverses the sequence. FDEs are dealt with 3752 immediately; once we harvest the useful info in an FDE, it is 3753 then forgotten about. By contrast, CIEs are validated and 3754 dumped into an array, because later FDEs may refer to any 3755 previously-seen CIE. 3756 */ 3757 while (True) { 3758 DiCursor ciefde_start; 3759 ULong ciefde_len; 3760 ULong cie_pointer; 3761 Bool dw64; 3762 3763 /* Are we done? */ 3764 if (ML_(cur_cmpEQ)(data, ML_(cur_plus)(frame_image, frame_size))) 3765 return; 3766 3767 /* Overshot the end? Means something is wrong */ 3768 if (ML_(cur_cmpGT)(data, ML_(cur_plus)(frame_image, frame_size))) { 3769 how = "overran the end of .eh_frame"; 3770 goto bad; 3771 } 3772 3773 /* Ok, we must be looking at the start of a new CIE or FDE. 3774 Figure out which it is. */ 3775 3776 ciefde_start = data; 3777 if (di->trace_cfi) 3778 VG_(printf)("\ncie/fde.start = (frame_image + 0x%llx)\n", 3779 ML_(cur_minus)(ciefde_start, frame_image)); 3780 3781 ciefde_len = (ULong)ML_(cur_step_UInt)(&data); 3782 if (di->trace_cfi) 3783 VG_(printf)("cie/fde.length = %lld\n", ciefde_len); 3784 3785 /* Apparently, if the .length field is zero, we are at the end 3786 of the sequence. This is stated in the Generic Elf 3787 Specification (see comments far above here) and is one of the 3788 places where .eh_frame and .debug_frame data differ. */ 3789 if (ciefde_len == 0) { 3790 if (di->ddump_frames) 3791 VG_(printf)("%08llx ZERO terminator\n\n", 3792 ML_(cur_minus)(ciefde_start, frame_image)); 3793 return; 3794 } 3795 3796 /* If the .length field is 0xFFFFFFFF then we're dealing with 3797 64-bit DWARF, and the real length is stored as a 64-bit 3798 number immediately following it. */ 3799 dw64 = False; 3800 if (ciefde_len == 0xFFFFFFFFUL) { 3801 dw64 = True; 3802 ciefde_len = ML_(cur_step_ULong)(&data); 3803 } 3804 3805 /* Now get the CIE ID, whose size depends on the DWARF 32 vs 3806 64-ness. */ 3807 if (dw64) { 3808 /* see XXX below */ 3809 cie_pointer = ML_(cur_step_ULong)(&data); 3810 } else { 3811 /* see XXX below */ 3812 cie_pointer = (ULong)ML_(cur_step_UInt)(&data); 3813 } 3814 3815 if (di->trace_cfi) 3816 VG_(printf)("cie.pointer = %lld\n", cie_pointer); 3817 3818 /* If cie_pointer is zero for .eh_frame or all ones for .debug_frame, 3819 we've got a CIE; else it's an FDE. */ 3820 if (cie_pointer == (is_ehframe ? 0ULL 3821 : dw64 ? 0xFFFFFFFFFFFFFFFFULL : 0xFFFFFFFFULL)) { 3822 3823 Int this_CIE; 3824 UChar cie_version; 3825 DiCursor cie_augmentation; 3826 3827 /* --------- CIE --------- */ 3828 if (di->trace_cfi) 3829 VG_(printf)("------ new CIE #%d ------\n", n_CIEs); 3830 3831 /* Allocate a new CIE record. */ 3832 vg_assert(n_CIEs >= 0); 3833 if (n_CIEs == N_CIEs) { 3834 N_CIEs += 1000; 3835 the_CIEs = ML_(dinfo_realloc)("di.rcid3.2", the_CIEs, 3836 N_CIEs * sizeof the_CIEs[0]); 3837 } 3838 3839 this_CIE = n_CIEs; 3840 n_CIEs++; 3841 init_CIE( &the_CIEs[this_CIE] ); 3842 3843 /* Record its offset. This is how we will find it again 3844 later when looking at an FDE. */ 3845 the_CIEs[this_CIE].offset 3846 = (ULong)ML_(cur_minus)(ciefde_start, frame_image); 3847 3848 if (di->ddump_frames) 3849 VG_(printf)("%08lx %08lx %08lx CIE\n", 3850 (Addr)ML_(cur_minus)(ciefde_start, frame_image), 3851 (Addr)ciefde_len, 3852 (Addr)(UWord)cie_pointer ); 3853 3854 cie_version = ML_(cur_step_UChar)(&data); 3855 if (di->trace_cfi) 3856 VG_(printf)("cie.version = %d\n", (Int)cie_version); 3857 if (di->ddump_frames) 3858 VG_(printf)(" Version: %d\n", (Int)cie_version); 3859 if (cie_version != 1 && cie_version != 3 && cie_version != 4) { 3860 how = "unexpected CIE version (not 1 nor 3 nor 4)"; 3861 goto bad; 3862 } 3863 3864 cie_augmentation = data; 3865 data = ML_(cur_plus)(data, 1 + ML_(cur_strlen)(cie_augmentation)); 3866 3867 if (di->trace_cfi || di->ddump_frames) { 3868 HChar* str = ML_(cur_read_strdup)(cie_augmentation, "di.rcid3.1"); 3869 if (di->trace_cfi) 3870 VG_(printf)("cie.augment = \"%s\"\n", str); 3871 if (di->ddump_frames) 3872 VG_(printf)(" Augmentation: \"%s\"\n", str); 3873 ML_(dinfo_free)(str); 3874 } 3875 3876 if (ML_(cur_read_UChar)(cie_augmentation) == 'e' 3877 && ML_(cur_read_UChar) 3878 (ML_(cur_plus)(cie_augmentation, 1)) == 'h') { 3879 data = ML_(cur_plus)(data, sizeof(Addr)); 3880 cie_augmentation = ML_(cur_plus)(cie_augmentation, 2); 3881 } 3882 3883 if (cie_version >= 4) { 3884 if (ML_(cur_step_UChar)(&data) != sizeof(Addr)) { 3885 how = "unexpected address size"; 3886 goto bad; 3887 } 3888 if (ML_(cur_step_UChar)(&data) != 0) { 3889 how = "unexpected non-zero segment size"; 3890 goto bad; 3891 } 3892 } 3893 3894 the_CIEs[this_CIE].code_a_f = step_leb128( &data, 0); 3895 if (di->trace_cfi) 3896 VG_(printf)("cie.code_af = %d\n", 3897 the_CIEs[this_CIE].code_a_f); 3898 if (di->ddump_frames) 3899 VG_(printf)(" Code alignment factor: %d\n", 3900 (Int)the_CIEs[this_CIE].code_a_f); 3901 3902 the_CIEs[this_CIE].data_a_f = step_leb128( &data, 1); 3903 if (di->trace_cfi) 3904 VG_(printf)("cie.data_af = %d\n", 3905 the_CIEs[this_CIE].data_a_f); 3906 if (di->ddump_frames) 3907 VG_(printf)(" Data alignment factor: %d\n", 3908 (Int)the_CIEs[this_CIE].data_a_f); 3909 3910 if (cie_version == 1) { 3911 the_CIEs[this_CIE].ra_reg = (Int)ML_(cur_step_UChar)(&data); 3912 } else { 3913 the_CIEs[this_CIE].ra_reg = step_leb128( &data, 0); 3914 } 3915 if (di->trace_cfi) 3916 VG_(printf)("cie.ra_reg = %d\n", 3917 the_CIEs[this_CIE].ra_reg); 3918 if (di->ddump_frames) 3919 VG_(printf)(" Return address column: %d\n", 3920 (Int)the_CIEs[this_CIE].ra_reg); 3921 3922 if (the_CIEs[this_CIE].ra_reg < 0 3923 || the_CIEs[this_CIE].ra_reg >= N_CFI_REGS) { 3924 how = "cie.ra_reg has implausible value"; 3925 goto bad; 3926 } 3927 3928 the_CIEs[this_CIE].saw_z_augmentation 3929 = ML_(cur_read_UChar)(cie_augmentation) == 'z'; 3930 if (the_CIEs[this_CIE].saw_z_augmentation) { 3931 UInt length = step_leb128( &data, 0); 3932 the_CIEs[this_CIE].instrs = ML_(cur_plus)(data, length); 3933 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1); 3934 if (di->ddump_frames) { 3935 UInt i; 3936 VG_(printf)(" Augmentation data: "); 3937 for (i = 0; i < length; i++) 3938 VG_(printf)(" %02x", (UInt)ML_(cur_read_UChar) 3939 (ML_(cur_plus)(data, i))); 3940 VG_(printf)("\n"); 3941 } 3942 } else { 3943 the_CIEs[this_CIE].instrs = DiCursor_INVALID; 3944 } 3945 3946 the_CIEs[this_CIE].address_encoding = default_Addr_encoding(); 3947 3948 while (ML_(cur_read_UChar)(cie_augmentation)) { 3949 switch (ML_(cur_read_UChar)(cie_augmentation)) { 3950 case 'L': 3951 data = ML_(cur_plus)(data, 1); 3952 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1); 3953 break; 3954 case 'R': 3955 the_CIEs[this_CIE].address_encoding 3956 = ML_(cur_step_UChar)(&data); 3957 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1); 3958 break; 3959 case 'P': 3960 data = ML_(cur_plus)(data, size_of_encoded_Addr( 3961 ML_(cur_read_UChar)(data) )); 3962 data = ML_(cur_plus)(data, 1); 3963 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1); 3964 break; 3965 case 'S': 3966 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1); 3967 break; 3968 default: 3969 if (!ML_(cur_is_valid)(the_CIEs[this_CIE].instrs)) { 3970 how = "unhandled cie.augmentation"; 3971 goto bad; 3972 } 3973 data = the_CIEs[this_CIE].instrs; 3974 goto done_augmentation; 3975 } 3976 } 3977 3978 done_augmentation: 3979 3980 if (di->trace_cfi) 3981 VG_(printf)("cie.encoding = 0x%x\n", 3982 the_CIEs[this_CIE].address_encoding); 3983 3984 the_CIEs[this_CIE].instrs = data; 3985 the_CIEs[this_CIE].ilen = ML_(cur_minus)(ciefde_start, data) 3986 + (Long)ciefde_len + (Long)sizeof(UInt); 3987 if (di->trace_cfi) { 3988 //VG_(printf)("cie.instrs = %p\n", the_CIEs[this_CIE].instrs); 3989 VG_(printf)("cie.ilen = %d\n", the_CIEs[this_CIE].ilen); 3990 } 3991 3992 if (the_CIEs[this_CIE].ilen < 0 3993 || the_CIEs[this_CIE].ilen > frame_size) { 3994 how = "implausible # cie initial insns"; 3995 goto bad; 3996 } 3997 3998 data = ML_(cur_plus)(data, the_CIEs[this_CIE].ilen); 3999 4000 /* Show the CIE's instructions (the preamble for each FDE 4001 that uses this CIE). */ 4002 if (di->ddump_frames) 4003 VG_(printf)("\n"); 4004 4005 if (di->trace_cfi || di->ddump_frames) { 4006 AddressDecodingInfo adi; 4007 adi.encoding = the_CIEs[this_CIE].address_encoding; 4008 adi.ehframe_image = frame_image; 4009 adi.ehframe_avma = frame_avma; 4010 adi.text_bias = di->text_debug_bias; 4011 show_CF_instructions( the_CIEs[this_CIE].instrs, 4012 the_CIEs[this_CIE].ilen, &adi, 4013 the_CIEs[this_CIE].code_a_f, 4014 the_CIEs[this_CIE].data_a_f ); 4015 } 4016 4017 if (di->ddump_frames) 4018 VG_(printf)("\n"); 4019 4020 } else { 4021 4022 AddressDecodingInfo adi; 4023 UnwindContext ctx, restore_ctx; 4024 Int cie; 4025 ULong look_for; 4026 Bool ok; 4027 Addr fde_initloc; 4028 UWord fde_arange; 4029 DiCursor fde_instrs; 4030 Int fde_ilen; 4031 4032 /* --------- FDE --------- */ 4033 4034 /* Find the relevant CIE. The CIE we want is located 4035 cie_pointer bytes back from here. */ 4036 4037 /* re sizeof(UInt) / sizeof(ULong), matches XXX above. */ 4038 if (is_ehframe) 4039 look_for = ML_(cur_minus)(data, frame_image) 4040 - (dw64 ? sizeof(ULong) : sizeof(UInt)) 4041 - cie_pointer; 4042 else 4043 look_for = cie_pointer; 4044 4045 for (cie = 0; cie < n_CIEs; cie++) { 4046 if (0) VG_(printf)("look for %lld %lld\n", 4047 look_for, the_CIEs[cie].offset ); 4048 if (the_CIEs[cie].offset == look_for) 4049 break; 4050 } 4051 vg_assert(cie >= 0 && cie <= n_CIEs); 4052 if (cie == n_CIEs) { 4053 how = "FDE refers to not-findable CIE"; 4054 goto bad; 4055 } 4056 4057 adi.encoding = the_CIEs[cie].address_encoding; 4058 adi.ehframe_image = frame_image; 4059 adi.ehframe_avma = frame_avma; 4060 adi.text_bias = di->text_debug_bias; 4061 fde_initloc = step_encoded_Addr(&adi, &data); 4062 if (di->trace_cfi) 4063 VG_(printf)("fde.initloc = %#lx\n", fde_initloc); 4064 4065 adi.encoding = the_CIEs[cie].address_encoding & 0xf; 4066 adi.ehframe_image = frame_image; 4067 adi.ehframe_avma = frame_avma; 4068 adi.text_bias = di->text_debug_bias; 4069 4070 /* WAS (incorrectly): 4071 fde_arange = read_encoded_Addr(&nbytes, &adi, data); 4072 data += nbytes; 4073 The following corresponds to what binutils/dwarf.c does: 4074 */ 4075 { UInt ptr_size = size_of_encoded_Addr( adi.encoding ); 4076 switch (ptr_size) { 4077 case 8: case 4: case 2: case 1: 4078 fde_arange 4079 = (UWord)step_le_u_encoded_literal(&data, ptr_size); 4080 break; 4081 default: 4082 how = "unknown arange field encoding in FDE"; 4083 goto bad; 4084 } 4085 } 4086 4087 if (di->trace_cfi) 4088 VG_(printf)("fde.arangec = %#lx\n", fde_arange); 4089 4090 if (di->ddump_frames) 4091 VG_(printf)("%08lx %08lx %08lx FDE cie=%08lx pc=%08lx..%08lx\n", 4092 (Addr)ML_(cur_minus)(ciefde_start, frame_image), 4093 (Addr)ciefde_len, 4094 (Addr)(UWord)cie_pointer, 4095 (Addr)look_for, 4096 ((Addr)fde_initloc) - di->text_debug_bias, 4097 ((Addr)fde_initloc) - di->text_debug_bias + fde_arange); 4098 4099 if (the_CIEs[cie].saw_z_augmentation) { 4100 UInt length = step_leb128( &data, 0); 4101 if (di->ddump_frames && (length > 0)) { 4102 UInt i; 4103 VG_(printf)(" Augmentation data: "); 4104 for (i = 0; i < length; i++) 4105 VG_(printf)(" %02x", (UInt)ML_(cur_read_UChar) 4106 (ML_(cur_plus)(data, i))); 4107 VG_(printf)("\n\n"); 4108 } 4109 data = ML_(cur_plus)(data, length); 4110 } 4111 4112 fde_instrs = data; 4113 fde_ilen = ML_(cur_minus)(ciefde_start, data) 4114 + (Long)ciefde_len + (Long)sizeof(UInt); 4115 if (di->trace_cfi) { 4116 //VG_(printf)("fde.instrs = %p\n", fde_instrs); 4117 VG_(printf)("fde.ilen = %d\n", (Int)fde_ilen); 4118 } 4119 4120 if (fde_ilen < 0 || fde_ilen > frame_size) { 4121 how = "implausible # fde insns"; 4122 goto bad; 4123 } 4124 4125 data = ML_(cur_plus)(data, fde_ilen); 4126 4127 /* If this object's DebugInfo* had some DiCFSIs from a 4128 previous .eh_frame or .debug_frame read, we must check 4129 that we're not adding a duplicate. */ 4130 if (cfsi_used_orig > 0) { 4131 Addr a_mid_lo, a_mid_hi; 4132 Word mid, size, 4133 lo = 0, 4134 hi = cfsi_used_orig-1; 4135 while (True) { 4136 /* current unsearched space is from lo to hi, inclusive. */ 4137 if (lo > hi) break; /* not found */ 4138 mid = (lo + hi) / 2; 4139 a_mid_lo = di->cfsi_rd[mid].base; 4140 size = di->cfsi_rd[mid].len; 4141 a_mid_hi = a_mid_lo + size - 1; 4142 vg_assert(a_mid_hi >= a_mid_lo); 4143 if (fde_initloc + fde_arange <= a_mid_lo) { 4144 hi = mid-1; continue; 4145 } 4146 if (fde_initloc > a_mid_hi) { lo = mid+1; continue; } 4147 break; 4148 } 4149 4150 /* The range this .debug_frame FDE covers has been already 4151 covered in .eh_frame section. Don't add it from .debug_frame 4152 section again. */ 4153 if (lo <= hi) 4154 continue; 4155 } 4156 4157 adi.encoding = the_CIEs[cie].address_encoding; 4158 adi.ehframe_image = frame_image; 4159 adi.ehframe_avma = frame_avma; 4160 adi.text_bias = di->text_debug_bias; 4161 4162 if (di->trace_cfi) 4163 show_CF_instructions( fde_instrs, fde_ilen, &adi, 4164 the_CIEs[cie].code_a_f, 4165 the_CIEs[cie].data_a_f ); 4166 4167 initUnwindContext(&ctx); 4168 ctx.code_a_f = the_CIEs[cie].code_a_f; 4169 ctx.data_a_f = the_CIEs[cie].data_a_f; 4170 ctx.initloc = fde_initloc; 4171 ctx.ra_reg = the_CIEs[cie].ra_reg; 4172 ctx.exprs = VG_(newXA)( ML_(dinfo_zalloc), "di.rcid.1", 4173 ML_(dinfo_free), 4174 sizeof(CfiExpr) ); 4175 4176 /* Run the CIE's instructions. Ugly hack: if 4177 --debug-dump=frames is in effect, suppress output for 4178 these instructions since they will already have been shown 4179 at the time the CIE was first encountered. Note, not 4180 thread safe - if this reader is ever made threaded, should 4181 fix properly. */ 4182 { Bool hack = di->ddump_frames; 4183 di->ddump_frames = False; 4184 initUnwindContext(&restore_ctx); 4185 ok = run_CF_instructions( 4186 di, False, &ctx, the_CIEs[cie].instrs, 4187 the_CIEs[cie].ilen, 0, NULL, &adi 4188 ); 4189 di->ddump_frames = hack; 4190 } 4191 /* And now run the instructions for the FDE, starting from 4192 the state created by running the CIE preamble 4193 instructions. */ 4194 if (ok) { 4195 restore_ctx = ctx; 4196 ok = run_CF_instructions( 4197 di, True, &ctx, fde_instrs, fde_ilen, fde_arange, 4198 &restore_ctx, &adi 4199 ); 4200 if (di->ddump_frames) 4201 VG_(printf)("\n"); 4202 } 4203 4204 VG_(deleteXA)( ctx.exprs ); 4205 } 4206 } 4207 4208 return; 4209 4210 bad: 4211 if (!VG_(clo_xml) && VG_(clo_verbosity) > 1) 4212 VG_(message)(Vg_UserMsg, 4213 "Warning: %s in DWARF2 CFI reading\n", how); 4214 return; 4215 } 4216 4217 #endif // defined(VGO_linux) || defined(VGO_darwin) 4218 4219 /*--------------------------------------------------------------------*/ 4220 /*--- end ---*/ 4221 /*--------------------------------------------------------------------*/ 4222
