| /external/v8/src/arm64/ |
| instructions-arm64.cc | 92 // indicate a failure case. Specifically, where the constraints on imm_s are not
97 int64_t imm_s = ImmSetBits(); local
100 // An integer is constructed from the n, imm_s and imm_r bits according to
118 if (imm_s == 0x3F) {
121 uint64_t bits = (1UL << (imm_s + 1)) - 1;
124 if ((imm_s >> 1) == 0x1F) {
128 if ((imm_s & width) == 0) {
130 if ((imm_s & mask) == mask) {
133 uint64_t bits = (1UL << ((imm_s & mask) + 1)) - 1;
|
| assembler-arm64.cc | 2277 unsigned n, imm_s, imm_r; local
[all...] |
| macro-assembler-arm64.cc | 122 unsigned n, imm_s, imm_r; local
123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
125 LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
417 unsigned n, imm_s, imm_r; local
429 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
[all...] |
| /external/vixl/src/vixl/a64/ |
| instructions-a64.cc | 130 // indicate a failure case. Specifically, where the constraints on imm_s are
135 int64_t imm_s = ImmSetBits(); local
138 // An integer is constructed from the n, imm_s and imm_r bits according to
156 if (imm_s == 0x3f) {
159 uint64_t bits = (UINT64_C(1) << (imm_s + 1)) - 1;
162 if ((imm_s >> 1) == 0x1f) {
166 if ((imm_s & width) == 0) {
168 if ((imm_s & mask) == mask) {
171 uint64_t bits = (UINT64_C(1) << ((imm_s & mask) + 1)) - 1;
|
| macro-assembler-a64.cc | 440 unsigned n, imm_s, imm_r; local
457 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
462 dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
757 unsigned n, imm_s, imm_r; local
758 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
760 LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
[all...] |
| /art/compiler/dex/quick/arm64/ |
| target_arm64.cc | 287 unsigned imm_s = (value >> 0) & 0x3f; local
289 // An integer is constructed from the n, imm_s and imm_r bits according to
306 DCHECK_NE(imm_s, 0x3fU);
307 uint64_t bits = bit_mask(imm_s + 1);
310 DCHECK_NE((imm_s >> 1), 0x1fU);
312 if ((imm_s & width) == 0) {
314 DCHECK_NE((imm_s & mask), mask);
315 uint64_t bits = bit_mask((imm_s & mask) + 1);
|
| utility_arm64.cc | 185 unsigned n, imm_s, imm_r; local
187 // Logical immediates are encoded using parameters n, imm_s and imm_r using
231 imm_s = 0x3C;
237 imm_s = ((imm_s_fixed | (set_bits - 1)) & imm_s_mask);
271 return (n << 12 | imm_r << 6 | imm_s);
[all...] |
| /external/valgrind/VEX/priv/ |
| host_arm64_isel.c | 1173 UInt n = 0, imm_s = 0, imm_r = 0; local
[all...] |
