| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.cpp | 51 /// isStoreToStackSlot - If the specified machine instruction is a direct
56 unsigned Mips16InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
|
| MipsSEInstrInfo.cpp | 58 /// isStoreToStackSlot - If the specified machine instruction is a direct
63 unsigned MipsSEInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 60 /// isStoreToStackSlot - If the specified machine instruction is a direct
65 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
|
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.cpp | 79 /// isStoreToStackSlot - If the specified machine instruction is a direct
85 XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 159 /// isStoreToStackSlot - If the specified machine instruction is a direct
164 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
180 /// reference. If not, return false. Unlike isStoreToStackSlot,
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | 95 /// isStoreToStackSlot - If the specified machine instruction is a direct
100 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 199 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
848 // update isStoreToStackSlot.
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 211 unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
