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      1 
      2 /*---------------------------------------------------------------*/
      3 /*--- begin             Tilegx disassembler   tilegx-disasm.c ---*/
      4 /*---------------------------------------------------------------*/
      5 
      6 /*
      7    This file is part of Valgrind, a dynamic binary instrumentation
      8    framework.
      9 
     10    Copyright Tilera Corp. 2010-2013
     11 
     12    This program is free software; you can redistribute it and/or
     13    modify it under the terms of the GNU General Public License as
     14    published by the Free Software Foundation; either version 2 of the
     15    License, or (at your option) any later version.
     16 
     17    This program is distributed in the hope that it will be useful, but
     18    WITHOUT ANY WARRANTY; without even the implied warranty of
     19    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     20    General Public License for more details.
     21 
     22    You should have received a copy of the GNU General Public License
     23    along with this program; if not, write to the Free Software
     24    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
     25    02110-1301, USA.
     26 
     27    The GNU General Public License is contained in the file COPYING.
     28 */
     29 
     30  /* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
     31 
     32 #include "tilegx_disasm.h"
     33 #include <stdarg.h>
     34 
     35 /* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */
     36 #define BFD_RELOC(x) -1
     37 
     38 /* Special registers. */
     39 #define TREG_LR 55
     40 #define TREG_SN 56
     41 #define TREG_ZERO 63
     42 
     43 #ifndef NULL
     44 #define NULL  0
     45 #endif
     46 
     47 const struct tilegx_opcode tilegx_opcodes[336] =
     48 {
     49  { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
     50     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
     51 #ifndef DISASM_ONLY
     52     {
     53       0ULL,
     54       0xffffffff80000000ULL,
     55       0ULL,
     56       0ULL,
     57       0ULL
     58     },
     59     {
     60       -1ULL,
     61       0x286a44ae00000000ULL,
     62       -1ULL,
     63       -1ULL,
     64       -1ULL
     65     }
     66 #endif
     67   },
     68   { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
     69     { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } },
     70 #ifndef DISASM_ONLY
     71     {
     72       0xc00000007ff00fffULL,
     73       0xfff807ff80000000ULL,
     74       0x0000000078000fffULL,
     75       0x3c0007ff80000000ULL,
     76       0ULL
     77     },
     78     {
     79       0x0000000040300fffULL,
     80       0x181807ff80000000ULL,
     81       0x0000000010000fffULL,
     82       0x0c0007ff80000000ULL,
     83       -1ULL
     84     }
     85 #endif
     86   },
     87   { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
     88     { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } },
     89 #ifndef DISASM_ONLY
     90     {
     91       0xc000000070000fffULL,
     92       0xf80007ff80000000ULL,
     93       0ULL,
     94       0ULL,
     95       0ULL
     96     },
     97     {
     98       0x0000000070000fffULL,
     99       0x380007ff80000000ULL,
    100       -1ULL,
    101       -1ULL,
    102       -1ULL
    103     }
    104 #endif
    105   },
    106   { "ld4s_tls", TILEGX_OPC_LD4S_TLS, 0x2, 3, TREG_ZERO, 1,
    107     { { 0, }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
    108 #ifndef DISASM_ONLY
    109     {
    110       0ULL,
    111       0xfffff80000000000ULL,
    112       0ULL,
    113       0ULL,
    114       0ULL
    115     },
    116     {
    117       -1ULL,
    118       0x1858000000000000ULL,
    119       -1ULL,
    120       -1ULL,
    121       -1ULL
    122     }
    123 #endif
    124   },
    125   { "ld_tls", TILEGX_OPC_LD_TLS, 0x2, 3, TREG_ZERO, 1,
    126     { { 0, }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
    127 #ifndef DISASM_ONLY
    128     {
    129       0ULL,
    130       0xfffff80000000000ULL,
    131       0ULL,
    132       0ULL,
    133       0ULL
    134     },
    135     {
    136       -1ULL,
    137       0x18a0000000000000ULL,
    138       -1ULL,
    139       -1ULL,
    140       -1ULL
    141     }
    142 #endif
    143   },
    144   { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
    145     { { 8, 9 }, { 6, 7 }, { 10, 11 }, { 12, 13 }, { 0, } },
    146 #ifndef DISASM_ONLY
    147     {
    148       0xc00000007ffff000ULL,
    149       0xfffff80000000000ULL,
    150       0x00000000780ff000ULL,
    151       0x3c07f80000000000ULL,
    152       0ULL
    153     },
    154     {
    155       0x000000005107f000ULL,
    156       0x283bf80000000000ULL,
    157       0x00000000500bf000ULL,
    158       0x2c05f80000000000ULL,
    159       -1ULL
    160     }
    161 #endif
    162   },
    163   { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
    164     { { 8, 0 }, { 6, 1 }, { 10, 2 }, { 12, 3 }, { 0, } },
    165 #ifndef DISASM_ONLY
    166     {
    167       0xc00000007ff00fc0ULL,
    168       0xfff807e000000000ULL,
    169       0x0000000078000fc0ULL,
    170       0x3c0007e000000000ULL,
    171       0ULL
    172     },
    173     {
    174       0x0000000040100fc0ULL,
    175       0x180807e000000000ULL,
    176       0x0000000000000fc0ULL,
    177       0x040007e000000000ULL,
    178       -1ULL
    179     }
    180 #endif
    181   },
    182   { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
    183     { { 8, 4 }, { 6, 5 }, { 0, }, { 0, }, { 0, } },
    184 #ifndef DISASM_ONLY
    185     {
    186       0xc000000070000fc0ULL,
    187       0xf80007e000000000ULL,
    188       0ULL,
    189       0ULL,
    190       0ULL
    191     },
    192     {
    193       0x0000000010000fc0ULL,
    194       0x000007e000000000ULL,
    195       -1ULL,
    196       -1ULL,
    197       -1ULL
    198     }
    199 #endif
    200   },
    201   { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
    202     { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
    203 #ifndef DISASM_ONLY
    204     {
    205       0ULL,
    206       0xfffff81f80000000ULL,
    207       0ULL,
    208       0ULL,
    209       0xc3f8000004000000ULL
    210     },
    211     {
    212       -1ULL,
    213       0x286a801f80000000ULL,
    214       -1ULL,
    215       -1ULL,
    216       0x41f8000004000000ULL
    217     }
    218 #endif
    219   },
    220   { "prefetch_add_l1", TILEGX_OPC_PREFETCH_ADD_L1, 0x2, 2, TREG_ZERO, 1,
    221     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
    222 #ifndef DISASM_ONLY
    223     {
    224       0ULL,
    225       0xfff8001f80000000ULL,
    226       0ULL,
    227       0ULL,
    228       0ULL
    229     },
    230     {
    231       -1ULL,
    232       0x1840001f80000000ULL,
    233       -1ULL,
    234       -1ULL,
    235       -1ULL
    236     }
    237 #endif
    238   },
    239   { "prefetch_add_l1_fault", TILEGX_OPC_PREFETCH_ADD_L1_FAULT, 0x2, 2, TREG_ZERO, 1,
    240     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
    241 #ifndef DISASM_ONLY
    242     {
    243       0ULL,
    244       0xfff8001f80000000ULL,
    245       0ULL,
    246       0ULL,
    247       0ULL
    248     },
    249     {
    250       -1ULL,
    251       0x1838001f80000000ULL,
    252       -1ULL,
    253       -1ULL,
    254       -1ULL
    255     }
    256 #endif
    257   },
    258   { "prefetch_add_l2", TILEGX_OPC_PREFETCH_ADD_L2, 0x2, 2, TREG_ZERO, 1,
    259     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
    260 #ifndef DISASM_ONLY
    261     {
    262       0ULL,
    263       0xfff8001f80000000ULL,
    264       0ULL,
    265       0ULL,
    266       0ULL
    267     },
    268     {
    269       -1ULL,
    270       0x1850001f80000000ULL,
    271       -1ULL,
    272       -1ULL,
    273       -1ULL
    274     }
    275 #endif
    276   },
    277   { "prefetch_add_l2_fault", TILEGX_OPC_PREFETCH_ADD_L2_FAULT, 0x2, 2, TREG_ZERO, 1,
    278     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
    279 #ifndef DISASM_ONLY
    280     {
    281       0ULL,
    282       0xfff8001f80000000ULL,
    283       0ULL,
    284       0ULL,
    285       0ULL
    286     },
    287     {
    288       -1ULL,
    289       0x1848001f80000000ULL,
    290       -1ULL,
    291       -1ULL,
    292       -1ULL
    293     }
    294 #endif
    295   },
    296   { "prefetch_add_l3", TILEGX_OPC_PREFETCH_ADD_L3, 0x2, 2, TREG_ZERO, 1,
    297     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
    298 #ifndef DISASM_ONLY
    299     {
    300       0ULL,
    301       0xfff8001f80000000ULL,
    302       0ULL,
    303       0ULL,
    304       0ULL
    305     },
    306     {
    307       -1ULL,
    308       0x1860001f80000000ULL,
    309       -1ULL,
    310       -1ULL,
    311       -1ULL
    312     }
    313 #endif
    314   },
    315   { "prefetch_add_l3_fault", TILEGX_OPC_PREFETCH_ADD_L3_FAULT, 0x2, 2, TREG_ZERO, 1,
    316     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
    317 #ifndef DISASM_ONLY
    318     {
    319       0ULL,
    320       0xfff8001f80000000ULL,
    321       0ULL,
    322       0ULL,
    323       0ULL
    324     },
    325     {
    326       -1ULL,
    327       0x1858001f80000000ULL,
    328       -1ULL,
    329       -1ULL,
    330       -1ULL
    331     }
    332 #endif
    333   },
    334   { "prefetch_l1", TILEGX_OPC_PREFETCH_L1, 0x12, 1, TREG_ZERO, 1,
    335     { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
    336 #ifndef DISASM_ONLY
    337     {
    338       0ULL,
    339       0xfffff81f80000000ULL,
    340       0ULL,
    341       0ULL,
    342       0xc3f8000004000000ULL
    343     },
    344     {
    345       -1ULL,
    346       0x286a801f80000000ULL,
    347       -1ULL,
    348       -1ULL,
    349       0x41f8000004000000ULL
    350     }
    351 #endif
    352   },
    353   { "prefetch_l1_fault", TILEGX_OPC_PREFETCH_L1_FAULT, 0x12, 1, TREG_ZERO, 1,
    354     { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
    355 #ifndef DISASM_ONLY
    356     {
    357       0ULL,
    358       0xfffff81f80000000ULL,
    359       0ULL,
    360       0ULL,
    361       0xc3f8000004000000ULL
    362     },
    363     {
    364       -1ULL,
    365       0x286a781f80000000ULL,
    366       -1ULL,
    367       -1ULL,
    368       0x41f8000000000000ULL
    369     }
    370 #endif
    371   },
    372   { "prefetch_l2", TILEGX_OPC_PREFETCH_L2, 0x12, 1, TREG_ZERO, 1,
    373     { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
    374 #ifndef DISASM_ONLY
    375     {
    376       0ULL,
    377       0xfffff81f80000000ULL,
    378       0ULL,
    379       0ULL,
    380       0xc3f8000004000000ULL
    381     },
    382     {
    383       -1ULL,
    384       0x286a901f80000000ULL,
    385       -1ULL,
    386       -1ULL,
    387       0x43f8000004000000ULL
    388     }
    389 #endif
    390   },
    391   { "prefetch_l2_fault", TILEGX_OPC_PREFETCH_L2_FAULT, 0x12, 1, TREG_ZERO, 1,
    392     { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
    393 #ifndef DISASM_ONLY
    394     {
    395       0ULL,
    396       0xfffff81f80000000ULL,
    397       0ULL,
    398       0ULL,
    399       0xc3f8000004000000ULL
    400     },
    401     {
    402       -1ULL,
    403       0x286a881f80000000ULL,
    404       -1ULL,
    405       -1ULL,
    406       0x43f8000000000000ULL
    407     }
    408 #endif
    409   },
    410   { "prefetch_l3", TILEGX_OPC_PREFETCH_L3, 0x12, 1, TREG_ZERO, 1,
    411     { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
    412 #ifndef DISASM_ONLY
    413     {
    414       0ULL,
    415       0xfffff81f80000000ULL,
    416       0ULL,
    417       0ULL,
    418       0xc3f8000004000000ULL
    419     },
    420     {
    421       -1ULL,
    422       0x286aa01f80000000ULL,
    423       -1ULL,
    424       -1ULL,
    425       0x83f8000000000000ULL
    426     }
    427 #endif
    428   },
    429   { "prefetch_l3_fault", TILEGX_OPC_PREFETCH_L3_FAULT, 0x12, 1, TREG_ZERO, 1,
    430     { { 0, }, { 7 }, { 0, }, { 0, }, { 14 } },
    431 #ifndef DISASM_ONLY
    432     {
    433       0ULL,
    434       0xfffff81f80000000ULL,
    435       0ULL,
    436       0ULL,
    437       0xc3f8000004000000ULL
    438     },
    439     {
    440       -1ULL,
    441       0x286a981f80000000ULL,
    442       -1ULL,
    443       -1ULL,
    444       0x81f8000004000000ULL
    445     }
    446 #endif
    447   },
    448   { "raise", TILEGX_OPC_RAISE, 0x2, 0, TREG_ZERO, 1,
    449     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
    450 #ifndef DISASM_ONLY
    451     {
    452       0ULL,
    453       0xffffffff80000000ULL,
    454       0ULL,
    455       0ULL,
    456       0ULL
    457     },
    458     {
    459       -1ULL,
    460       0x286a44ae80000000ULL,
    461       -1ULL,
    462       -1ULL,
    463       -1ULL
    464     }
    465 #endif
    466   },
    467   { "add", TILEGX_OPC_ADD, 0xf, 3, TREG_ZERO, 1,
    468     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
    469 #ifndef DISASM_ONLY
    470     {
    471       0xc00000007ffc0000ULL,
    472       0xfffe000000000000ULL,
    473       0x00000000780c0000ULL,
    474       0x3c06000000000000ULL,
    475       0ULL
    476     },
    477     {
    478       0x00000000500c0000ULL,
    479       0x2806000000000000ULL,
    480       0x0000000028040000ULL,
    481       0x1802000000000000ULL,
    482       -1ULL
    483     }
    484 #endif
    485   },
    486   { "addi", TILEGX_OPC_ADDI, 0xf, 3, TREG_ZERO, 1,
    487     { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
    488 #ifndef DISASM_ONLY
    489     {
    490       0xc00000007ff00000ULL,
    491       0xfff8000000000000ULL,
    492       0x0000000078000000ULL,
    493       0x3c00000000000000ULL,
    494       0ULL
    495     },
    496     {
    497       0x0000000040100000ULL,
    498       0x1808000000000000ULL,
    499       0ULL,
    500       0x0400000000000000ULL,
    501       -1ULL
    502     }
    503 #endif
    504   },
    505   { "addli", TILEGX_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1,
    506     { { 8, 9, 4 }, { 6, 7, 5 }, { 0, }, { 0, }, { 0, } },
    507 #ifndef DISASM_ONLY
    508     {
    509       0xc000000070000000ULL,
    510       0xf800000000000000ULL,
    511       0ULL,
    512       0ULL,
    513       0ULL
    514     },
    515     {
    516       0x0000000010000000ULL,
    517       0ULL,
    518       -1ULL,
    519       -1ULL,
    520       -1ULL
    521     }
    522 #endif
    523   },
    524   { "addx", TILEGX_OPC_ADDX, 0xf, 3, TREG_ZERO, 1,
    525     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
    526 #ifndef DISASM_ONLY
    527     {
    528       0xc00000007ffc0000ULL,
    529       0xfffe000000000000ULL,
    530       0x00000000780c0000ULL,
    531       0x3c06000000000000ULL,
    532       0ULL
    533     },
    534     {
    535       0x0000000050080000ULL,
    536       0x2804000000000000ULL,
    537       0x0000000028000000ULL,
    538       0x1800000000000000ULL,
    539       -1ULL
    540     }
    541 #endif
    542   },
    543   { "addxi", TILEGX_OPC_ADDXI, 0xf, 3, TREG_ZERO, 1,
    544     { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
    545 #ifndef DISASM_ONLY
    546     {
    547       0xc00000007ff00000ULL,
    548       0xfff8000000000000ULL,
    549       0x0000000078000000ULL,
    550       0x3c00000000000000ULL,
    551       0ULL
    552     },
    553     {
    554       0x0000000040200000ULL,
    555       0x1810000000000000ULL,
    556       0x0000000008000000ULL,
    557       0x0800000000000000ULL,
    558       -1ULL
    559     }
    560 #endif
    561   },
    562   { "addxli", TILEGX_OPC_ADDXLI, 0x3, 3, TREG_ZERO, 1,
    563     { { 8, 9, 4 }, { 6, 7, 5 }, { 0, }, { 0, }, { 0, } },
    564 #ifndef DISASM_ONLY
    565     {
    566       0xc000000070000000ULL,
    567       0xf800000000000000ULL,
    568       0ULL,
    569       0ULL,
    570       0ULL
    571     },
    572     {
    573       0x0000000020000000ULL,
    574       0x0800000000000000ULL,
    575       -1ULL,
    576       -1ULL,
    577       -1ULL
    578     }
    579 #endif
    580   },
    581   { "addxsc", TILEGX_OPC_ADDXSC, 0x3, 3, TREG_ZERO, 1,
    582     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
    583 #ifndef DISASM_ONLY
    584     {
    585       0xc00000007ffc0000ULL,
    586       0xfffe000000000000ULL,
    587       0ULL,
    588       0ULL,
    589       0ULL
    590     },
    591     {
    592       0x0000000050040000ULL,
    593       0x2802000000000000ULL,
    594       -1ULL,
    595       -1ULL,
    596       -1ULL
    597     }
    598 #endif
    599   },
    600   { "and", TILEGX_OPC_AND, 0xf, 3, TREG_ZERO, 1,
    601     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
    602 #ifndef DISASM_ONLY
    603     {
    604       0xc00000007ffc0000ULL,
    605       0xfffe000000000000ULL,
    606       0x00000000780c0000ULL,
    607       0x3c06000000000000ULL,
    608       0ULL
    609     },
    610     {
    611       0x0000000050100000ULL,
    612       0x2808000000000000ULL,
    613       0x0000000050000000ULL,
    614       0x2c00000000000000ULL,
    615       -1ULL
    616     }
    617 #endif
    618   },
    619   { "andi", TILEGX_OPC_ANDI, 0xf, 3, TREG_ZERO, 1,
    620     { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
    621 #ifndef DISASM_ONLY
    622     {
    623       0xc00000007ff00000ULL,
    624       0xfff8000000000000ULL,
    625       0x0000000078000000ULL,
    626       0x3c00000000000000ULL,
    627       0ULL
    628     },
    629     {
    630       0x0000000040300000ULL,
    631       0x1818000000000000ULL,
    632       0x0000000010000000ULL,
    633       0x0c00000000000000ULL,
    634       -1ULL
    635     }
    636 #endif
    637   },
    638   { "beqz", TILEGX_OPC_BEQZ, 0x2, 2, TREG_ZERO, 1,
    639     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    640 #ifndef DISASM_ONLY
    641     {
    642       0ULL,
    643       0xffc0000000000000ULL,
    644       0ULL,
    645       0ULL,
    646       0ULL
    647     },
    648     {
    649       -1ULL,
    650       0x1440000000000000ULL,
    651       -1ULL,
    652       -1ULL,
    653       -1ULL
    654     }
    655 #endif
    656   },
    657   { "beqzt", TILEGX_OPC_BEQZT, 0x2, 2, TREG_ZERO, 1,
    658     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    659 #ifndef DISASM_ONLY
    660     {
    661       0ULL,
    662       0xffc0000000000000ULL,
    663       0ULL,
    664       0ULL,
    665       0ULL
    666     },
    667     {
    668       -1ULL,
    669       0x1400000000000000ULL,
    670       -1ULL,
    671       -1ULL,
    672       -1ULL
    673     }
    674 #endif
    675   },
    676   { "bfexts", TILEGX_OPC_BFEXTS, 0x1, 4, TREG_ZERO, 1,
    677     { { 8, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
    678 #ifndef DISASM_ONLY
    679     {
    680       0xc00000007f000000ULL,
    681       0ULL,
    682       0ULL,
    683       0ULL,
    684       0ULL
    685     },
    686     {
    687       0x0000000034000000ULL,
    688       -1ULL,
    689       -1ULL,
    690       -1ULL,
    691       -1ULL
    692     }
    693 #endif
    694   },
    695   { "bfextu", TILEGX_OPC_BFEXTU, 0x1, 4, TREG_ZERO, 1,
    696     { { 8, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
    697 #ifndef DISASM_ONLY
    698     {
    699       0xc00000007f000000ULL,
    700       0ULL,
    701       0ULL,
    702       0ULL,
    703       0ULL
    704     },
    705     {
    706       0x0000000035000000ULL,
    707       -1ULL,
    708       -1ULL,
    709       -1ULL,
    710       -1ULL
    711     }
    712 #endif
    713   },
    714   { "bfins", TILEGX_OPC_BFINS, 0x1, 4, TREG_ZERO, 1,
    715     { { 23, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
    716 #ifndef DISASM_ONLY
    717     {
    718       0xc00000007f000000ULL,
    719       0ULL,
    720       0ULL,
    721       0ULL,
    722       0ULL
    723     },
    724     {
    725       0x0000000036000000ULL,
    726       -1ULL,
    727       -1ULL,
    728       -1ULL,
    729       -1ULL
    730     }
    731 #endif
    732   },
    733   { "bgez", TILEGX_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1,
    734     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    735 #ifndef DISASM_ONLY
    736     {
    737       0ULL,
    738       0xffc0000000000000ULL,
    739       0ULL,
    740       0ULL,
    741       0ULL
    742     },
    743     {
    744       -1ULL,
    745       0x14c0000000000000ULL,
    746       -1ULL,
    747       -1ULL,
    748       -1ULL
    749     }
    750 #endif
    751   },
    752   { "bgezt", TILEGX_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1,
    753     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    754 #ifndef DISASM_ONLY
    755     {
    756       0ULL,
    757       0xffc0000000000000ULL,
    758       0ULL,
    759       0ULL,
    760       0ULL
    761     },
    762     {
    763       -1ULL,
    764       0x1480000000000000ULL,
    765       -1ULL,
    766       -1ULL,
    767       -1ULL
    768     }
    769 #endif
    770   },
    771   { "bgtz", TILEGX_OPC_BGTZ, 0x2, 2, TREG_ZERO, 1,
    772     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    773 #ifndef DISASM_ONLY
    774     {
    775       0ULL,
    776       0xffc0000000000000ULL,
    777       0ULL,
    778       0ULL,
    779       0ULL
    780     },
    781     {
    782       -1ULL,
    783       0x1540000000000000ULL,
    784       -1ULL,
    785       -1ULL,
    786       -1ULL
    787     }
    788 #endif
    789   },
    790   { "bgtzt", TILEGX_OPC_BGTZT, 0x2, 2, TREG_ZERO, 1,
    791     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    792 #ifndef DISASM_ONLY
    793     {
    794       0ULL,
    795       0xffc0000000000000ULL,
    796       0ULL,
    797       0ULL,
    798       0ULL
    799     },
    800     {
    801       -1ULL,
    802       0x1500000000000000ULL,
    803       -1ULL,
    804       -1ULL,
    805       -1ULL
    806     }
    807 #endif
    808   },
    809   { "blbc", TILEGX_OPC_BLBC, 0x2, 2, TREG_ZERO, 1,
    810     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    811 #ifndef DISASM_ONLY
    812     {
    813       0ULL,
    814       0xffc0000000000000ULL,
    815       0ULL,
    816       0ULL,
    817       0ULL
    818     },
    819     {
    820       -1ULL,
    821       0x15c0000000000000ULL,
    822       -1ULL,
    823       -1ULL,
    824       -1ULL
    825     }
    826 #endif
    827   },
    828   { "blbct", TILEGX_OPC_BLBCT, 0x2, 2, TREG_ZERO, 1,
    829     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    830 #ifndef DISASM_ONLY
    831     {
    832       0ULL,
    833       0xffc0000000000000ULL,
    834       0ULL,
    835       0ULL,
    836       0ULL
    837     },
    838     {
    839       -1ULL,
    840       0x1580000000000000ULL,
    841       -1ULL,
    842       -1ULL,
    843       -1ULL
    844     }
    845 #endif
    846   },
    847   { "blbs", TILEGX_OPC_BLBS, 0x2, 2, TREG_ZERO, 1,
    848     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    849 #ifndef DISASM_ONLY
    850     {
    851       0ULL,
    852       0xffc0000000000000ULL,
    853       0ULL,
    854       0ULL,
    855       0ULL
    856     },
    857     {
    858       -1ULL,
    859       0x1640000000000000ULL,
    860       -1ULL,
    861       -1ULL,
    862       -1ULL
    863     }
    864 #endif
    865   },
    866   { "blbst", TILEGX_OPC_BLBST, 0x2, 2, TREG_ZERO, 1,
    867     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    868 #ifndef DISASM_ONLY
    869     {
    870       0ULL,
    871       0xffc0000000000000ULL,
    872       0ULL,
    873       0ULL,
    874       0ULL
    875     },
    876     {
    877       -1ULL,
    878       0x1600000000000000ULL,
    879       -1ULL,
    880       -1ULL,
    881       -1ULL
    882     }
    883 #endif
    884   },
    885   { "blez", TILEGX_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1,
    886     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    887 #ifndef DISASM_ONLY
    888     {
    889       0ULL,
    890       0xffc0000000000000ULL,
    891       0ULL,
    892       0ULL,
    893       0ULL
    894     },
    895     {
    896       -1ULL,
    897       0x16c0000000000000ULL,
    898       -1ULL,
    899       -1ULL,
    900       -1ULL
    901     }
    902 #endif
    903   },
    904   { "blezt", TILEGX_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1,
    905     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    906 #ifndef DISASM_ONLY
    907     {
    908       0ULL,
    909       0xffc0000000000000ULL,
    910       0ULL,
    911       0ULL,
    912       0ULL
    913     },
    914     {
    915       -1ULL,
    916       0x1680000000000000ULL,
    917       -1ULL,
    918       -1ULL,
    919       -1ULL
    920     }
    921 #endif
    922   },
    923   { "bltz", TILEGX_OPC_BLTZ, 0x2, 2, TREG_ZERO, 1,
    924     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    925 #ifndef DISASM_ONLY
    926     {
    927       0ULL,
    928       0xffc0000000000000ULL,
    929       0ULL,
    930       0ULL,
    931       0ULL
    932     },
    933     {
    934       -1ULL,
    935       0x1740000000000000ULL,
    936       -1ULL,
    937       -1ULL,
    938       -1ULL
    939     }
    940 #endif
    941   },
    942   { "bltzt", TILEGX_OPC_BLTZT, 0x2, 2, TREG_ZERO, 1,
    943     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    944 #ifndef DISASM_ONLY
    945     {
    946       0ULL,
    947       0xffc0000000000000ULL,
    948       0ULL,
    949       0ULL,
    950       0ULL
    951     },
    952     {
    953       -1ULL,
    954       0x1700000000000000ULL,
    955       -1ULL,
    956       -1ULL,
    957       -1ULL
    958     }
    959 #endif
    960   },
    961   { "bnez", TILEGX_OPC_BNEZ, 0x2, 2, TREG_ZERO, 1,
    962     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    963 #ifndef DISASM_ONLY
    964     {
    965       0ULL,
    966       0xffc0000000000000ULL,
    967       0ULL,
    968       0ULL,
    969       0ULL
    970     },
    971     {
    972       -1ULL,
    973       0x17c0000000000000ULL,
    974       -1ULL,
    975       -1ULL,
    976       -1ULL
    977     }
    978 #endif
    979   },
    980   { "bnezt", TILEGX_OPC_BNEZT, 0x2, 2, TREG_ZERO, 1,
    981     { { 0, }, { 7, 20 }, { 0, }, { 0, }, { 0, } },
    982 #ifndef DISASM_ONLY
    983     {
    984       0ULL,
    985       0xffc0000000000000ULL,
    986       0ULL,
    987       0ULL,
    988       0ULL
    989     },
    990     {
    991       -1ULL,
    992       0x1780000000000000ULL,
    993       -1ULL,
    994       -1ULL,
    995       -1ULL
    996     }
    997 #endif
    998   },
    999   { "clz", TILEGX_OPC_CLZ, 0x5, 2, TREG_ZERO, 1,
   1000     { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
   1001 #ifndef DISASM_ONLY
   1002     {
   1003       0xc00000007ffff000ULL,
   1004       0ULL,
   1005       0x00000000780ff000ULL,
   1006       0ULL,
   1007       0ULL
   1008     },
   1009     {
   1010       0x0000000051481000ULL,
   1011       -1ULL,
   1012       0x00000000300c1000ULL,
   1013       -1ULL,
   1014       -1ULL
   1015     }
   1016 #endif
   1017   },
   1018   { "cmoveqz", TILEGX_OPC_CMOVEQZ, 0x5, 3, TREG_ZERO, 1,
   1019     { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
   1020 #ifndef DISASM_ONLY
   1021     {
   1022       0xc00000007ffc0000ULL,
   1023       0ULL,
   1024       0x00000000780c0000ULL,
   1025       0ULL,
   1026       0ULL
   1027     },
   1028     {
   1029       0x0000000050140000ULL,
   1030       -1ULL,
   1031       0x0000000048000000ULL,
   1032       -1ULL,
   1033       -1ULL
   1034     }
   1035 #endif
   1036   },
   1037   { "cmovnez", TILEGX_OPC_CMOVNEZ, 0x5, 3, TREG_ZERO, 1,
   1038     { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
   1039 #ifndef DISASM_ONLY
   1040     {
   1041       0xc00000007ffc0000ULL,
   1042       0ULL,
   1043       0x00000000780c0000ULL,
   1044       0ULL,
   1045       0ULL
   1046     },
   1047     {
   1048       0x0000000050180000ULL,
   1049       -1ULL,
   1050       0x0000000048040000ULL,
   1051       -1ULL,
   1052       -1ULL
   1053     }
   1054 #endif
   1055   },
   1056   { "cmpeq", TILEGX_OPC_CMPEQ, 0xf, 3, TREG_ZERO, 1,
   1057     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   1058 #ifndef DISASM_ONLY
   1059     {
   1060       0xc00000007ffc0000ULL,
   1061       0xfffe000000000000ULL,
   1062       0x00000000780c0000ULL,
   1063       0x3c06000000000000ULL,
   1064       0ULL
   1065     },
   1066     {
   1067       0x00000000501c0000ULL,
   1068       0x280a000000000000ULL,
   1069       0x0000000040000000ULL,
   1070       0x2404000000000000ULL,
   1071       -1ULL
   1072     }
   1073 #endif
   1074   },
   1075   { "cmpeqi", TILEGX_OPC_CMPEQI, 0xf, 3, TREG_ZERO, 1,
   1076     { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
   1077 #ifndef DISASM_ONLY
   1078     {
   1079       0xc00000007ff00000ULL,
   1080       0xfff8000000000000ULL,
   1081       0x0000000078000000ULL,
   1082       0x3c00000000000000ULL,
   1083       0ULL
   1084     },
   1085     {
   1086       0x0000000040400000ULL,
   1087       0x1820000000000000ULL,
   1088       0x0000000018000000ULL,
   1089       0x1000000000000000ULL,
   1090       -1ULL
   1091     }
   1092 #endif
   1093   },
   1094   { "cmpexch", TILEGX_OPC_CMPEXCH, 0x2, 3, TREG_ZERO, 1,
   1095     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1096 #ifndef DISASM_ONLY
   1097     {
   1098       0ULL,
   1099       0xfffe000000000000ULL,
   1100       0ULL,
   1101       0ULL,
   1102       0ULL
   1103     },
   1104     {
   1105       -1ULL,
   1106       0x280e000000000000ULL,
   1107       -1ULL,
   1108       -1ULL,
   1109       -1ULL
   1110     }
   1111 #endif
   1112   },
   1113   { "cmpexch4", TILEGX_OPC_CMPEXCH4, 0x2, 3, TREG_ZERO, 1,
   1114     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1115 #ifndef DISASM_ONLY
   1116     {
   1117       0ULL,
   1118       0xfffe000000000000ULL,
   1119       0ULL,
   1120       0ULL,
   1121       0ULL
   1122     },
   1123     {
   1124       -1ULL,
   1125       0x280c000000000000ULL,
   1126       -1ULL,
   1127       -1ULL,
   1128       -1ULL
   1129     }
   1130 #endif
   1131   },
   1132   { "cmples", TILEGX_OPC_CMPLES, 0xf, 3, TREG_ZERO, 1,
   1133     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   1134 #ifndef DISASM_ONLY
   1135     {
   1136       0xc00000007ffc0000ULL,
   1137       0xfffe000000000000ULL,
   1138       0x00000000780c0000ULL,
   1139       0x3c06000000000000ULL,
   1140       0ULL
   1141     },
   1142     {
   1143       0x0000000050200000ULL,
   1144       0x2810000000000000ULL,
   1145       0x0000000038000000ULL,
   1146       0x2000000000000000ULL,
   1147       -1ULL
   1148     }
   1149 #endif
   1150   },
   1151   { "cmpleu", TILEGX_OPC_CMPLEU, 0xf, 3, TREG_ZERO, 1,
   1152     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   1153 #ifndef DISASM_ONLY
   1154     {
   1155       0xc00000007ffc0000ULL,
   1156       0xfffe000000000000ULL,
   1157       0x00000000780c0000ULL,
   1158       0x3c06000000000000ULL,
   1159       0ULL
   1160     },
   1161     {
   1162       0x0000000050240000ULL,
   1163       0x2812000000000000ULL,
   1164       0x0000000038040000ULL,
   1165       0x2002000000000000ULL,
   1166       -1ULL
   1167     }
   1168 #endif
   1169   },
   1170   { "cmplts", TILEGX_OPC_CMPLTS, 0xf, 3, TREG_ZERO, 1,
   1171     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   1172 #ifndef DISASM_ONLY
   1173     {
   1174       0xc00000007ffc0000ULL,
   1175       0xfffe000000000000ULL,
   1176       0x00000000780c0000ULL,
   1177       0x3c06000000000000ULL,
   1178       0ULL
   1179     },
   1180     {
   1181       0x0000000050280000ULL,
   1182       0x2814000000000000ULL,
   1183       0x0000000038080000ULL,
   1184       0x2004000000000000ULL,
   1185       -1ULL
   1186     }
   1187 #endif
   1188   },
   1189   { "cmpltsi", TILEGX_OPC_CMPLTSI, 0xf, 3, TREG_ZERO, 1,
   1190     { { 8, 9, 0 }, { 6, 7, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
   1191 #ifndef DISASM_ONLY
   1192     {
   1193       0xc00000007ff00000ULL,
   1194       0xfff8000000000000ULL,
   1195       0x0000000078000000ULL,
   1196       0x3c00000000000000ULL,
   1197       0ULL
   1198     },
   1199     {
   1200       0x0000000040500000ULL,
   1201       0x1828000000000000ULL,
   1202       0x0000000020000000ULL,
   1203       0x1400000000000000ULL,
   1204       -1ULL
   1205     }
   1206 #endif
   1207   },
   1208   { "cmpltu", TILEGX_OPC_CMPLTU, 0xf, 3, TREG_ZERO, 1,
   1209     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   1210 #ifndef DISASM_ONLY
   1211     {
   1212       0xc00000007ffc0000ULL,
   1213       0xfffe000000000000ULL,
   1214       0x00000000780c0000ULL,
   1215       0x3c06000000000000ULL,
   1216       0ULL
   1217     },
   1218     {
   1219       0x00000000502c0000ULL,
   1220       0x2816000000000000ULL,
   1221       0x00000000380c0000ULL,
   1222       0x2006000000000000ULL,
   1223       -1ULL
   1224     }
   1225 #endif
   1226   },
   1227   { "cmpltui", TILEGX_OPC_CMPLTUI, 0x3, 3, TREG_ZERO, 1,
   1228     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   1229 #ifndef DISASM_ONLY
   1230     {
   1231       0xc00000007ff00000ULL,
   1232       0xfff8000000000000ULL,
   1233       0ULL,
   1234       0ULL,
   1235       0ULL
   1236     },
   1237     {
   1238       0x0000000040600000ULL,
   1239       0x1830000000000000ULL,
   1240       -1ULL,
   1241       -1ULL,
   1242       -1ULL
   1243     }
   1244 #endif
   1245   },
   1246   { "cmpne", TILEGX_OPC_CMPNE, 0xf, 3, TREG_ZERO, 1,
   1247     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   1248 #ifndef DISASM_ONLY
   1249     {
   1250       0xc00000007ffc0000ULL,
   1251       0xfffe000000000000ULL,
   1252       0x00000000780c0000ULL,
   1253       0x3c06000000000000ULL,
   1254       0ULL
   1255     },
   1256     {
   1257       0x0000000050300000ULL,
   1258       0x2818000000000000ULL,
   1259       0x0000000040040000ULL,
   1260       0x2406000000000000ULL,
   1261       -1ULL
   1262     }
   1263 #endif
   1264   },
   1265   { "cmul", TILEGX_OPC_CMUL, 0x1, 3, TREG_ZERO, 1,
   1266     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1267 #ifndef DISASM_ONLY
   1268     {
   1269       0xc00000007ffc0000ULL,
   1270       0ULL,
   1271       0ULL,
   1272       0ULL,
   1273       0ULL
   1274     },
   1275     {
   1276       0x00000000504c0000ULL,
   1277       -1ULL,
   1278       -1ULL,
   1279       -1ULL,
   1280       -1ULL
   1281     }
   1282 #endif
   1283   },
   1284   { "cmula", TILEGX_OPC_CMULA, 0x1, 3, TREG_ZERO, 1,
   1285     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1286 #ifndef DISASM_ONLY
   1287     {
   1288       0xc00000007ffc0000ULL,
   1289       0ULL,
   1290       0ULL,
   1291       0ULL,
   1292       0ULL
   1293     },
   1294     {
   1295       0x0000000050380000ULL,
   1296       -1ULL,
   1297       -1ULL,
   1298       -1ULL,
   1299       -1ULL
   1300     }
   1301 #endif
   1302   },
   1303   { "cmulaf", TILEGX_OPC_CMULAF, 0x1, 3, TREG_ZERO, 1,
   1304     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1305 #ifndef DISASM_ONLY
   1306     {
   1307       0xc00000007ffc0000ULL,
   1308       0ULL,
   1309       0ULL,
   1310       0ULL,
   1311       0ULL
   1312     },
   1313     {
   1314       0x0000000050340000ULL,
   1315       -1ULL,
   1316       -1ULL,
   1317       -1ULL,
   1318       -1ULL
   1319     }
   1320 #endif
   1321   },
   1322   { "cmulf", TILEGX_OPC_CMULF, 0x1, 3, TREG_ZERO, 1,
   1323     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1324 #ifndef DISASM_ONLY
   1325     {
   1326       0xc00000007ffc0000ULL,
   1327       0ULL,
   1328       0ULL,
   1329       0ULL,
   1330       0ULL
   1331     },
   1332     {
   1333       0x0000000050400000ULL,
   1334       -1ULL,
   1335       -1ULL,
   1336       -1ULL,
   1337       -1ULL
   1338     }
   1339 #endif
   1340   },
   1341   { "cmulfr", TILEGX_OPC_CMULFR, 0x1, 3, TREG_ZERO, 1,
   1342     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1343 #ifndef DISASM_ONLY
   1344     {
   1345       0xc00000007ffc0000ULL,
   1346       0ULL,
   1347       0ULL,
   1348       0ULL,
   1349       0ULL
   1350     },
   1351     {
   1352       0x00000000503c0000ULL,
   1353       -1ULL,
   1354       -1ULL,
   1355       -1ULL,
   1356       -1ULL
   1357     }
   1358 #endif
   1359   },
   1360   { "cmulh", TILEGX_OPC_CMULH, 0x1, 3, TREG_ZERO, 1,
   1361     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1362 #ifndef DISASM_ONLY
   1363     {
   1364       0xc00000007ffc0000ULL,
   1365       0ULL,
   1366       0ULL,
   1367       0ULL,
   1368       0ULL
   1369     },
   1370     {
   1371       0x0000000050480000ULL,
   1372       -1ULL,
   1373       -1ULL,
   1374       -1ULL,
   1375       -1ULL
   1376     }
   1377 #endif
   1378   },
   1379   { "cmulhr", TILEGX_OPC_CMULHR, 0x1, 3, TREG_ZERO, 1,
   1380     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1381 #ifndef DISASM_ONLY
   1382     {
   1383       0xc00000007ffc0000ULL,
   1384       0ULL,
   1385       0ULL,
   1386       0ULL,
   1387       0ULL
   1388     },
   1389     {
   1390       0x0000000050440000ULL,
   1391       -1ULL,
   1392       -1ULL,
   1393       -1ULL,
   1394       -1ULL
   1395     }
   1396 #endif
   1397   },
   1398   { "crc32_32", TILEGX_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1,
   1399     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1400 #ifndef DISASM_ONLY
   1401     {
   1402       0xc00000007ffc0000ULL,
   1403       0ULL,
   1404       0ULL,
   1405       0ULL,
   1406       0ULL
   1407     },
   1408     {
   1409       0x0000000050500000ULL,
   1410       -1ULL,
   1411       -1ULL,
   1412       -1ULL,
   1413       -1ULL
   1414     }
   1415 #endif
   1416   },
   1417   { "crc32_8", TILEGX_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1,
   1418     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1419 #ifndef DISASM_ONLY
   1420     {
   1421       0xc00000007ffc0000ULL,
   1422       0ULL,
   1423       0ULL,
   1424       0ULL,
   1425       0ULL
   1426     },
   1427     {
   1428       0x0000000050540000ULL,
   1429       -1ULL,
   1430       -1ULL,
   1431       -1ULL,
   1432       -1ULL
   1433     }
   1434 #endif
   1435   },
   1436   { "ctz", TILEGX_OPC_CTZ, 0x5, 2, TREG_ZERO, 1,
   1437     { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
   1438 #ifndef DISASM_ONLY
   1439     {
   1440       0xc00000007ffff000ULL,
   1441       0ULL,
   1442       0x00000000780ff000ULL,
   1443       0ULL,
   1444       0ULL
   1445     },
   1446     {
   1447       0x0000000051482000ULL,
   1448       -1ULL,
   1449       0x00000000300c2000ULL,
   1450       -1ULL,
   1451       -1ULL
   1452     }
   1453 #endif
   1454   },
   1455   { "dblalign", TILEGX_OPC_DBLALIGN, 0x1, 3, TREG_ZERO, 1,
   1456     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1457 #ifndef DISASM_ONLY
   1458     {
   1459       0xc00000007ffc0000ULL,
   1460       0ULL,
   1461       0ULL,
   1462       0ULL,
   1463       0ULL
   1464     },
   1465     {
   1466       0x0000000050640000ULL,
   1467       -1ULL,
   1468       -1ULL,
   1469       -1ULL,
   1470       -1ULL
   1471     }
   1472 #endif
   1473   },
   1474   { "dblalign2", TILEGX_OPC_DBLALIGN2, 0x3, 3, TREG_ZERO, 1,
   1475     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1476 #ifndef DISASM_ONLY
   1477     {
   1478       0xc00000007ffc0000ULL,
   1479       0xfffe000000000000ULL,
   1480       0ULL,
   1481       0ULL,
   1482       0ULL
   1483     },
   1484     {
   1485       0x0000000050580000ULL,
   1486       0x281a000000000000ULL,
   1487       -1ULL,
   1488       -1ULL,
   1489       -1ULL
   1490     }
   1491 #endif
   1492   },
   1493   { "dblalign4", TILEGX_OPC_DBLALIGN4, 0x3, 3, TREG_ZERO, 1,
   1494     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1495 #ifndef DISASM_ONLY
   1496     {
   1497       0xc00000007ffc0000ULL,
   1498       0xfffe000000000000ULL,
   1499       0ULL,
   1500       0ULL,
   1501       0ULL
   1502     },
   1503     {
   1504       0x00000000505c0000ULL,
   1505       0x281c000000000000ULL,
   1506       -1ULL,
   1507       -1ULL,
   1508       -1ULL
   1509     }
   1510 #endif
   1511   },
   1512   { "dblalign6", TILEGX_OPC_DBLALIGN6, 0x3, 3, TREG_ZERO, 1,
   1513     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1514 #ifndef DISASM_ONLY
   1515     {
   1516       0xc00000007ffc0000ULL,
   1517       0xfffe000000000000ULL,
   1518       0ULL,
   1519       0ULL,
   1520       0ULL
   1521     },
   1522     {
   1523       0x0000000050600000ULL,
   1524       0x281e000000000000ULL,
   1525       -1ULL,
   1526       -1ULL,
   1527       -1ULL
   1528     }
   1529 #endif
   1530   },
   1531   { "drain", TILEGX_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0,
   1532     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   1533 #ifndef DISASM_ONLY
   1534     {
   1535       0ULL,
   1536       0xfffff80000000000ULL,
   1537       0ULL,
   1538       0ULL,
   1539       0ULL
   1540     },
   1541     {
   1542       -1ULL,
   1543       0x286a080000000000ULL,
   1544       -1ULL,
   1545       -1ULL,
   1546       -1ULL
   1547     }
   1548 #endif
   1549   },
   1550   { "dtlbpr", TILEGX_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1,
   1551     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   1552 #ifndef DISASM_ONLY
   1553     {
   1554       0ULL,
   1555       0xfffff80000000000ULL,
   1556       0ULL,
   1557       0ULL,
   1558       0ULL
   1559     },
   1560     {
   1561       -1ULL,
   1562       0x286a100000000000ULL,
   1563       -1ULL,
   1564       -1ULL,
   1565       -1ULL
   1566     }
   1567 #endif
   1568   },
   1569   { "exch", TILEGX_OPC_EXCH, 0x2, 3, TREG_ZERO, 1,
   1570     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1571 #ifndef DISASM_ONLY
   1572     {
   1573       0ULL,
   1574       0xfffe000000000000ULL,
   1575       0ULL,
   1576       0ULL,
   1577       0ULL
   1578     },
   1579     {
   1580       -1ULL,
   1581       0x2822000000000000ULL,
   1582       -1ULL,
   1583       -1ULL,
   1584       -1ULL
   1585     }
   1586 #endif
   1587   },
   1588   { "exch4", TILEGX_OPC_EXCH4, 0x2, 3, TREG_ZERO, 1,
   1589     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1590 #ifndef DISASM_ONLY
   1591     {
   1592       0ULL,
   1593       0xfffe000000000000ULL,
   1594       0ULL,
   1595       0ULL,
   1596       0ULL
   1597     },
   1598     {
   1599       -1ULL,
   1600       0x2820000000000000ULL,
   1601       -1ULL,
   1602       -1ULL,
   1603       -1ULL
   1604     }
   1605 #endif
   1606   },
   1607   { "fdouble_add_flags", TILEGX_OPC_FDOUBLE_ADD_FLAGS, 0x1, 3, TREG_ZERO, 1,
   1608     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1609 #ifndef DISASM_ONLY
   1610     {
   1611       0xc00000007ffc0000ULL,
   1612       0ULL,
   1613       0ULL,
   1614       0ULL,
   1615       0ULL
   1616     },
   1617     {
   1618       0x00000000506c0000ULL,
   1619       -1ULL,
   1620       -1ULL,
   1621       -1ULL,
   1622       -1ULL
   1623     }
   1624 #endif
   1625   },
   1626   { "fdouble_addsub", TILEGX_OPC_FDOUBLE_ADDSUB, 0x1, 3, TREG_ZERO, 1,
   1627     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1628 #ifndef DISASM_ONLY
   1629     {
   1630       0xc00000007ffc0000ULL,
   1631       0ULL,
   1632       0ULL,
   1633       0ULL,
   1634       0ULL
   1635     },
   1636     {
   1637       0x0000000050680000ULL,
   1638       -1ULL,
   1639       -1ULL,
   1640       -1ULL,
   1641       -1ULL
   1642     }
   1643 #endif
   1644   },
   1645   { "fdouble_mul_flags", TILEGX_OPC_FDOUBLE_MUL_FLAGS, 0x1, 3, TREG_ZERO, 1,
   1646     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1647 #ifndef DISASM_ONLY
   1648     {
   1649       0xc00000007ffc0000ULL,
   1650       0ULL,
   1651       0ULL,
   1652       0ULL,
   1653       0ULL
   1654     },
   1655     {
   1656       0x0000000050700000ULL,
   1657       -1ULL,
   1658       -1ULL,
   1659       -1ULL,
   1660       -1ULL
   1661     }
   1662 #endif
   1663   },
   1664   { "fdouble_pack1", TILEGX_OPC_FDOUBLE_PACK1, 0x1, 3, TREG_ZERO, 1,
   1665     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1666 #ifndef DISASM_ONLY
   1667     {
   1668       0xc00000007ffc0000ULL,
   1669       0ULL,
   1670       0ULL,
   1671       0ULL,
   1672       0ULL
   1673     },
   1674     {
   1675       0x0000000050740000ULL,
   1676       -1ULL,
   1677       -1ULL,
   1678       -1ULL,
   1679       -1ULL
   1680     }
   1681 #endif
   1682   },
   1683   { "fdouble_pack2", TILEGX_OPC_FDOUBLE_PACK2, 0x1, 3, TREG_ZERO, 1,
   1684     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1685 #ifndef DISASM_ONLY
   1686     {
   1687       0xc00000007ffc0000ULL,
   1688       0ULL,
   1689       0ULL,
   1690       0ULL,
   1691       0ULL
   1692     },
   1693     {
   1694       0x0000000050780000ULL,
   1695       -1ULL,
   1696       -1ULL,
   1697       -1ULL,
   1698       -1ULL
   1699     }
   1700 #endif
   1701   },
   1702   { "fdouble_sub_flags", TILEGX_OPC_FDOUBLE_SUB_FLAGS, 0x1, 3, TREG_ZERO, 1,
   1703     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1704 #ifndef DISASM_ONLY
   1705     {
   1706       0xc00000007ffc0000ULL,
   1707       0ULL,
   1708       0ULL,
   1709       0ULL,
   1710       0ULL
   1711     },
   1712     {
   1713       0x00000000507c0000ULL,
   1714       -1ULL,
   1715       -1ULL,
   1716       -1ULL,
   1717       -1ULL
   1718     }
   1719 #endif
   1720   },
   1721   { "fdouble_unpack_max", TILEGX_OPC_FDOUBLE_UNPACK_MAX, 0x1, 3, TREG_ZERO, 1,
   1722     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1723 #ifndef DISASM_ONLY
   1724     {
   1725       0xc00000007ffc0000ULL,
   1726       0ULL,
   1727       0ULL,
   1728       0ULL,
   1729       0ULL
   1730     },
   1731     {
   1732       0x0000000050800000ULL,
   1733       -1ULL,
   1734       -1ULL,
   1735       -1ULL,
   1736       -1ULL
   1737     }
   1738 #endif
   1739   },
   1740   { "fdouble_unpack_min", TILEGX_OPC_FDOUBLE_UNPACK_MIN, 0x1, 3, TREG_ZERO, 1,
   1741     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1742 #ifndef DISASM_ONLY
   1743     {
   1744       0xc00000007ffc0000ULL,
   1745       0ULL,
   1746       0ULL,
   1747       0ULL,
   1748       0ULL
   1749     },
   1750     {
   1751       0x0000000050840000ULL,
   1752       -1ULL,
   1753       -1ULL,
   1754       -1ULL,
   1755       -1ULL
   1756     }
   1757 #endif
   1758   },
   1759   { "fetchadd", TILEGX_OPC_FETCHADD, 0x2, 3, TREG_ZERO, 1,
   1760     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1761 #ifndef DISASM_ONLY
   1762     {
   1763       0ULL,
   1764       0xfffe000000000000ULL,
   1765       0ULL,
   1766       0ULL,
   1767       0ULL
   1768     },
   1769     {
   1770       -1ULL,
   1771       0x282a000000000000ULL,
   1772       -1ULL,
   1773       -1ULL,
   1774       -1ULL
   1775     }
   1776 #endif
   1777   },
   1778   { "fetchadd4", TILEGX_OPC_FETCHADD4, 0x2, 3, TREG_ZERO, 1,
   1779     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1780 #ifndef DISASM_ONLY
   1781     {
   1782       0ULL,
   1783       0xfffe000000000000ULL,
   1784       0ULL,
   1785       0ULL,
   1786       0ULL
   1787     },
   1788     {
   1789       -1ULL,
   1790       0x2824000000000000ULL,
   1791       -1ULL,
   1792       -1ULL,
   1793       -1ULL
   1794     }
   1795 #endif
   1796   },
   1797   { "fetchaddgez", TILEGX_OPC_FETCHADDGEZ, 0x2, 3, TREG_ZERO, 1,
   1798     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1799 #ifndef DISASM_ONLY
   1800     {
   1801       0ULL,
   1802       0xfffe000000000000ULL,
   1803       0ULL,
   1804       0ULL,
   1805       0ULL
   1806     },
   1807     {
   1808       -1ULL,
   1809       0x2828000000000000ULL,
   1810       -1ULL,
   1811       -1ULL,
   1812       -1ULL
   1813     }
   1814 #endif
   1815   },
   1816   { "fetchaddgez4", TILEGX_OPC_FETCHADDGEZ4, 0x2, 3, TREG_ZERO, 1,
   1817     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1818 #ifndef DISASM_ONLY
   1819     {
   1820       0ULL,
   1821       0xfffe000000000000ULL,
   1822       0ULL,
   1823       0ULL,
   1824       0ULL
   1825     },
   1826     {
   1827       -1ULL,
   1828       0x2826000000000000ULL,
   1829       -1ULL,
   1830       -1ULL,
   1831       -1ULL
   1832     }
   1833 #endif
   1834   },
   1835   { "fetchand", TILEGX_OPC_FETCHAND, 0x2, 3, TREG_ZERO, 1,
   1836     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1837 #ifndef DISASM_ONLY
   1838     {
   1839       0ULL,
   1840       0xfffe000000000000ULL,
   1841       0ULL,
   1842       0ULL,
   1843       0ULL
   1844     },
   1845     {
   1846       -1ULL,
   1847       0x282e000000000000ULL,
   1848       -1ULL,
   1849       -1ULL,
   1850       -1ULL
   1851     }
   1852 #endif
   1853   },
   1854   { "fetchand4", TILEGX_OPC_FETCHAND4, 0x2, 3, TREG_ZERO, 1,
   1855     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1856 #ifndef DISASM_ONLY
   1857     {
   1858       0ULL,
   1859       0xfffe000000000000ULL,
   1860       0ULL,
   1861       0ULL,
   1862       0ULL
   1863     },
   1864     {
   1865       -1ULL,
   1866       0x282c000000000000ULL,
   1867       -1ULL,
   1868       -1ULL,
   1869       -1ULL
   1870     }
   1871 #endif
   1872   },
   1873   { "fetchor", TILEGX_OPC_FETCHOR, 0x2, 3, TREG_ZERO, 1,
   1874     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1875 #ifndef DISASM_ONLY
   1876     {
   1877       0ULL,
   1878       0xfffe000000000000ULL,
   1879       0ULL,
   1880       0ULL,
   1881       0ULL
   1882     },
   1883     {
   1884       -1ULL,
   1885       0x2832000000000000ULL,
   1886       -1ULL,
   1887       -1ULL,
   1888       -1ULL
   1889     }
   1890 #endif
   1891   },
   1892   { "fetchor4", TILEGX_OPC_FETCHOR4, 0x2, 3, TREG_ZERO, 1,
   1893     { { 0, }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   1894 #ifndef DISASM_ONLY
   1895     {
   1896       0ULL,
   1897       0xfffe000000000000ULL,
   1898       0ULL,
   1899       0ULL,
   1900       0ULL
   1901     },
   1902     {
   1903       -1ULL,
   1904       0x2830000000000000ULL,
   1905       -1ULL,
   1906       -1ULL,
   1907       -1ULL
   1908     }
   1909 #endif
   1910   },
   1911   { "finv", TILEGX_OPC_FINV, 0x2, 1, TREG_ZERO, 1,
   1912     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   1913 #ifndef DISASM_ONLY
   1914     {
   1915       0ULL,
   1916       0xfffff80000000000ULL,
   1917       0ULL,
   1918       0ULL,
   1919       0ULL
   1920     },
   1921     {
   1922       -1ULL,
   1923       0x286a180000000000ULL,
   1924       -1ULL,
   1925       -1ULL,
   1926       -1ULL
   1927     }
   1928 #endif
   1929   },
   1930   { "flush", TILEGX_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1,
   1931     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   1932 #ifndef DISASM_ONLY
   1933     {
   1934       0ULL,
   1935       0xfffff80000000000ULL,
   1936       0ULL,
   1937       0ULL,
   1938       0ULL
   1939     },
   1940     {
   1941       -1ULL,
   1942       0x286a280000000000ULL,
   1943       -1ULL,
   1944       -1ULL,
   1945       -1ULL
   1946     }
   1947 #endif
   1948   },
   1949   { "flushwb", TILEGX_OPC_FLUSHWB, 0x2, 0, TREG_ZERO, 1,
   1950     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   1951 #ifndef DISASM_ONLY
   1952     {
   1953       0ULL,
   1954       0xfffff80000000000ULL,
   1955       0ULL,
   1956       0ULL,
   1957       0ULL
   1958     },
   1959     {
   1960       -1ULL,
   1961       0x286a200000000000ULL,
   1962       -1ULL,
   1963       -1ULL,
   1964       -1ULL
   1965     }
   1966 #endif
   1967   },
   1968   { "fnop", TILEGX_OPC_FNOP, 0xf, 0, TREG_ZERO, 1,
   1969     { {  }, {  }, {  }, {  }, { 0, } },
   1970 #ifndef DISASM_ONLY
   1971     {
   1972       0xc00000007ffff000ULL,
   1973       0xfffff80000000000ULL,
   1974       0x00000000780ff000ULL,
   1975       0x3c07f80000000000ULL,
   1976       0ULL
   1977     },
   1978     {
   1979       0x0000000051483000ULL,
   1980       0x286a300000000000ULL,
   1981       0x00000000300c3000ULL,
   1982       0x1c06400000000000ULL,
   1983       -1ULL
   1984     }
   1985 #endif
   1986   },
   1987   { "fsingle_add1", TILEGX_OPC_FSINGLE_ADD1, 0x1, 3, TREG_ZERO, 1,
   1988     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   1989 #ifndef DISASM_ONLY
   1990     {
   1991       0xc00000007ffc0000ULL,
   1992       0ULL,
   1993       0ULL,
   1994       0ULL,
   1995       0ULL
   1996     },
   1997     {
   1998       0x0000000050880000ULL,
   1999       -1ULL,
   2000       -1ULL,
   2001       -1ULL,
   2002       -1ULL
   2003     }
   2004 #endif
   2005   },
   2006   { "fsingle_addsub2", TILEGX_OPC_FSINGLE_ADDSUB2, 0x1, 3, TREG_ZERO, 1,
   2007     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   2008 #ifndef DISASM_ONLY
   2009     {
   2010       0xc00000007ffc0000ULL,
   2011       0ULL,
   2012       0ULL,
   2013       0ULL,
   2014       0ULL
   2015     },
   2016     {
   2017       0x00000000508c0000ULL,
   2018       -1ULL,
   2019       -1ULL,
   2020       -1ULL,
   2021       -1ULL
   2022     }
   2023 #endif
   2024   },
   2025   { "fsingle_mul1", TILEGX_OPC_FSINGLE_MUL1, 0x1, 3, TREG_ZERO, 1,
   2026     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   2027 #ifndef DISASM_ONLY
   2028     {
   2029       0xc00000007ffc0000ULL,
   2030       0ULL,
   2031       0ULL,
   2032       0ULL,
   2033       0ULL
   2034     },
   2035     {
   2036       0x0000000050900000ULL,
   2037       -1ULL,
   2038       -1ULL,
   2039       -1ULL,
   2040       -1ULL
   2041     }
   2042 #endif
   2043   },
   2044   { "fsingle_mul2", TILEGX_OPC_FSINGLE_MUL2, 0x1, 3, TREG_ZERO, 1,
   2045     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   2046 #ifndef DISASM_ONLY
   2047     {
   2048       0xc00000007ffc0000ULL,
   2049       0ULL,
   2050       0ULL,
   2051       0ULL,
   2052       0ULL
   2053     },
   2054     {
   2055       0x0000000050940000ULL,
   2056       -1ULL,
   2057       -1ULL,
   2058       -1ULL,
   2059       -1ULL
   2060     }
   2061 #endif
   2062   },
   2063   { "fsingle_pack1", TILEGX_OPC_FSINGLE_PACK1, 0x5, 2, TREG_ZERO, 1,
   2064     { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
   2065 #ifndef DISASM_ONLY
   2066     {
   2067       0xc00000007ffff000ULL,
   2068       0ULL,
   2069       0x00000000780ff000ULL,
   2070       0ULL,
   2071       0ULL
   2072     },
   2073     {
   2074       0x0000000051484000ULL,
   2075       -1ULL,
   2076       0x00000000300c4000ULL,
   2077       -1ULL,
   2078       -1ULL
   2079     }
   2080 #endif
   2081   },
   2082   { "fsingle_pack2", TILEGX_OPC_FSINGLE_PACK2, 0x1, 3, TREG_ZERO, 1,
   2083     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   2084 #ifndef DISASM_ONLY
   2085     {
   2086       0xc00000007ffc0000ULL,
   2087       0ULL,
   2088       0ULL,
   2089       0ULL,
   2090       0ULL
   2091     },
   2092     {
   2093       0x0000000050980000ULL,
   2094       -1ULL,
   2095       -1ULL,
   2096       -1ULL,
   2097       -1ULL
   2098     }
   2099 #endif
   2100   },
   2101   { "fsingle_sub1", TILEGX_OPC_FSINGLE_SUB1, 0x1, 3, TREG_ZERO, 1,
   2102     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   2103 #ifndef DISASM_ONLY
   2104     {
   2105       0xc00000007ffc0000ULL,
   2106       0ULL,
   2107       0ULL,
   2108       0ULL,
   2109       0ULL
   2110     },
   2111     {
   2112       0x00000000509c0000ULL,
   2113       -1ULL,
   2114       -1ULL,
   2115       -1ULL,
   2116       -1ULL
   2117     }
   2118 #endif
   2119   },
   2120   { "icoh", TILEGX_OPC_ICOH, 0x2, 1, TREG_ZERO, 1,
   2121     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   2122 #ifndef DISASM_ONLY
   2123     {
   2124       0ULL,
   2125       0xfffff80000000000ULL,
   2126       0ULL,
   2127       0ULL,
   2128       0ULL
   2129     },
   2130     {
   2131       -1ULL,
   2132       0x286a380000000000ULL,
   2133       -1ULL,
   2134       -1ULL,
   2135       -1ULL
   2136     }
   2137 #endif
   2138   },
   2139   { "ill", TILEGX_OPC_ILL, 0xa, 0, TREG_ZERO, 1,
   2140     { { 0, }, {  }, { 0, }, {  }, { 0, } },
   2141 #ifndef DISASM_ONLY
   2142     {
   2143       0ULL,
   2144       0xfffff80000000000ULL,
   2145       0ULL,
   2146       0x3c07f80000000000ULL,
   2147       0ULL
   2148     },
   2149     {
   2150       -1ULL,
   2151       0x286a400000000000ULL,
   2152       -1ULL,
   2153       0x1c06480000000000ULL,
   2154       -1ULL
   2155     }
   2156 #endif
   2157   },
   2158   { "inv", TILEGX_OPC_INV, 0x2, 1, TREG_ZERO, 1,
   2159     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   2160 #ifndef DISASM_ONLY
   2161     {
   2162       0ULL,
   2163       0xfffff80000000000ULL,
   2164       0ULL,
   2165       0ULL,
   2166       0ULL
   2167     },
   2168     {
   2169       -1ULL,
   2170       0x286a480000000000ULL,
   2171       -1ULL,
   2172       -1ULL,
   2173       -1ULL
   2174     }
   2175 #endif
   2176   },
   2177   { "iret", TILEGX_OPC_IRET, 0x2, 0, TREG_ZERO, 1,
   2178     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   2179 #ifndef DISASM_ONLY
   2180     {
   2181       0ULL,
   2182       0xfffff80000000000ULL,
   2183       0ULL,
   2184       0ULL,
   2185       0ULL
   2186     },
   2187     {
   2188       -1ULL,
   2189       0x286a500000000000ULL,
   2190       -1ULL,
   2191       -1ULL,
   2192       -1ULL
   2193     }
   2194 #endif
   2195   },
   2196   { "j", TILEGX_OPC_J, 0x2, 1, TREG_ZERO, 1,
   2197     { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } },
   2198 #ifndef DISASM_ONLY
   2199     {
   2200       0ULL,
   2201       0xfc00000000000000ULL,
   2202       0ULL,
   2203       0ULL,
   2204       0ULL
   2205     },
   2206     {
   2207       -1ULL,
   2208       0x2400000000000000ULL,
   2209       -1ULL,
   2210       -1ULL,
   2211       -1ULL
   2212     }
   2213 #endif
   2214   },
   2215   { "jal", TILEGX_OPC_JAL, 0x2, 1, TREG_LR, 1,
   2216     { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } },
   2217 #ifndef DISASM_ONLY
   2218     {
   2219       0ULL,
   2220       0xfc00000000000000ULL,
   2221       0ULL,
   2222       0ULL,
   2223       0ULL
   2224     },
   2225     {
   2226       -1ULL,
   2227       0x2000000000000000ULL,
   2228       -1ULL,
   2229       -1ULL,
   2230       -1ULL
   2231     }
   2232 #endif
   2233   },
   2234   { "jalr", TILEGX_OPC_JALR, 0xa, 1, TREG_LR, 1,
   2235     { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
   2236 #ifndef DISASM_ONLY
   2237     {
   2238       0ULL,
   2239       0xfffff80000000000ULL,
   2240       0ULL,
   2241       0x3c07f80000000000ULL,
   2242       0ULL
   2243     },
   2244     {
   2245       -1ULL,
   2246       0x286a600000000000ULL,
   2247       -1ULL,
   2248       0x1c06580000000000ULL,
   2249       -1ULL
   2250     }
   2251 #endif
   2252   },
   2253   { "jalrp", TILEGX_OPC_JALRP, 0xa, 1, TREG_LR, 1,
   2254     { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
   2255 #ifndef DISASM_ONLY
   2256     {
   2257       0ULL,
   2258       0xfffff80000000000ULL,
   2259       0ULL,
   2260       0x3c07f80000000000ULL,
   2261       0ULL
   2262     },
   2263     {
   2264       -1ULL,
   2265       0x286a580000000000ULL,
   2266       -1ULL,
   2267       0x1c06500000000000ULL,
   2268       -1ULL
   2269     }
   2270 #endif
   2271   },
   2272   { "jr", TILEGX_OPC_JR, 0xa, 1, TREG_ZERO, 1,
   2273     { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
   2274 #ifndef DISASM_ONLY
   2275     {
   2276       0ULL,
   2277       0xfffff80000000000ULL,
   2278       0ULL,
   2279       0x3c07f80000000000ULL,
   2280       0ULL
   2281     },
   2282     {
   2283       -1ULL,
   2284       0x286a700000000000ULL,
   2285       -1ULL,
   2286       0x1c06680000000000ULL,
   2287       -1ULL
   2288     }
   2289 #endif
   2290   },
   2291   { "jrp", TILEGX_OPC_JRP, 0xa, 1, TREG_ZERO, 1,
   2292     { { 0, }, { 7 }, { 0, }, { 13 }, { 0, } },
   2293 #ifndef DISASM_ONLY
   2294     {
   2295       0ULL,
   2296       0xfffff80000000000ULL,
   2297       0ULL,
   2298       0x3c07f80000000000ULL,
   2299       0ULL
   2300     },
   2301     {
   2302       -1ULL,
   2303       0x286a680000000000ULL,
   2304       -1ULL,
   2305       0x1c06600000000000ULL,
   2306       -1ULL
   2307     }
   2308 #endif
   2309   },
   2310   { "ld", TILEGX_OPC_LD, 0x12, 2, TREG_ZERO, 1,
   2311     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
   2312 #ifndef DISASM_ONLY
   2313     {
   2314       0ULL,
   2315       0xfffff80000000000ULL,
   2316       0ULL,
   2317       0ULL,
   2318       0xc200000004000000ULL
   2319     },
   2320     {
   2321       -1ULL,
   2322       0x286ae80000000000ULL,
   2323       -1ULL,
   2324       -1ULL,
   2325       0x8200000004000000ULL
   2326     }
   2327 #endif
   2328   },
   2329   { "ld1s", TILEGX_OPC_LD1S, 0x12, 2, TREG_ZERO, 1,
   2330     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
   2331 #ifndef DISASM_ONLY
   2332     {
   2333       0ULL,
   2334       0xfffff80000000000ULL,
   2335       0ULL,
   2336       0ULL,
   2337       0xc200000004000000ULL
   2338     },
   2339     {
   2340       -1ULL,
   2341       0x286a780000000000ULL,
   2342       -1ULL,
   2343       -1ULL,
   2344       0x4000000000000000ULL
   2345     }
   2346 #endif
   2347   },
   2348   { "ld1s_add", TILEGX_OPC_LD1S_ADD, 0x2, 3, TREG_ZERO, 1,
   2349     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2350 #ifndef DISASM_ONLY
   2351     {
   2352       0ULL,
   2353       0xfff8000000000000ULL,
   2354       0ULL,
   2355       0ULL,
   2356       0ULL
   2357     },
   2358     {
   2359       -1ULL,
   2360       0x1838000000000000ULL,
   2361       -1ULL,
   2362       -1ULL,
   2363       -1ULL
   2364     }
   2365 #endif
   2366   },
   2367   { "ld1u", TILEGX_OPC_LD1U, 0x12, 2, TREG_ZERO, 1,
   2368     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
   2369 #ifndef DISASM_ONLY
   2370     {
   2371       0ULL,
   2372       0xfffff80000000000ULL,
   2373       0ULL,
   2374       0ULL,
   2375       0xc200000004000000ULL
   2376     },
   2377     {
   2378       -1ULL,
   2379       0x286a800000000000ULL,
   2380       -1ULL,
   2381       -1ULL,
   2382       0x4000000004000000ULL
   2383     }
   2384 #endif
   2385   },
   2386   { "ld1u_add", TILEGX_OPC_LD1U_ADD, 0x2, 3, TREG_ZERO, 1,
   2387     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2388 #ifndef DISASM_ONLY
   2389     {
   2390       0ULL,
   2391       0xfff8000000000000ULL,
   2392       0ULL,
   2393       0ULL,
   2394       0ULL
   2395     },
   2396     {
   2397       -1ULL,
   2398       0x1840000000000000ULL,
   2399       -1ULL,
   2400       -1ULL,
   2401       -1ULL
   2402     }
   2403 #endif
   2404   },
   2405   { "ld2s", TILEGX_OPC_LD2S, 0x12, 2, TREG_ZERO, 1,
   2406     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
   2407 #ifndef DISASM_ONLY
   2408     {
   2409       0ULL,
   2410       0xfffff80000000000ULL,
   2411       0ULL,
   2412       0ULL,
   2413       0xc200000004000000ULL
   2414     },
   2415     {
   2416       -1ULL,
   2417       0x286a880000000000ULL,
   2418       -1ULL,
   2419       -1ULL,
   2420       0x4200000000000000ULL
   2421     }
   2422 #endif
   2423   },
   2424   { "ld2s_add", TILEGX_OPC_LD2S_ADD, 0x2, 3, TREG_ZERO, 1,
   2425     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2426 #ifndef DISASM_ONLY
   2427     {
   2428       0ULL,
   2429       0xfff8000000000000ULL,
   2430       0ULL,
   2431       0ULL,
   2432       0ULL
   2433     },
   2434     {
   2435       -1ULL,
   2436       0x1848000000000000ULL,
   2437       -1ULL,
   2438       -1ULL,
   2439       -1ULL
   2440     }
   2441 #endif
   2442   },
   2443   { "ld2u", TILEGX_OPC_LD2U, 0x12, 2, TREG_ZERO, 1,
   2444     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
   2445 #ifndef DISASM_ONLY
   2446     {
   2447       0ULL,
   2448       0xfffff80000000000ULL,
   2449       0ULL,
   2450       0ULL,
   2451       0xc200000004000000ULL
   2452     },
   2453     {
   2454       -1ULL,
   2455       0x286a900000000000ULL,
   2456       -1ULL,
   2457       -1ULL,
   2458       0x4200000004000000ULL
   2459     }
   2460 #endif
   2461   },
   2462   { "ld2u_add", TILEGX_OPC_LD2U_ADD, 0x2, 3, TREG_ZERO, 1,
   2463     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2464 #ifndef DISASM_ONLY
   2465     {
   2466       0ULL,
   2467       0xfff8000000000000ULL,
   2468       0ULL,
   2469       0ULL,
   2470       0ULL
   2471     },
   2472     {
   2473       -1ULL,
   2474       0x1850000000000000ULL,
   2475       -1ULL,
   2476       -1ULL,
   2477       -1ULL
   2478     }
   2479 #endif
   2480   },
   2481   { "ld4s", TILEGX_OPC_LD4S, 0x12, 2, TREG_ZERO, 1,
   2482     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
   2483 #ifndef DISASM_ONLY
   2484     {
   2485       0ULL,
   2486       0xfffff80000000000ULL,
   2487       0ULL,
   2488       0ULL,
   2489       0xc200000004000000ULL
   2490     },
   2491     {
   2492       -1ULL,
   2493       0x286a980000000000ULL,
   2494       -1ULL,
   2495       -1ULL,
   2496       0x8000000004000000ULL
   2497     }
   2498 #endif
   2499   },
   2500   { "ld4s_add", TILEGX_OPC_LD4S_ADD, 0x2, 3, TREG_ZERO, 1,
   2501     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2502 #ifndef DISASM_ONLY
   2503     {
   2504       0ULL,
   2505       0xfff8000000000000ULL,
   2506       0ULL,
   2507       0ULL,
   2508       0ULL
   2509     },
   2510     {
   2511       -1ULL,
   2512       0x1858000000000000ULL,
   2513       -1ULL,
   2514       -1ULL,
   2515       -1ULL
   2516     }
   2517 #endif
   2518   },
   2519   { "ld4u", TILEGX_OPC_LD4U, 0x12, 2, TREG_ZERO, 1,
   2520     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 26, 14 } },
   2521 #ifndef DISASM_ONLY
   2522     {
   2523       0ULL,
   2524       0xfffff80000000000ULL,
   2525       0ULL,
   2526       0ULL,
   2527       0xc200000004000000ULL
   2528     },
   2529     {
   2530       -1ULL,
   2531       0x286aa00000000000ULL,
   2532       -1ULL,
   2533       -1ULL,
   2534       0x8200000000000000ULL
   2535     }
   2536 #endif
   2537   },
   2538   { "ld4u_add", TILEGX_OPC_LD4U_ADD, 0x2, 3, TREG_ZERO, 1,
   2539     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2540 #ifndef DISASM_ONLY
   2541     {
   2542       0ULL,
   2543       0xfff8000000000000ULL,
   2544       0ULL,
   2545       0ULL,
   2546       0ULL
   2547     },
   2548     {
   2549       -1ULL,
   2550       0x1860000000000000ULL,
   2551       -1ULL,
   2552       -1ULL,
   2553       -1ULL
   2554     }
   2555 #endif
   2556   },
   2557   { "ld_add", TILEGX_OPC_LD_ADD, 0x2, 3, TREG_ZERO, 1,
   2558     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2559 #ifndef DISASM_ONLY
   2560     {
   2561       0ULL,
   2562       0xfff8000000000000ULL,
   2563       0ULL,
   2564       0ULL,
   2565       0ULL
   2566     },
   2567     {
   2568       -1ULL,
   2569       0x18a0000000000000ULL,
   2570       -1ULL,
   2571       -1ULL,
   2572       -1ULL
   2573     }
   2574 #endif
   2575   },
   2576   { "ldna", TILEGX_OPC_LDNA, 0x2, 2, TREG_ZERO, 1,
   2577     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2578 #ifndef DISASM_ONLY
   2579     {
   2580       0ULL,
   2581       0xfffff80000000000ULL,
   2582       0ULL,
   2583       0ULL,
   2584       0ULL
   2585     },
   2586     {
   2587       -1ULL,
   2588       0x286aa80000000000ULL,
   2589       -1ULL,
   2590       -1ULL,
   2591       -1ULL
   2592     }
   2593 #endif
   2594   },
   2595   { "ldna_add", TILEGX_OPC_LDNA_ADD, 0x2, 3, TREG_ZERO, 1,
   2596     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2597 #ifndef DISASM_ONLY
   2598     {
   2599       0ULL,
   2600       0xfff8000000000000ULL,
   2601       0ULL,
   2602       0ULL,
   2603       0ULL
   2604     },
   2605     {
   2606       -1ULL,
   2607       0x18a8000000000000ULL,
   2608       -1ULL,
   2609       -1ULL,
   2610       -1ULL
   2611     }
   2612 #endif
   2613   },
   2614   { "ldnt", TILEGX_OPC_LDNT, 0x2, 2, TREG_ZERO, 1,
   2615     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2616 #ifndef DISASM_ONLY
   2617     {
   2618       0ULL,
   2619       0xfffff80000000000ULL,
   2620       0ULL,
   2621       0ULL,
   2622       0ULL
   2623     },
   2624     {
   2625       -1ULL,
   2626       0x286ae00000000000ULL,
   2627       -1ULL,
   2628       -1ULL,
   2629       -1ULL
   2630     }
   2631 #endif
   2632   },
   2633   { "ldnt1s", TILEGX_OPC_LDNT1S, 0x2, 2, TREG_ZERO, 1,
   2634     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2635 #ifndef DISASM_ONLY
   2636     {
   2637       0ULL,
   2638       0xfffff80000000000ULL,
   2639       0ULL,
   2640       0ULL,
   2641       0ULL
   2642     },
   2643     {
   2644       -1ULL,
   2645       0x286ab00000000000ULL,
   2646       -1ULL,
   2647       -1ULL,
   2648       -1ULL
   2649     }
   2650 #endif
   2651   },
   2652   { "ldnt1s_add", TILEGX_OPC_LDNT1S_ADD, 0x2, 3, TREG_ZERO, 1,
   2653     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2654 #ifndef DISASM_ONLY
   2655     {
   2656       0ULL,
   2657       0xfff8000000000000ULL,
   2658       0ULL,
   2659       0ULL,
   2660       0ULL
   2661     },
   2662     {
   2663       -1ULL,
   2664       0x1868000000000000ULL,
   2665       -1ULL,
   2666       -1ULL,
   2667       -1ULL
   2668     }
   2669 #endif
   2670   },
   2671   { "ldnt1u", TILEGX_OPC_LDNT1U, 0x2, 2, TREG_ZERO, 1,
   2672     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2673 #ifndef DISASM_ONLY
   2674     {
   2675       0ULL,
   2676       0xfffff80000000000ULL,
   2677       0ULL,
   2678       0ULL,
   2679       0ULL
   2680     },
   2681     {
   2682       -1ULL,
   2683       0x286ab80000000000ULL,
   2684       -1ULL,
   2685       -1ULL,
   2686       -1ULL
   2687     }
   2688 #endif
   2689   },
   2690   { "ldnt1u_add", TILEGX_OPC_LDNT1U_ADD, 0x2, 3, TREG_ZERO, 1,
   2691     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2692 #ifndef DISASM_ONLY
   2693     {
   2694       0ULL,
   2695       0xfff8000000000000ULL,
   2696       0ULL,
   2697       0ULL,
   2698       0ULL
   2699     },
   2700     {
   2701       -1ULL,
   2702       0x1870000000000000ULL,
   2703       -1ULL,
   2704       -1ULL,
   2705       -1ULL
   2706     }
   2707 #endif
   2708   },
   2709   { "ldnt2s", TILEGX_OPC_LDNT2S, 0x2, 2, TREG_ZERO, 1,
   2710     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2711 #ifndef DISASM_ONLY
   2712     {
   2713       0ULL,
   2714       0xfffff80000000000ULL,
   2715       0ULL,
   2716       0ULL,
   2717       0ULL
   2718     },
   2719     {
   2720       -1ULL,
   2721       0x286ac00000000000ULL,
   2722       -1ULL,
   2723       -1ULL,
   2724       -1ULL
   2725     }
   2726 #endif
   2727   },
   2728   { "ldnt2s_add", TILEGX_OPC_LDNT2S_ADD, 0x2, 3, TREG_ZERO, 1,
   2729     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2730 #ifndef DISASM_ONLY
   2731     {
   2732       0ULL,
   2733       0xfff8000000000000ULL,
   2734       0ULL,
   2735       0ULL,
   2736       0ULL
   2737     },
   2738     {
   2739       -1ULL,
   2740       0x1878000000000000ULL,
   2741       -1ULL,
   2742       -1ULL,
   2743       -1ULL
   2744     }
   2745 #endif
   2746   },
   2747   { "ldnt2u", TILEGX_OPC_LDNT2U, 0x2, 2, TREG_ZERO, 1,
   2748     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2749 #ifndef DISASM_ONLY
   2750     {
   2751       0ULL,
   2752       0xfffff80000000000ULL,
   2753       0ULL,
   2754       0ULL,
   2755       0ULL
   2756     },
   2757     {
   2758       -1ULL,
   2759       0x286ac80000000000ULL,
   2760       -1ULL,
   2761       -1ULL,
   2762       -1ULL
   2763     }
   2764 #endif
   2765   },
   2766   { "ldnt2u_add", TILEGX_OPC_LDNT2U_ADD, 0x2, 3, TREG_ZERO, 1,
   2767     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2768 #ifndef DISASM_ONLY
   2769     {
   2770       0ULL,
   2771       0xfff8000000000000ULL,
   2772       0ULL,
   2773       0ULL,
   2774       0ULL
   2775     },
   2776     {
   2777       -1ULL,
   2778       0x1880000000000000ULL,
   2779       -1ULL,
   2780       -1ULL,
   2781       -1ULL
   2782     }
   2783 #endif
   2784   },
   2785   { "ldnt4s", TILEGX_OPC_LDNT4S, 0x2, 2, TREG_ZERO, 1,
   2786     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2787 #ifndef DISASM_ONLY
   2788     {
   2789       0ULL,
   2790       0xfffff80000000000ULL,
   2791       0ULL,
   2792       0ULL,
   2793       0ULL
   2794     },
   2795     {
   2796       -1ULL,
   2797       0x286ad00000000000ULL,
   2798       -1ULL,
   2799       -1ULL,
   2800       -1ULL
   2801     }
   2802 #endif
   2803   },
   2804   { "ldnt4s_add", TILEGX_OPC_LDNT4S_ADD, 0x2, 3, TREG_ZERO, 1,
   2805     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2806 #ifndef DISASM_ONLY
   2807     {
   2808       0ULL,
   2809       0xfff8000000000000ULL,
   2810       0ULL,
   2811       0ULL,
   2812       0ULL
   2813     },
   2814     {
   2815       -1ULL,
   2816       0x1888000000000000ULL,
   2817       -1ULL,
   2818       -1ULL,
   2819       -1ULL
   2820     }
   2821 #endif
   2822   },
   2823   { "ldnt4u", TILEGX_OPC_LDNT4U, 0x2, 2, TREG_ZERO, 1,
   2824     { { 0, }, { 6, 7 }, { 0, }, { 0, }, { 0, } },
   2825 #ifndef DISASM_ONLY
   2826     {
   2827       0ULL,
   2828       0xfffff80000000000ULL,
   2829       0ULL,
   2830       0ULL,
   2831       0ULL
   2832     },
   2833     {
   2834       -1ULL,
   2835       0x286ad80000000000ULL,
   2836       -1ULL,
   2837       -1ULL,
   2838       -1ULL
   2839     }
   2840 #endif
   2841   },
   2842   { "ldnt4u_add", TILEGX_OPC_LDNT4U_ADD, 0x2, 3, TREG_ZERO, 1,
   2843     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2844 #ifndef DISASM_ONLY
   2845     {
   2846       0ULL,
   2847       0xfff8000000000000ULL,
   2848       0ULL,
   2849       0ULL,
   2850       0ULL
   2851     },
   2852     {
   2853       -1ULL,
   2854       0x1890000000000000ULL,
   2855       -1ULL,
   2856       -1ULL,
   2857       -1ULL
   2858     }
   2859 #endif
   2860   },
   2861   { "ldnt_add", TILEGX_OPC_LDNT_ADD, 0x2, 3, TREG_ZERO, 1,
   2862     { { 0, }, { 6, 15, 1 }, { 0, }, { 0, }, { 0, } },
   2863 #ifndef DISASM_ONLY
   2864     {
   2865       0ULL,
   2866       0xfff8000000000000ULL,
   2867       0ULL,
   2868       0ULL,
   2869       0ULL
   2870     },
   2871     {
   2872       -1ULL,
   2873       0x1898000000000000ULL,
   2874       -1ULL,
   2875       -1ULL,
   2876       -1ULL
   2877     }
   2878 #endif
   2879   },
   2880   { "lnk", TILEGX_OPC_LNK, 0xa, 1, TREG_ZERO, 1,
   2881     { { 0, }, { 6 }, { 0, }, { 12 }, { 0, } },
   2882 #ifndef DISASM_ONLY
   2883     {
   2884       0ULL,
   2885       0xfffff80000000000ULL,
   2886       0ULL,
   2887       0x3c07f80000000000ULL,
   2888       0ULL
   2889     },
   2890     {
   2891       -1ULL,
   2892       0x286af00000000000ULL,
   2893       -1ULL,
   2894       0x1c06700000000000ULL,
   2895       -1ULL
   2896     }
   2897 #endif
   2898   },
   2899   { "mf", TILEGX_OPC_MF, 0x2, 0, TREG_ZERO, 1,
   2900     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   2901 #ifndef DISASM_ONLY
   2902     {
   2903       0ULL,
   2904       0xfffff80000000000ULL,
   2905       0ULL,
   2906       0ULL,
   2907       0ULL
   2908     },
   2909     {
   2910       -1ULL,
   2911       0x286af80000000000ULL,
   2912       -1ULL,
   2913       -1ULL,
   2914       -1ULL
   2915     }
   2916 #endif
   2917   },
   2918   { "mfspr", TILEGX_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1,
   2919     { { 0, }, { 6, 27 }, { 0, }, { 0, }, { 0, } },
   2920 #ifndef DISASM_ONLY
   2921     {
   2922       0ULL,
   2923       0xfff8000000000000ULL,
   2924       0ULL,
   2925       0ULL,
   2926       0ULL
   2927     },
   2928     {
   2929       -1ULL,
   2930       0x18b0000000000000ULL,
   2931       -1ULL,
   2932       -1ULL,
   2933       -1ULL
   2934     }
   2935 #endif
   2936   },
   2937   { "mm", TILEGX_OPC_MM, 0x1, 4, TREG_ZERO, 1,
   2938     { { 23, 9, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
   2939 #ifndef DISASM_ONLY
   2940     {
   2941       0xc00000007f000000ULL,
   2942       0ULL,
   2943       0ULL,
   2944       0ULL,
   2945       0ULL
   2946     },
   2947     {
   2948       0x0000000037000000ULL,
   2949       -1ULL,
   2950       -1ULL,
   2951       -1ULL,
   2952       -1ULL
   2953     }
   2954 #endif
   2955   },
   2956   { "mnz", TILEGX_OPC_MNZ, 0xf, 3, TREG_ZERO, 1,
   2957     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   2958 #ifndef DISASM_ONLY
   2959     {
   2960       0xc00000007ffc0000ULL,
   2961       0xfffe000000000000ULL,
   2962       0x00000000780c0000ULL,
   2963       0x3c06000000000000ULL,
   2964       0ULL
   2965     },
   2966     {
   2967       0x0000000050a00000ULL,
   2968       0x2834000000000000ULL,
   2969       0x0000000048080000ULL,
   2970       0x2804000000000000ULL,
   2971       -1ULL
   2972     }
   2973 #endif
   2974   },
   2975   { "mtspr", TILEGX_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1,
   2976     { { 0, }, { 28, 7 }, { 0, }, { 0, }, { 0, } },
   2977 #ifndef DISASM_ONLY
   2978     {
   2979       0ULL,
   2980       0xfff8000000000000ULL,
   2981       0ULL,
   2982       0ULL,
   2983       0ULL
   2984     },
   2985     {
   2986       -1ULL,
   2987       0x18b8000000000000ULL,
   2988       -1ULL,
   2989       -1ULL,
   2990       -1ULL
   2991     }
   2992 #endif
   2993   },
   2994   { "mul_hs_hs", TILEGX_OPC_MUL_HS_HS, 0x5, 3, TREG_ZERO, 1,
   2995     { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
   2996 #ifndef DISASM_ONLY
   2997     {
   2998       0xc00000007ffc0000ULL,
   2999       0ULL,
   3000       0x00000000780c0000ULL,
   3001       0ULL,
   3002       0ULL
   3003     },
   3004     {
   3005       0x0000000050d40000ULL,
   3006       -1ULL,
   3007       0x0000000068000000ULL,
   3008       -1ULL,
   3009       -1ULL
   3010     }
   3011 #endif
   3012   },
   3013   { "mul_hs_hu", TILEGX_OPC_MUL_HS_HU, 0x1, 3, TREG_ZERO, 1,
   3014     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3015 #ifndef DISASM_ONLY
   3016     {
   3017       0xc00000007ffc0000ULL,
   3018       0ULL,
   3019       0ULL,
   3020       0ULL,
   3021       0ULL
   3022     },
   3023     {
   3024       0x0000000050d80000ULL,
   3025       -1ULL,
   3026       -1ULL,
   3027       -1ULL,
   3028       -1ULL
   3029     }
   3030 #endif
   3031   },
   3032   { "mul_hs_ls", TILEGX_OPC_MUL_HS_LS, 0x1, 3, TREG_ZERO, 1,
   3033     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3034 #ifndef DISASM_ONLY
   3035     {
   3036       0xc00000007ffc0000ULL,
   3037       0ULL,
   3038       0ULL,
   3039       0ULL,
   3040       0ULL
   3041     },
   3042     {
   3043       0x0000000050dc0000ULL,
   3044       -1ULL,
   3045       -1ULL,
   3046       -1ULL,
   3047       -1ULL
   3048     }
   3049 #endif
   3050   },
   3051   { "mul_hs_lu", TILEGX_OPC_MUL_HS_LU, 0x1, 3, TREG_ZERO, 1,
   3052     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3053 #ifndef DISASM_ONLY
   3054     {
   3055       0xc00000007ffc0000ULL,
   3056       0ULL,
   3057       0ULL,
   3058       0ULL,
   3059       0ULL
   3060     },
   3061     {
   3062       0x0000000050e00000ULL,
   3063       -1ULL,
   3064       -1ULL,
   3065       -1ULL,
   3066       -1ULL
   3067     }
   3068 #endif
   3069   },
   3070   { "mul_hu_hu", TILEGX_OPC_MUL_HU_HU, 0x5, 3, TREG_ZERO, 1,
   3071     { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
   3072 #ifndef DISASM_ONLY
   3073     {
   3074       0xc00000007ffc0000ULL,
   3075       0ULL,
   3076       0x00000000780c0000ULL,
   3077       0ULL,
   3078       0ULL
   3079     },
   3080     {
   3081       0x0000000050e40000ULL,
   3082       -1ULL,
   3083       0x0000000068040000ULL,
   3084       -1ULL,
   3085       -1ULL
   3086     }
   3087 #endif
   3088   },
   3089   { "mul_hu_ls", TILEGX_OPC_MUL_HU_LS, 0x1, 3, TREG_ZERO, 1,
   3090     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3091 #ifndef DISASM_ONLY
   3092     {
   3093       0xc00000007ffc0000ULL,
   3094       0ULL,
   3095       0ULL,
   3096       0ULL,
   3097       0ULL
   3098     },
   3099     {
   3100       0x0000000050e80000ULL,
   3101       -1ULL,
   3102       -1ULL,
   3103       -1ULL,
   3104       -1ULL
   3105     }
   3106 #endif
   3107   },
   3108   { "mul_hu_lu", TILEGX_OPC_MUL_HU_LU, 0x1, 3, TREG_ZERO, 1,
   3109     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3110 #ifndef DISASM_ONLY
   3111     {
   3112       0xc00000007ffc0000ULL,
   3113       0ULL,
   3114       0ULL,
   3115       0ULL,
   3116       0ULL
   3117     },
   3118     {
   3119       0x0000000050ec0000ULL,
   3120       -1ULL,
   3121       -1ULL,
   3122       -1ULL,
   3123       -1ULL
   3124     }
   3125 #endif
   3126   },
   3127   { "mul_ls_ls", TILEGX_OPC_MUL_LS_LS, 0x5, 3, TREG_ZERO, 1,
   3128     { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
   3129 #ifndef DISASM_ONLY
   3130     {
   3131       0xc00000007ffc0000ULL,
   3132       0ULL,
   3133       0x00000000780c0000ULL,
   3134       0ULL,
   3135       0ULL
   3136     },
   3137     {
   3138       0x0000000050f00000ULL,
   3139       -1ULL,
   3140       0x0000000068080000ULL,
   3141       -1ULL,
   3142       -1ULL
   3143     }
   3144 #endif
   3145   },
   3146   { "mul_ls_lu", TILEGX_OPC_MUL_LS_LU, 0x1, 3, TREG_ZERO, 1,
   3147     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3148 #ifndef DISASM_ONLY
   3149     {
   3150       0xc00000007ffc0000ULL,
   3151       0ULL,
   3152       0ULL,
   3153       0ULL,
   3154       0ULL
   3155     },
   3156     {
   3157       0x0000000050f40000ULL,
   3158       -1ULL,
   3159       -1ULL,
   3160       -1ULL,
   3161       -1ULL
   3162     }
   3163 #endif
   3164   },
   3165   { "mul_lu_lu", TILEGX_OPC_MUL_LU_LU, 0x5, 3, TREG_ZERO, 1,
   3166     { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
   3167 #ifndef DISASM_ONLY
   3168     {
   3169       0xc00000007ffc0000ULL,
   3170       0ULL,
   3171       0x00000000780c0000ULL,
   3172       0ULL,
   3173       0ULL
   3174     },
   3175     {
   3176       0x0000000050f80000ULL,
   3177       -1ULL,
   3178       0x00000000680c0000ULL,
   3179       -1ULL,
   3180       -1ULL
   3181     }
   3182 #endif
   3183   },
   3184   { "mula_hs_hs", TILEGX_OPC_MULA_HS_HS, 0x5, 3, TREG_ZERO, 1,
   3185     { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
   3186 #ifndef DISASM_ONLY
   3187     {
   3188       0xc00000007ffc0000ULL,
   3189       0ULL,
   3190       0x00000000780c0000ULL,
   3191       0ULL,
   3192       0ULL
   3193     },
   3194     {
   3195       0x0000000050a80000ULL,
   3196       -1ULL,
   3197       0x0000000070000000ULL,
   3198       -1ULL,
   3199       -1ULL
   3200     }
   3201 #endif
   3202   },
   3203   { "mula_hs_hu", TILEGX_OPC_MULA_HS_HU, 0x1, 3, TREG_ZERO, 1,
   3204     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3205 #ifndef DISASM_ONLY
   3206     {
   3207       0xc00000007ffc0000ULL,
   3208       0ULL,
   3209       0ULL,
   3210       0ULL,
   3211       0ULL
   3212     },
   3213     {
   3214       0x0000000050ac0000ULL,
   3215       -1ULL,
   3216       -1ULL,
   3217       -1ULL,
   3218       -1ULL
   3219     }
   3220 #endif
   3221   },
   3222   { "mula_hs_ls", TILEGX_OPC_MULA_HS_LS, 0x1, 3, TREG_ZERO, 1,
   3223     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3224 #ifndef DISASM_ONLY
   3225     {
   3226       0xc00000007ffc0000ULL,
   3227       0ULL,
   3228       0ULL,
   3229       0ULL,
   3230       0ULL
   3231     },
   3232     {
   3233       0x0000000050b00000ULL,
   3234       -1ULL,
   3235       -1ULL,
   3236       -1ULL,
   3237       -1ULL
   3238     }
   3239 #endif
   3240   },
   3241   { "mula_hs_lu", TILEGX_OPC_MULA_HS_LU, 0x1, 3, TREG_ZERO, 1,
   3242     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3243 #ifndef DISASM_ONLY
   3244     {
   3245       0xc00000007ffc0000ULL,
   3246       0ULL,
   3247       0ULL,
   3248       0ULL,
   3249       0ULL
   3250     },
   3251     {
   3252       0x0000000050b40000ULL,
   3253       -1ULL,
   3254       -1ULL,
   3255       -1ULL,
   3256       -1ULL
   3257     }
   3258 #endif
   3259   },
   3260   { "mula_hu_hu", TILEGX_OPC_MULA_HU_HU, 0x5, 3, TREG_ZERO, 1,
   3261     { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
   3262 #ifndef DISASM_ONLY
   3263     {
   3264       0xc00000007ffc0000ULL,
   3265       0ULL,
   3266       0x00000000780c0000ULL,
   3267       0ULL,
   3268       0ULL
   3269     },
   3270     {
   3271       0x0000000050b80000ULL,
   3272       -1ULL,
   3273       0x0000000070040000ULL,
   3274       -1ULL,
   3275       -1ULL
   3276     }
   3277 #endif
   3278   },
   3279   { "mula_hu_ls", TILEGX_OPC_MULA_HU_LS, 0x1, 3, TREG_ZERO, 1,
   3280     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3281 #ifndef DISASM_ONLY
   3282     {
   3283       0xc00000007ffc0000ULL,
   3284       0ULL,
   3285       0ULL,
   3286       0ULL,
   3287       0ULL
   3288     },
   3289     {
   3290       0x0000000050bc0000ULL,
   3291       -1ULL,
   3292       -1ULL,
   3293       -1ULL,
   3294       -1ULL
   3295     }
   3296 #endif
   3297   },
   3298   { "mula_hu_lu", TILEGX_OPC_MULA_HU_LU, 0x1, 3, TREG_ZERO, 1,
   3299     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3300 #ifndef DISASM_ONLY
   3301     {
   3302       0xc00000007ffc0000ULL,
   3303       0ULL,
   3304       0ULL,
   3305       0ULL,
   3306       0ULL
   3307     },
   3308     {
   3309       0x0000000050c00000ULL,
   3310       -1ULL,
   3311       -1ULL,
   3312       -1ULL,
   3313       -1ULL
   3314     }
   3315 #endif
   3316   },
   3317   { "mula_ls_ls", TILEGX_OPC_MULA_LS_LS, 0x5, 3, TREG_ZERO, 1,
   3318     { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
   3319 #ifndef DISASM_ONLY
   3320     {
   3321       0xc00000007ffc0000ULL,
   3322       0ULL,
   3323       0x00000000780c0000ULL,
   3324       0ULL,
   3325       0ULL
   3326     },
   3327     {
   3328       0x0000000050c40000ULL,
   3329       -1ULL,
   3330       0x0000000070080000ULL,
   3331       -1ULL,
   3332       -1ULL
   3333     }
   3334 #endif
   3335   },
   3336   { "mula_ls_lu", TILEGX_OPC_MULA_LS_LU, 0x1, 3, TREG_ZERO, 1,
   3337     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3338 #ifndef DISASM_ONLY
   3339     {
   3340       0xc00000007ffc0000ULL,
   3341       0ULL,
   3342       0ULL,
   3343       0ULL,
   3344       0ULL
   3345     },
   3346     {
   3347       0x0000000050c80000ULL,
   3348       -1ULL,
   3349       -1ULL,
   3350       -1ULL,
   3351       -1ULL
   3352     }
   3353 #endif
   3354   },
   3355   { "mula_lu_lu", TILEGX_OPC_MULA_LU_LU, 0x5, 3, TREG_ZERO, 1,
   3356     { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
   3357 #ifndef DISASM_ONLY
   3358     {
   3359       0xc00000007ffc0000ULL,
   3360       0ULL,
   3361       0x00000000780c0000ULL,
   3362       0ULL,
   3363       0ULL
   3364     },
   3365     {
   3366       0x0000000050cc0000ULL,
   3367       -1ULL,
   3368       0x00000000700c0000ULL,
   3369       -1ULL,
   3370       -1ULL
   3371     }
   3372 #endif
   3373   },
   3374   { "mulax", TILEGX_OPC_MULAX, 0x5, 3, TREG_ZERO, 1,
   3375     { { 23, 9, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
   3376 #ifndef DISASM_ONLY
   3377     {
   3378       0xc00000007ffc0000ULL,
   3379       0ULL,
   3380       0x00000000780c0000ULL,
   3381       0ULL,
   3382       0ULL
   3383     },
   3384     {
   3385       0x0000000050a40000ULL,
   3386       -1ULL,
   3387       0x0000000040080000ULL,
   3388       -1ULL,
   3389       -1ULL
   3390     }
   3391 #endif
   3392   },
   3393   { "mulx", TILEGX_OPC_MULX, 0x5, 3, TREG_ZERO, 1,
   3394     { { 8, 9, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
   3395 #ifndef DISASM_ONLY
   3396     {
   3397       0xc00000007ffc0000ULL,
   3398       0ULL,
   3399       0x00000000780c0000ULL,
   3400       0ULL,
   3401       0ULL
   3402     },
   3403     {
   3404       0x0000000050d00000ULL,
   3405       -1ULL,
   3406       0x00000000400c0000ULL,
   3407       -1ULL,
   3408       -1ULL
   3409     }
   3410 #endif
   3411   },
   3412   { "mz", TILEGX_OPC_MZ, 0xf, 3, TREG_ZERO, 1,
   3413     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3414 #ifndef DISASM_ONLY
   3415     {
   3416       0xc00000007ffc0000ULL,
   3417       0xfffe000000000000ULL,
   3418       0x00000000780c0000ULL,
   3419       0x3c06000000000000ULL,
   3420       0ULL
   3421     },
   3422     {
   3423       0x0000000050fc0000ULL,
   3424       0x2836000000000000ULL,
   3425       0x00000000480c0000ULL,
   3426       0x2806000000000000ULL,
   3427       -1ULL
   3428     }
   3429 #endif
   3430   },
   3431   { "nap", TILEGX_OPC_NAP, 0x2, 0, TREG_ZERO, 0,
   3432     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   3433 #ifndef DISASM_ONLY
   3434     {
   3435       0ULL,
   3436       0xfffff80000000000ULL,
   3437       0ULL,
   3438       0ULL,
   3439       0ULL
   3440     },
   3441     {
   3442       -1ULL,
   3443       0x286b000000000000ULL,
   3444       -1ULL,
   3445       -1ULL,
   3446       -1ULL
   3447     }
   3448 #endif
   3449   },
   3450   { "nop", TILEGX_OPC_NOP, 0xf, 0, TREG_ZERO, 1,
   3451     { {  }, {  }, {  }, {  }, { 0, } },
   3452 #ifndef DISASM_ONLY
   3453     {
   3454       0xc00000007ffff000ULL,
   3455       0xfffff80000000000ULL,
   3456       0x00000000780ff000ULL,
   3457       0x3c07f80000000000ULL,
   3458       0ULL
   3459     },
   3460     {
   3461       0x0000000051485000ULL,
   3462       0x286b080000000000ULL,
   3463       0x00000000300c5000ULL,
   3464       0x1c06780000000000ULL,
   3465       -1ULL
   3466     }
   3467 #endif
   3468   },
   3469   { "nor", TILEGX_OPC_NOR, 0xf, 3, TREG_ZERO, 1,
   3470     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3471 #ifndef DISASM_ONLY
   3472     {
   3473       0xc00000007ffc0000ULL,
   3474       0xfffe000000000000ULL,
   3475       0x00000000780c0000ULL,
   3476       0x3c06000000000000ULL,
   3477       0ULL
   3478     },
   3479     {
   3480       0x0000000051000000ULL,
   3481       0x2838000000000000ULL,
   3482       0x0000000050040000ULL,
   3483       0x2c02000000000000ULL,
   3484       -1ULL
   3485     }
   3486 #endif
   3487   },
   3488   { "or", TILEGX_OPC_OR, 0xf, 3, TREG_ZERO, 1,
   3489     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3490 #ifndef DISASM_ONLY
   3491     {
   3492       0xc00000007ffc0000ULL,
   3493       0xfffe000000000000ULL,
   3494       0x00000000780c0000ULL,
   3495       0x3c06000000000000ULL,
   3496       0ULL
   3497     },
   3498     {
   3499       0x0000000051040000ULL,
   3500       0x283a000000000000ULL,
   3501       0x0000000050080000ULL,
   3502       0x2c04000000000000ULL,
   3503       -1ULL
   3504     }
   3505 #endif
   3506   },
   3507   { "ori", TILEGX_OPC_ORI, 0x3, 3, TREG_ZERO, 1,
   3508     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   3509 #ifndef DISASM_ONLY
   3510     {
   3511       0xc00000007ff00000ULL,
   3512       0xfff8000000000000ULL,
   3513       0ULL,
   3514       0ULL,
   3515       0ULL
   3516     },
   3517     {
   3518       0x0000000040700000ULL,
   3519       0x18c0000000000000ULL,
   3520       -1ULL,
   3521       -1ULL,
   3522       -1ULL
   3523     }
   3524 #endif
   3525   },
   3526   { "pcnt", TILEGX_OPC_PCNT, 0x5, 2, TREG_ZERO, 1,
   3527     { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
   3528 #ifndef DISASM_ONLY
   3529     {
   3530       0xc00000007ffff000ULL,
   3531       0ULL,
   3532       0x00000000780ff000ULL,
   3533       0ULL,
   3534       0ULL
   3535     },
   3536     {
   3537       0x0000000051486000ULL,
   3538       -1ULL,
   3539       0x00000000300c6000ULL,
   3540       -1ULL,
   3541       -1ULL
   3542     }
   3543 #endif
   3544   },
   3545   { "revbits", TILEGX_OPC_REVBITS, 0x5, 2, TREG_ZERO, 1,
   3546     { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
   3547 #ifndef DISASM_ONLY
   3548     {
   3549       0xc00000007ffff000ULL,
   3550       0ULL,
   3551       0x00000000780ff000ULL,
   3552       0ULL,
   3553       0ULL
   3554     },
   3555     {
   3556       0x0000000051487000ULL,
   3557       -1ULL,
   3558       0x00000000300c7000ULL,
   3559       -1ULL,
   3560       -1ULL
   3561     }
   3562 #endif
   3563   },
   3564   { "revbytes", TILEGX_OPC_REVBYTES, 0x5, 2, TREG_ZERO, 1,
   3565     { { 8, 9 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
   3566 #ifndef DISASM_ONLY
   3567     {
   3568       0xc00000007ffff000ULL,
   3569       0ULL,
   3570       0x00000000780ff000ULL,
   3571       0ULL,
   3572       0ULL
   3573     },
   3574     {
   3575       0x0000000051488000ULL,
   3576       -1ULL,
   3577       0x00000000300c8000ULL,
   3578       -1ULL,
   3579       -1ULL
   3580     }
   3581 #endif
   3582   },
   3583   { "rotl", TILEGX_OPC_ROTL, 0xf, 3, TREG_ZERO, 1,
   3584     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3585 #ifndef DISASM_ONLY
   3586     {
   3587       0xc00000007ffc0000ULL,
   3588       0xfffe000000000000ULL,
   3589       0x00000000780c0000ULL,
   3590       0x3c06000000000000ULL,
   3591       0ULL
   3592     },
   3593     {
   3594       0x0000000051080000ULL,
   3595       0x283c000000000000ULL,
   3596       0x0000000058000000ULL,
   3597       0x3000000000000000ULL,
   3598       -1ULL
   3599     }
   3600 #endif
   3601   },
   3602   { "rotli", TILEGX_OPC_ROTLI, 0xf, 3, TREG_ZERO, 1,
   3603     { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
   3604 #ifndef DISASM_ONLY
   3605     {
   3606       0xc00000007ffc0000ULL,
   3607       0xfffe000000000000ULL,
   3608       0x00000000780c0000ULL,
   3609       0x3c06000000000000ULL,
   3610       0ULL
   3611     },
   3612     {
   3613       0x0000000060040000ULL,
   3614       0x3002000000000000ULL,
   3615       0x0000000078000000ULL,
   3616       0x3800000000000000ULL,
   3617       -1ULL
   3618     }
   3619 #endif
   3620   },
   3621   { "shl", TILEGX_OPC_SHL, 0xf, 3, TREG_ZERO, 1,
   3622     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3623 #ifndef DISASM_ONLY
   3624     {
   3625       0xc00000007ffc0000ULL,
   3626       0xfffe000000000000ULL,
   3627       0x00000000780c0000ULL,
   3628       0x3c06000000000000ULL,
   3629       0ULL
   3630     },
   3631     {
   3632       0x0000000051280000ULL,
   3633       0x284c000000000000ULL,
   3634       0x0000000058040000ULL,
   3635       0x3002000000000000ULL,
   3636       -1ULL
   3637     }
   3638 #endif
   3639   },
   3640   { "shl16insli", TILEGX_OPC_SHL16INSLI, 0x3, 3, TREG_ZERO, 1,
   3641     { { 8, 9, 4 }, { 6, 7, 5 }, { 0, }, { 0, }, { 0, } },
   3642 #ifndef DISASM_ONLY
   3643     {
   3644       0xc000000070000000ULL,
   3645       0xf800000000000000ULL,
   3646       0ULL,
   3647       0ULL,
   3648       0ULL
   3649     },
   3650     {
   3651       0x0000000070000000ULL,
   3652       0x3800000000000000ULL,
   3653       -1ULL,
   3654       -1ULL,
   3655       -1ULL
   3656     }
   3657 #endif
   3658   },
   3659   { "shl1add", TILEGX_OPC_SHL1ADD, 0xf, 3, TREG_ZERO, 1,
   3660     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3661 #ifndef DISASM_ONLY
   3662     {
   3663       0xc00000007ffc0000ULL,
   3664       0xfffe000000000000ULL,
   3665       0x00000000780c0000ULL,
   3666       0x3c06000000000000ULL,
   3667       0ULL
   3668     },
   3669     {
   3670       0x0000000051100000ULL,
   3671       0x2840000000000000ULL,
   3672       0x0000000030000000ULL,
   3673       0x1c00000000000000ULL,
   3674       -1ULL
   3675     }
   3676 #endif
   3677   },
   3678   { "shl1addx", TILEGX_OPC_SHL1ADDX, 0xf, 3, TREG_ZERO, 1,
   3679     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3680 #ifndef DISASM_ONLY
   3681     {
   3682       0xc00000007ffc0000ULL,
   3683       0xfffe000000000000ULL,
   3684       0x00000000780c0000ULL,
   3685       0x3c06000000000000ULL,
   3686       0ULL
   3687     },
   3688     {
   3689       0x00000000510c0000ULL,
   3690       0x283e000000000000ULL,
   3691       0x0000000060040000ULL,
   3692       0x3402000000000000ULL,
   3693       -1ULL
   3694     }
   3695 #endif
   3696   },
   3697   { "shl2add", TILEGX_OPC_SHL2ADD, 0xf, 3, TREG_ZERO, 1,
   3698     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3699 #ifndef DISASM_ONLY
   3700     {
   3701       0xc00000007ffc0000ULL,
   3702       0xfffe000000000000ULL,
   3703       0x00000000780c0000ULL,
   3704       0x3c06000000000000ULL,
   3705       0ULL
   3706     },
   3707     {
   3708       0x0000000051180000ULL,
   3709       0x2844000000000000ULL,
   3710       0x0000000030040000ULL,
   3711       0x1c02000000000000ULL,
   3712       -1ULL
   3713     }
   3714 #endif
   3715   },
   3716   { "shl2addx", TILEGX_OPC_SHL2ADDX, 0xf, 3, TREG_ZERO, 1,
   3717     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3718 #ifndef DISASM_ONLY
   3719     {
   3720       0xc00000007ffc0000ULL,
   3721       0xfffe000000000000ULL,
   3722       0x00000000780c0000ULL,
   3723       0x3c06000000000000ULL,
   3724       0ULL
   3725     },
   3726     {
   3727       0x0000000051140000ULL,
   3728       0x2842000000000000ULL,
   3729       0x0000000060080000ULL,
   3730       0x3404000000000000ULL,
   3731       -1ULL
   3732     }
   3733 #endif
   3734   },
   3735   { "shl3add", TILEGX_OPC_SHL3ADD, 0xf, 3, TREG_ZERO, 1,
   3736     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3737 #ifndef DISASM_ONLY
   3738     {
   3739       0xc00000007ffc0000ULL,
   3740       0xfffe000000000000ULL,
   3741       0x00000000780c0000ULL,
   3742       0x3c06000000000000ULL,
   3743       0ULL
   3744     },
   3745     {
   3746       0x0000000051200000ULL,
   3747       0x2848000000000000ULL,
   3748       0x0000000030080000ULL,
   3749       0x1c04000000000000ULL,
   3750       -1ULL
   3751     }
   3752 #endif
   3753   },
   3754   { "shl3addx", TILEGX_OPC_SHL3ADDX, 0xf, 3, TREG_ZERO, 1,
   3755     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3756 #ifndef DISASM_ONLY
   3757     {
   3758       0xc00000007ffc0000ULL,
   3759       0xfffe000000000000ULL,
   3760       0x00000000780c0000ULL,
   3761       0x3c06000000000000ULL,
   3762       0ULL
   3763     },
   3764     {
   3765       0x00000000511c0000ULL,
   3766       0x2846000000000000ULL,
   3767       0x00000000600c0000ULL,
   3768       0x3406000000000000ULL,
   3769       -1ULL
   3770     }
   3771 #endif
   3772   },
   3773   { "shli", TILEGX_OPC_SHLI, 0xf, 3, TREG_ZERO, 1,
   3774     { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
   3775 #ifndef DISASM_ONLY
   3776     {
   3777       0xc00000007ffc0000ULL,
   3778       0xfffe000000000000ULL,
   3779       0x00000000780c0000ULL,
   3780       0x3c06000000000000ULL,
   3781       0ULL
   3782     },
   3783     {
   3784       0x0000000060080000ULL,
   3785       0x3004000000000000ULL,
   3786       0x0000000078040000ULL,
   3787       0x3802000000000000ULL,
   3788       -1ULL
   3789     }
   3790 #endif
   3791   },
   3792   { "shlx", TILEGX_OPC_SHLX, 0x3, 3, TREG_ZERO, 1,
   3793     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   3794 #ifndef DISASM_ONLY
   3795     {
   3796       0xc00000007ffc0000ULL,
   3797       0xfffe000000000000ULL,
   3798       0ULL,
   3799       0ULL,
   3800       0ULL
   3801     },
   3802     {
   3803       0x0000000051240000ULL,
   3804       0x284a000000000000ULL,
   3805       -1ULL,
   3806       -1ULL,
   3807       -1ULL
   3808     }
   3809 #endif
   3810   },
   3811   { "shlxi", TILEGX_OPC_SHLXI, 0x3, 3, TREG_ZERO, 1,
   3812     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   3813 #ifndef DISASM_ONLY
   3814     {
   3815       0xc00000007ffc0000ULL,
   3816       0xfffe000000000000ULL,
   3817       0ULL,
   3818       0ULL,
   3819       0ULL
   3820     },
   3821     {
   3822       0x00000000600c0000ULL,
   3823       0x3006000000000000ULL,
   3824       -1ULL,
   3825       -1ULL,
   3826       -1ULL
   3827     }
   3828 #endif
   3829   },
   3830   { "shrs", TILEGX_OPC_SHRS, 0xf, 3, TREG_ZERO, 1,
   3831     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3832 #ifndef DISASM_ONLY
   3833     {
   3834       0xc00000007ffc0000ULL,
   3835       0xfffe000000000000ULL,
   3836       0x00000000780c0000ULL,
   3837       0x3c06000000000000ULL,
   3838       0ULL
   3839     },
   3840     {
   3841       0x00000000512c0000ULL,
   3842       0x284e000000000000ULL,
   3843       0x0000000058080000ULL,
   3844       0x3004000000000000ULL,
   3845       -1ULL
   3846     }
   3847 #endif
   3848   },
   3849   { "shrsi", TILEGX_OPC_SHRSI, 0xf, 3, TREG_ZERO, 1,
   3850     { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
   3851 #ifndef DISASM_ONLY
   3852     {
   3853       0xc00000007ffc0000ULL,
   3854       0xfffe000000000000ULL,
   3855       0x00000000780c0000ULL,
   3856       0x3c06000000000000ULL,
   3857       0ULL
   3858     },
   3859     {
   3860       0x0000000060100000ULL,
   3861       0x3008000000000000ULL,
   3862       0x0000000078080000ULL,
   3863       0x3804000000000000ULL,
   3864       -1ULL
   3865     }
   3866 #endif
   3867   },
   3868   { "shru", TILEGX_OPC_SHRU, 0xf, 3, TREG_ZERO, 1,
   3869     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   3870 #ifndef DISASM_ONLY
   3871     {
   3872       0xc00000007ffc0000ULL,
   3873       0xfffe000000000000ULL,
   3874       0x00000000780c0000ULL,
   3875       0x3c06000000000000ULL,
   3876       0ULL
   3877     },
   3878     {
   3879       0x0000000051340000ULL,
   3880       0x2852000000000000ULL,
   3881       0x00000000580c0000ULL,
   3882       0x3006000000000000ULL,
   3883       -1ULL
   3884     }
   3885 #endif
   3886   },
   3887   { "shrui", TILEGX_OPC_SHRUI, 0xf, 3, TREG_ZERO, 1,
   3888     { { 8, 9, 29 }, { 6, 7, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
   3889 #ifndef DISASM_ONLY
   3890     {
   3891       0xc00000007ffc0000ULL,
   3892       0xfffe000000000000ULL,
   3893       0x00000000780c0000ULL,
   3894       0x3c06000000000000ULL,
   3895       0ULL
   3896     },
   3897     {
   3898       0x0000000060140000ULL,
   3899       0x300a000000000000ULL,
   3900       0x00000000780c0000ULL,
   3901       0x3806000000000000ULL,
   3902       -1ULL
   3903     }
   3904 #endif
   3905   },
   3906   { "shrux", TILEGX_OPC_SHRUX, 0x3, 3, TREG_ZERO, 1,
   3907     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   3908 #ifndef DISASM_ONLY
   3909     {
   3910       0xc00000007ffc0000ULL,
   3911       0xfffe000000000000ULL,
   3912       0ULL,
   3913       0ULL,
   3914       0ULL
   3915     },
   3916     {
   3917       0x0000000051300000ULL,
   3918       0x2850000000000000ULL,
   3919       -1ULL,
   3920       -1ULL,
   3921       -1ULL
   3922     }
   3923 #endif
   3924   },
   3925   { "shruxi", TILEGX_OPC_SHRUXI, 0x3, 3, TREG_ZERO, 1,
   3926     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   3927 #ifndef DISASM_ONLY
   3928     {
   3929       0xc00000007ffc0000ULL,
   3930       0xfffe000000000000ULL,
   3931       0ULL,
   3932       0ULL,
   3933       0ULL
   3934     },
   3935     {
   3936       0x0000000060180000ULL,
   3937       0x300c000000000000ULL,
   3938       -1ULL,
   3939       -1ULL,
   3940       -1ULL
   3941     }
   3942 #endif
   3943   },
   3944   { "shufflebytes", TILEGX_OPC_SHUFFLEBYTES, 0x1, 3, TREG_ZERO, 1,
   3945     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   3946 #ifndef DISASM_ONLY
   3947     {
   3948       0xc00000007ffc0000ULL,
   3949       0ULL,
   3950       0ULL,
   3951       0ULL,
   3952       0ULL
   3953     },
   3954     {
   3955       0x0000000051380000ULL,
   3956       -1ULL,
   3957       -1ULL,
   3958       -1ULL,
   3959       -1ULL
   3960     }
   3961 #endif
   3962   },
   3963   { "st", TILEGX_OPC_ST, 0x12, 2, TREG_ZERO, 1,
   3964     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
   3965 #ifndef DISASM_ONLY
   3966     {
   3967       0ULL,
   3968       0xfffe000000000000ULL,
   3969       0ULL,
   3970       0ULL,
   3971       0xc200000004000000ULL
   3972     },
   3973     {
   3974       -1ULL,
   3975       0x2862000000000000ULL,
   3976       -1ULL,
   3977       -1ULL,
   3978       0xc200000004000000ULL
   3979     }
   3980 #endif
   3981   },
   3982   { "st1", TILEGX_OPC_ST1, 0x12, 2, TREG_ZERO, 1,
   3983     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
   3984 #ifndef DISASM_ONLY
   3985     {
   3986       0ULL,
   3987       0xfffe000000000000ULL,
   3988       0ULL,
   3989       0ULL,
   3990       0xc200000004000000ULL
   3991     },
   3992     {
   3993       -1ULL,
   3994       0x2854000000000000ULL,
   3995       -1ULL,
   3996       -1ULL,
   3997       0xc000000000000000ULL
   3998     }
   3999 #endif
   4000   },
   4001   { "st1_add", TILEGX_OPC_ST1_ADD, 0x2, 3, TREG_ZERO, 1,
   4002     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4003 #ifndef DISASM_ONLY
   4004     {
   4005       0ULL,
   4006       0xfff8000000000000ULL,
   4007       0ULL,
   4008       0ULL,
   4009       0ULL
   4010     },
   4011     {
   4012       -1ULL,
   4013       0x18c8000000000000ULL,
   4014       -1ULL,
   4015       -1ULL,
   4016       -1ULL
   4017     }
   4018 #endif
   4019   },
   4020   { "st2", TILEGX_OPC_ST2, 0x12, 2, TREG_ZERO, 1,
   4021     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
   4022 #ifndef DISASM_ONLY
   4023     {
   4024       0ULL,
   4025       0xfffe000000000000ULL,
   4026       0ULL,
   4027       0ULL,
   4028       0xc200000004000000ULL
   4029     },
   4030     {
   4031       -1ULL,
   4032       0x2856000000000000ULL,
   4033       -1ULL,
   4034       -1ULL,
   4035       0xc000000004000000ULL
   4036     }
   4037 #endif
   4038   },
   4039   { "st2_add", TILEGX_OPC_ST2_ADD, 0x2, 3, TREG_ZERO, 1,
   4040     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4041 #ifndef DISASM_ONLY
   4042     {
   4043       0ULL,
   4044       0xfff8000000000000ULL,
   4045       0ULL,
   4046       0ULL,
   4047       0ULL
   4048     },
   4049     {
   4050       -1ULL,
   4051       0x18d0000000000000ULL,
   4052       -1ULL,
   4053       -1ULL,
   4054       -1ULL
   4055     }
   4056 #endif
   4057   },
   4058   { "st4", TILEGX_OPC_ST4, 0x12, 2, TREG_ZERO, 1,
   4059     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 14, 33 } },
   4060 #ifndef DISASM_ONLY
   4061     {
   4062       0ULL,
   4063       0xfffe000000000000ULL,
   4064       0ULL,
   4065       0ULL,
   4066       0xc200000004000000ULL
   4067     },
   4068     {
   4069       -1ULL,
   4070       0x2858000000000000ULL,
   4071       -1ULL,
   4072       -1ULL,
   4073       0xc200000000000000ULL
   4074     }
   4075 #endif
   4076   },
   4077   { "st4_add", TILEGX_OPC_ST4_ADD, 0x2, 3, TREG_ZERO, 1,
   4078     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4079 #ifndef DISASM_ONLY
   4080     {
   4081       0ULL,
   4082       0xfff8000000000000ULL,
   4083       0ULL,
   4084       0ULL,
   4085       0ULL
   4086     },
   4087     {
   4088       -1ULL,
   4089       0x18d8000000000000ULL,
   4090       -1ULL,
   4091       -1ULL,
   4092       -1ULL
   4093     }
   4094 #endif
   4095   },
   4096   { "st_add", TILEGX_OPC_ST_ADD, 0x2, 3, TREG_ZERO, 1,
   4097     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4098 #ifndef DISASM_ONLY
   4099     {
   4100       0ULL,
   4101       0xfff8000000000000ULL,
   4102       0ULL,
   4103       0ULL,
   4104       0ULL
   4105     },
   4106     {
   4107       -1ULL,
   4108       0x1900000000000000ULL,
   4109       -1ULL,
   4110       -1ULL,
   4111       -1ULL
   4112     }
   4113 #endif
   4114   },
   4115   { "stnt", TILEGX_OPC_STNT, 0x2, 2, TREG_ZERO, 1,
   4116     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
   4117 #ifndef DISASM_ONLY
   4118     {
   4119       0ULL,
   4120       0xfffe000000000000ULL,
   4121       0ULL,
   4122       0ULL,
   4123       0ULL
   4124     },
   4125     {
   4126       -1ULL,
   4127       0x2860000000000000ULL,
   4128       -1ULL,
   4129       -1ULL,
   4130       -1ULL
   4131     }
   4132 #endif
   4133   },
   4134   { "stnt1", TILEGX_OPC_STNT1, 0x2, 2, TREG_ZERO, 1,
   4135     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
   4136 #ifndef DISASM_ONLY
   4137     {
   4138       0ULL,
   4139       0xfffe000000000000ULL,
   4140       0ULL,
   4141       0ULL,
   4142       0ULL
   4143     },
   4144     {
   4145       -1ULL,
   4146       0x285a000000000000ULL,
   4147       -1ULL,
   4148       -1ULL,
   4149       -1ULL
   4150     }
   4151 #endif
   4152   },
   4153   { "stnt1_add", TILEGX_OPC_STNT1_ADD, 0x2, 3, TREG_ZERO, 1,
   4154     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4155 #ifndef DISASM_ONLY
   4156     {
   4157       0ULL,
   4158       0xfff8000000000000ULL,
   4159       0ULL,
   4160       0ULL,
   4161       0ULL
   4162     },
   4163     {
   4164       -1ULL,
   4165       0x18e0000000000000ULL,
   4166       -1ULL,
   4167       -1ULL,
   4168       -1ULL
   4169     }
   4170 #endif
   4171   },
   4172   { "stnt2", TILEGX_OPC_STNT2, 0x2, 2, TREG_ZERO, 1,
   4173     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
   4174 #ifndef DISASM_ONLY
   4175     {
   4176       0ULL,
   4177       0xfffe000000000000ULL,
   4178       0ULL,
   4179       0ULL,
   4180       0ULL
   4181     },
   4182     {
   4183       -1ULL,
   4184       0x285c000000000000ULL,
   4185       -1ULL,
   4186       -1ULL,
   4187       -1ULL
   4188     }
   4189 #endif
   4190   },
   4191   { "stnt2_add", TILEGX_OPC_STNT2_ADD, 0x2, 3, TREG_ZERO, 1,
   4192     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4193 #ifndef DISASM_ONLY
   4194     {
   4195       0ULL,
   4196       0xfff8000000000000ULL,
   4197       0ULL,
   4198       0ULL,
   4199       0ULL
   4200     },
   4201     {
   4202       -1ULL,
   4203       0x18e8000000000000ULL,
   4204       -1ULL,
   4205       -1ULL,
   4206       -1ULL
   4207     }
   4208 #endif
   4209   },
   4210   { "stnt4", TILEGX_OPC_STNT4, 0x2, 2, TREG_ZERO, 1,
   4211     { { 0, }, { 7, 17 }, { 0, }, { 0, }, { 0, } },
   4212 #ifndef DISASM_ONLY
   4213     {
   4214       0ULL,
   4215       0xfffe000000000000ULL,
   4216       0ULL,
   4217       0ULL,
   4218       0ULL
   4219     },
   4220     {
   4221       -1ULL,
   4222       0x285e000000000000ULL,
   4223       -1ULL,
   4224       -1ULL,
   4225       -1ULL
   4226     }
   4227 #endif
   4228   },
   4229   { "stnt4_add", TILEGX_OPC_STNT4_ADD, 0x2, 3, TREG_ZERO, 1,
   4230     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4231 #ifndef DISASM_ONLY
   4232     {
   4233       0ULL,
   4234       0xfff8000000000000ULL,
   4235       0ULL,
   4236       0ULL,
   4237       0ULL
   4238     },
   4239     {
   4240       -1ULL,
   4241       0x18f0000000000000ULL,
   4242       -1ULL,
   4243       -1ULL,
   4244       -1ULL
   4245     }
   4246 #endif
   4247   },
   4248   { "stnt_add", TILEGX_OPC_STNT_ADD, 0x2, 3, TREG_ZERO, 1,
   4249     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
   4250 #ifndef DISASM_ONLY
   4251     {
   4252       0ULL,
   4253       0xfff8000000000000ULL,
   4254       0ULL,
   4255       0ULL,
   4256       0ULL
   4257     },
   4258     {
   4259       -1ULL,
   4260       0x18f8000000000000ULL,
   4261       -1ULL,
   4262       -1ULL,
   4263       -1ULL
   4264     }
   4265 #endif
   4266   },
   4267   { "sub", TILEGX_OPC_SUB, 0xf, 3, TREG_ZERO, 1,
   4268     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   4269 #ifndef DISASM_ONLY
   4270     {
   4271       0xc00000007ffc0000ULL,
   4272       0xfffe000000000000ULL,
   4273       0x00000000780c0000ULL,
   4274       0x3c06000000000000ULL,
   4275       0ULL
   4276     },
   4277     {
   4278       0x0000000051440000ULL,
   4279       0x2868000000000000ULL,
   4280       0x00000000280c0000ULL,
   4281       0x1806000000000000ULL,
   4282       -1ULL
   4283     }
   4284 #endif
   4285   },
   4286   { "subx", TILEGX_OPC_SUBX, 0xf, 3, TREG_ZERO, 1,
   4287     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   4288 #ifndef DISASM_ONLY
   4289     {
   4290       0xc00000007ffc0000ULL,
   4291       0xfffe000000000000ULL,
   4292       0x00000000780c0000ULL,
   4293       0x3c06000000000000ULL,
   4294       0ULL
   4295     },
   4296     {
   4297       0x0000000051400000ULL,
   4298       0x2866000000000000ULL,
   4299       0x0000000028080000ULL,
   4300       0x1804000000000000ULL,
   4301       -1ULL
   4302     }
   4303 #endif
   4304   },
   4305   { "subxsc", TILEGX_OPC_SUBXSC, 0x3, 3, TREG_ZERO, 1,
   4306     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4307 #ifndef DISASM_ONLY
   4308     {
   4309       0xc00000007ffc0000ULL,
   4310       0xfffe000000000000ULL,
   4311       0ULL,
   4312       0ULL,
   4313       0ULL
   4314     },
   4315     {
   4316       0x00000000513c0000ULL,
   4317       0x2864000000000000ULL,
   4318       -1ULL,
   4319       -1ULL,
   4320       -1ULL
   4321     }
   4322 #endif
   4323   },
   4324   { "swint0", TILEGX_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0,
   4325     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   4326 #ifndef DISASM_ONLY
   4327     {
   4328       0ULL,
   4329       0xfffff80000000000ULL,
   4330       0ULL,
   4331       0ULL,
   4332       0ULL
   4333     },
   4334     {
   4335       -1ULL,
   4336       0x286b100000000000ULL,
   4337       -1ULL,
   4338       -1ULL,
   4339       -1ULL
   4340     }
   4341 #endif
   4342   },
   4343   { "swint1", TILEGX_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0,
   4344     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   4345 #ifndef DISASM_ONLY
   4346     {
   4347       0ULL,
   4348       0xfffff80000000000ULL,
   4349       0ULL,
   4350       0ULL,
   4351       0ULL
   4352     },
   4353     {
   4354       -1ULL,
   4355       0x286b180000000000ULL,
   4356       -1ULL,
   4357       -1ULL,
   4358       -1ULL
   4359     }
   4360 #endif
   4361   },
   4362   { "swint2", TILEGX_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0,
   4363     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   4364 #ifndef DISASM_ONLY
   4365     {
   4366       0ULL,
   4367       0xfffff80000000000ULL,
   4368       0ULL,
   4369       0ULL,
   4370       0ULL
   4371     },
   4372     {
   4373       -1ULL,
   4374       0x286b200000000000ULL,
   4375       -1ULL,
   4376       -1ULL,
   4377       -1ULL
   4378     }
   4379 #endif
   4380   },
   4381   { "swint3", TILEGX_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0,
   4382     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   4383 #ifndef DISASM_ONLY
   4384     {
   4385       0ULL,
   4386       0xfffff80000000000ULL,
   4387       0ULL,
   4388       0ULL,
   4389       0ULL
   4390     },
   4391     {
   4392       -1ULL,
   4393       0x286b280000000000ULL,
   4394       -1ULL,
   4395       -1ULL,
   4396       -1ULL
   4397     }
   4398 #endif
   4399   },
   4400   { "tblidxb0", TILEGX_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1,
   4401     { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
   4402 #ifndef DISASM_ONLY
   4403     {
   4404       0xc00000007ffff000ULL,
   4405       0ULL,
   4406       0x00000000780ff000ULL,
   4407       0ULL,
   4408       0ULL
   4409     },
   4410     {
   4411       0x0000000051489000ULL,
   4412       -1ULL,
   4413       0x00000000300c9000ULL,
   4414       -1ULL,
   4415       -1ULL
   4416     }
   4417 #endif
   4418   },
   4419   { "tblidxb1", TILEGX_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1,
   4420     { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
   4421 #ifndef DISASM_ONLY
   4422     {
   4423       0xc00000007ffff000ULL,
   4424       0ULL,
   4425       0x00000000780ff000ULL,
   4426       0ULL,
   4427       0ULL
   4428     },
   4429     {
   4430       0x000000005148a000ULL,
   4431       -1ULL,
   4432       0x00000000300ca000ULL,
   4433       -1ULL,
   4434       -1ULL
   4435     }
   4436 #endif
   4437   },
   4438   { "tblidxb2", TILEGX_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1,
   4439     { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
   4440 #ifndef DISASM_ONLY
   4441     {
   4442       0xc00000007ffff000ULL,
   4443       0ULL,
   4444       0x00000000780ff000ULL,
   4445       0ULL,
   4446       0ULL
   4447     },
   4448     {
   4449       0x000000005148b000ULL,
   4450       -1ULL,
   4451       0x00000000300cb000ULL,
   4452       -1ULL,
   4453       -1ULL
   4454     }
   4455 #endif
   4456   },
   4457   { "tblidxb3", TILEGX_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1,
   4458     { { 23, 9 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
   4459 #ifndef DISASM_ONLY
   4460     {
   4461       0xc00000007ffff000ULL,
   4462       0ULL,
   4463       0x00000000780ff000ULL,
   4464       0ULL,
   4465       0ULL
   4466     },
   4467     {
   4468       0x000000005148c000ULL,
   4469       -1ULL,
   4470       0x00000000300cc000ULL,
   4471       -1ULL,
   4472       -1ULL
   4473     }
   4474 #endif
   4475   },
   4476   { "v1add", TILEGX_OPC_V1ADD, 0x3, 3, TREG_ZERO, 1,
   4477     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4478 #ifndef DISASM_ONLY
   4479     {
   4480       0xc00000007ffc0000ULL,
   4481       0xfffe000000000000ULL,
   4482       0ULL,
   4483       0ULL,
   4484       0ULL
   4485     },
   4486     {
   4487       0x0000000051500000ULL,
   4488       0x286e000000000000ULL,
   4489       -1ULL,
   4490       -1ULL,
   4491       -1ULL
   4492     }
   4493 #endif
   4494   },
   4495   { "v1addi", TILEGX_OPC_V1ADDI, 0x3, 3, TREG_ZERO, 1,
   4496     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   4497 #ifndef DISASM_ONLY
   4498     {
   4499       0xc00000007ff00000ULL,
   4500       0xfff8000000000000ULL,
   4501       0ULL,
   4502       0ULL,
   4503       0ULL
   4504     },
   4505     {
   4506       0x0000000040800000ULL,
   4507       0x1908000000000000ULL,
   4508       -1ULL,
   4509       -1ULL,
   4510       -1ULL
   4511     }
   4512 #endif
   4513   },
   4514   { "v1adduc", TILEGX_OPC_V1ADDUC, 0x3, 3, TREG_ZERO, 1,
   4515     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4516 #ifndef DISASM_ONLY
   4517     {
   4518       0xc00000007ffc0000ULL,
   4519       0xfffe000000000000ULL,
   4520       0ULL,
   4521       0ULL,
   4522       0ULL
   4523     },
   4524     {
   4525       0x00000000514c0000ULL,
   4526       0x286c000000000000ULL,
   4527       -1ULL,
   4528       -1ULL,
   4529       -1ULL
   4530     }
   4531 #endif
   4532   },
   4533   { "v1adiffu", TILEGX_OPC_V1ADIFFU, 0x1, 3, TREG_ZERO, 1,
   4534     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4535 #ifndef DISASM_ONLY
   4536     {
   4537       0xc00000007ffc0000ULL,
   4538       0ULL,
   4539       0ULL,
   4540       0ULL,
   4541       0ULL
   4542     },
   4543     {
   4544       0x0000000051540000ULL,
   4545       -1ULL,
   4546       -1ULL,
   4547       -1ULL,
   4548       -1ULL
   4549     }
   4550 #endif
   4551   },
   4552   { "v1avgu", TILEGX_OPC_V1AVGU, 0x1, 3, TREG_ZERO, 1,
   4553     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4554 #ifndef DISASM_ONLY
   4555     {
   4556       0xc00000007ffc0000ULL,
   4557       0ULL,
   4558       0ULL,
   4559       0ULL,
   4560       0ULL
   4561     },
   4562     {
   4563       0x0000000051580000ULL,
   4564       -1ULL,
   4565       -1ULL,
   4566       -1ULL,
   4567       -1ULL
   4568     }
   4569 #endif
   4570   },
   4571   { "v1cmpeq", TILEGX_OPC_V1CMPEQ, 0x3, 3, TREG_ZERO, 1,
   4572     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4573 #ifndef DISASM_ONLY
   4574     {
   4575       0xc00000007ffc0000ULL,
   4576       0xfffe000000000000ULL,
   4577       0ULL,
   4578       0ULL,
   4579       0ULL
   4580     },
   4581     {
   4582       0x00000000515c0000ULL,
   4583       0x2870000000000000ULL,
   4584       -1ULL,
   4585       -1ULL,
   4586       -1ULL
   4587     }
   4588 #endif
   4589   },
   4590   { "v1cmpeqi", TILEGX_OPC_V1CMPEQI, 0x3, 3, TREG_ZERO, 1,
   4591     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   4592 #ifndef DISASM_ONLY
   4593     {
   4594       0xc00000007ff00000ULL,
   4595       0xfff8000000000000ULL,
   4596       0ULL,
   4597       0ULL,
   4598       0ULL
   4599     },
   4600     {
   4601       0x0000000040900000ULL,
   4602       0x1910000000000000ULL,
   4603       -1ULL,
   4604       -1ULL,
   4605       -1ULL
   4606     }
   4607 #endif
   4608   },
   4609   { "v1cmples", TILEGX_OPC_V1CMPLES, 0x3, 3, TREG_ZERO, 1,
   4610     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4611 #ifndef DISASM_ONLY
   4612     {
   4613       0xc00000007ffc0000ULL,
   4614       0xfffe000000000000ULL,
   4615       0ULL,
   4616       0ULL,
   4617       0ULL
   4618     },
   4619     {
   4620       0x0000000051600000ULL,
   4621       0x2872000000000000ULL,
   4622       -1ULL,
   4623       -1ULL,
   4624       -1ULL
   4625     }
   4626 #endif
   4627   },
   4628   { "v1cmpleu", TILEGX_OPC_V1CMPLEU, 0x3, 3, TREG_ZERO, 1,
   4629     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4630 #ifndef DISASM_ONLY
   4631     {
   4632       0xc00000007ffc0000ULL,
   4633       0xfffe000000000000ULL,
   4634       0ULL,
   4635       0ULL,
   4636       0ULL
   4637     },
   4638     {
   4639       0x0000000051640000ULL,
   4640       0x2874000000000000ULL,
   4641       -1ULL,
   4642       -1ULL,
   4643       -1ULL
   4644     }
   4645 #endif
   4646   },
   4647   { "v1cmplts", TILEGX_OPC_V1CMPLTS, 0x3, 3, TREG_ZERO, 1,
   4648     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4649 #ifndef DISASM_ONLY
   4650     {
   4651       0xc00000007ffc0000ULL,
   4652       0xfffe000000000000ULL,
   4653       0ULL,
   4654       0ULL,
   4655       0ULL
   4656     },
   4657     {
   4658       0x0000000051680000ULL,
   4659       0x2876000000000000ULL,
   4660       -1ULL,
   4661       -1ULL,
   4662       -1ULL
   4663     }
   4664 #endif
   4665   },
   4666   { "v1cmpltsi", TILEGX_OPC_V1CMPLTSI, 0x3, 3, TREG_ZERO, 1,
   4667     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   4668 #ifndef DISASM_ONLY
   4669     {
   4670       0xc00000007ff00000ULL,
   4671       0xfff8000000000000ULL,
   4672       0ULL,
   4673       0ULL,
   4674       0ULL
   4675     },
   4676     {
   4677       0x0000000040a00000ULL,
   4678       0x1918000000000000ULL,
   4679       -1ULL,
   4680       -1ULL,
   4681       -1ULL
   4682     }
   4683 #endif
   4684   },
   4685   { "v1cmpltu", TILEGX_OPC_V1CMPLTU, 0x3, 3, TREG_ZERO, 1,
   4686     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4687 #ifndef DISASM_ONLY
   4688     {
   4689       0xc00000007ffc0000ULL,
   4690       0xfffe000000000000ULL,
   4691       0ULL,
   4692       0ULL,
   4693       0ULL
   4694     },
   4695     {
   4696       0x00000000516c0000ULL,
   4697       0x2878000000000000ULL,
   4698       -1ULL,
   4699       -1ULL,
   4700       -1ULL
   4701     }
   4702 #endif
   4703   },
   4704   { "v1cmpltui", TILEGX_OPC_V1CMPLTUI, 0x3, 3, TREG_ZERO, 1,
   4705     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   4706 #ifndef DISASM_ONLY
   4707     {
   4708       0xc00000007ff00000ULL,
   4709       0xfff8000000000000ULL,
   4710       0ULL,
   4711       0ULL,
   4712       0ULL
   4713     },
   4714     {
   4715       0x0000000040b00000ULL,
   4716       0x1920000000000000ULL,
   4717       -1ULL,
   4718       -1ULL,
   4719       -1ULL
   4720     }
   4721 #endif
   4722   },
   4723   { "v1cmpne", TILEGX_OPC_V1CMPNE, 0x3, 3, TREG_ZERO, 1,
   4724     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4725 #ifndef DISASM_ONLY
   4726     {
   4727       0xc00000007ffc0000ULL,
   4728       0xfffe000000000000ULL,
   4729       0ULL,
   4730       0ULL,
   4731       0ULL
   4732     },
   4733     {
   4734       0x0000000051700000ULL,
   4735       0x287a000000000000ULL,
   4736       -1ULL,
   4737       -1ULL,
   4738       -1ULL
   4739     }
   4740 #endif
   4741   },
   4742   { "v1ddotpu", TILEGX_OPC_V1DDOTPU, 0x1, 3, TREG_ZERO, 1,
   4743     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4744 #ifndef DISASM_ONLY
   4745     {
   4746       0xc00000007ffc0000ULL,
   4747       0ULL,
   4748       0ULL,
   4749       0ULL,
   4750       0ULL
   4751     },
   4752     {
   4753       0x0000000052880000ULL,
   4754       -1ULL,
   4755       -1ULL,
   4756       -1ULL,
   4757       -1ULL
   4758     }
   4759 #endif
   4760   },
   4761   { "v1ddotpua", TILEGX_OPC_V1DDOTPUA, 0x1, 3, TREG_ZERO, 1,
   4762     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4763 #ifndef DISASM_ONLY
   4764     {
   4765       0xc00000007ffc0000ULL,
   4766       0ULL,
   4767       0ULL,
   4768       0ULL,
   4769       0ULL
   4770     },
   4771     {
   4772       0x0000000052840000ULL,
   4773       -1ULL,
   4774       -1ULL,
   4775       -1ULL,
   4776       -1ULL
   4777     }
   4778 #endif
   4779   },
   4780   { "v1ddotpus", TILEGX_OPC_V1DDOTPUS, 0x1, 3, TREG_ZERO, 1,
   4781     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4782 #ifndef DISASM_ONLY
   4783     {
   4784       0xc00000007ffc0000ULL,
   4785       0ULL,
   4786       0ULL,
   4787       0ULL,
   4788       0ULL
   4789     },
   4790     {
   4791       0x0000000051780000ULL,
   4792       -1ULL,
   4793       -1ULL,
   4794       -1ULL,
   4795       -1ULL
   4796     }
   4797 #endif
   4798   },
   4799   { "v1ddotpusa", TILEGX_OPC_V1DDOTPUSA, 0x1, 3, TREG_ZERO, 1,
   4800     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4801 #ifndef DISASM_ONLY
   4802     {
   4803       0xc00000007ffc0000ULL,
   4804       0ULL,
   4805       0ULL,
   4806       0ULL,
   4807       0ULL
   4808     },
   4809     {
   4810       0x0000000051740000ULL,
   4811       -1ULL,
   4812       -1ULL,
   4813       -1ULL,
   4814       -1ULL
   4815     }
   4816 #endif
   4817   },
   4818   { "v1dotp", TILEGX_OPC_V1DOTP, 0x1, 3, TREG_ZERO, 1,
   4819     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4820 #ifndef DISASM_ONLY
   4821     {
   4822       0xc00000007ffc0000ULL,
   4823       0ULL,
   4824       0ULL,
   4825       0ULL,
   4826       0ULL
   4827     },
   4828     {
   4829       0x0000000051880000ULL,
   4830       -1ULL,
   4831       -1ULL,
   4832       -1ULL,
   4833       -1ULL
   4834     }
   4835 #endif
   4836   },
   4837   { "v1dotpa", TILEGX_OPC_V1DOTPA, 0x1, 3, TREG_ZERO, 1,
   4838     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4839 #ifndef DISASM_ONLY
   4840     {
   4841       0xc00000007ffc0000ULL,
   4842       0ULL,
   4843       0ULL,
   4844       0ULL,
   4845       0ULL
   4846     },
   4847     {
   4848       0x00000000517c0000ULL,
   4849       -1ULL,
   4850       -1ULL,
   4851       -1ULL,
   4852       -1ULL
   4853     }
   4854 #endif
   4855   },
   4856   { "v1dotpu", TILEGX_OPC_V1DOTPU, 0x1, 3, TREG_ZERO, 1,
   4857     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4858 #ifndef DISASM_ONLY
   4859     {
   4860       0xc00000007ffc0000ULL,
   4861       0ULL,
   4862       0ULL,
   4863       0ULL,
   4864       0ULL
   4865     },
   4866     {
   4867       0x0000000052900000ULL,
   4868       -1ULL,
   4869       -1ULL,
   4870       -1ULL,
   4871       -1ULL
   4872     }
   4873 #endif
   4874   },
   4875   { "v1dotpua", TILEGX_OPC_V1DOTPUA, 0x1, 3, TREG_ZERO, 1,
   4876     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4877 #ifndef DISASM_ONLY
   4878     {
   4879       0xc00000007ffc0000ULL,
   4880       0ULL,
   4881       0ULL,
   4882       0ULL,
   4883       0ULL
   4884     },
   4885     {
   4886       0x00000000528c0000ULL,
   4887       -1ULL,
   4888       -1ULL,
   4889       -1ULL,
   4890       -1ULL
   4891     }
   4892 #endif
   4893   },
   4894   { "v1dotpus", TILEGX_OPC_V1DOTPUS, 0x1, 3, TREG_ZERO, 1,
   4895     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4896 #ifndef DISASM_ONLY
   4897     {
   4898       0xc00000007ffc0000ULL,
   4899       0ULL,
   4900       0ULL,
   4901       0ULL,
   4902       0ULL
   4903     },
   4904     {
   4905       0x0000000051840000ULL,
   4906       -1ULL,
   4907       -1ULL,
   4908       -1ULL,
   4909       -1ULL
   4910     }
   4911 #endif
   4912   },
   4913   { "v1dotpusa", TILEGX_OPC_V1DOTPUSA, 0x1, 3, TREG_ZERO, 1,
   4914     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   4915 #ifndef DISASM_ONLY
   4916     {
   4917       0xc00000007ffc0000ULL,
   4918       0ULL,
   4919       0ULL,
   4920       0ULL,
   4921       0ULL
   4922     },
   4923     {
   4924       0x0000000051800000ULL,
   4925       -1ULL,
   4926       -1ULL,
   4927       -1ULL,
   4928       -1ULL
   4929     }
   4930 #endif
   4931   },
   4932   { "v1int_h", TILEGX_OPC_V1INT_H, 0x3, 3, TREG_ZERO, 1,
   4933     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4934 #ifndef DISASM_ONLY
   4935     {
   4936       0xc00000007ffc0000ULL,
   4937       0xfffe000000000000ULL,
   4938       0ULL,
   4939       0ULL,
   4940       0ULL
   4941     },
   4942     {
   4943       0x00000000518c0000ULL,
   4944       0x287c000000000000ULL,
   4945       -1ULL,
   4946       -1ULL,
   4947       -1ULL
   4948     }
   4949 #endif
   4950   },
   4951   { "v1int_l", TILEGX_OPC_V1INT_L, 0x3, 3, TREG_ZERO, 1,
   4952     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4953 #ifndef DISASM_ONLY
   4954     {
   4955       0xc00000007ffc0000ULL,
   4956       0xfffe000000000000ULL,
   4957       0ULL,
   4958       0ULL,
   4959       0ULL
   4960     },
   4961     {
   4962       0x0000000051900000ULL,
   4963       0x287e000000000000ULL,
   4964       -1ULL,
   4965       -1ULL,
   4966       -1ULL
   4967     }
   4968 #endif
   4969   },
   4970   { "v1maxu", TILEGX_OPC_V1MAXU, 0x3, 3, TREG_ZERO, 1,
   4971     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   4972 #ifndef DISASM_ONLY
   4973     {
   4974       0xc00000007ffc0000ULL,
   4975       0xfffe000000000000ULL,
   4976       0ULL,
   4977       0ULL,
   4978       0ULL
   4979     },
   4980     {
   4981       0x0000000051940000ULL,
   4982       0x2880000000000000ULL,
   4983       -1ULL,
   4984       -1ULL,
   4985       -1ULL
   4986     }
   4987 #endif
   4988   },
   4989   { "v1maxui", TILEGX_OPC_V1MAXUI, 0x3, 3, TREG_ZERO, 1,
   4990     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   4991 #ifndef DISASM_ONLY
   4992     {
   4993       0xc00000007ff00000ULL,
   4994       0xfff8000000000000ULL,
   4995       0ULL,
   4996       0ULL,
   4997       0ULL
   4998     },
   4999     {
   5000       0x0000000040c00000ULL,
   5001       0x1928000000000000ULL,
   5002       -1ULL,
   5003       -1ULL,
   5004       -1ULL
   5005     }
   5006 #endif
   5007   },
   5008   { "v1minu", TILEGX_OPC_V1MINU, 0x3, 3, TREG_ZERO, 1,
   5009     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5010 #ifndef DISASM_ONLY
   5011     {
   5012       0xc00000007ffc0000ULL,
   5013       0xfffe000000000000ULL,
   5014       0ULL,
   5015       0ULL,
   5016       0ULL
   5017     },
   5018     {
   5019       0x0000000051980000ULL,
   5020       0x2882000000000000ULL,
   5021       -1ULL,
   5022       -1ULL,
   5023       -1ULL
   5024     }
   5025 #endif
   5026   },
   5027   { "v1minui", TILEGX_OPC_V1MINUI, 0x3, 3, TREG_ZERO, 1,
   5028     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   5029 #ifndef DISASM_ONLY
   5030     {
   5031       0xc00000007ff00000ULL,
   5032       0xfff8000000000000ULL,
   5033       0ULL,
   5034       0ULL,
   5035       0ULL
   5036     },
   5037     {
   5038       0x0000000040d00000ULL,
   5039       0x1930000000000000ULL,
   5040       -1ULL,
   5041       -1ULL,
   5042       -1ULL
   5043     }
   5044 #endif
   5045   },
   5046   { "v1mnz", TILEGX_OPC_V1MNZ, 0x3, 3, TREG_ZERO, 1,
   5047     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5048 #ifndef DISASM_ONLY
   5049     {
   5050       0xc00000007ffc0000ULL,
   5051       0xfffe000000000000ULL,
   5052       0ULL,
   5053       0ULL,
   5054       0ULL
   5055     },
   5056     {
   5057       0x00000000519c0000ULL,
   5058       0x2884000000000000ULL,
   5059       -1ULL,
   5060       -1ULL,
   5061       -1ULL
   5062     }
   5063 #endif
   5064   },
   5065   { "v1multu", TILEGX_OPC_V1MULTU, 0x1, 3, TREG_ZERO, 1,
   5066     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5067 #ifndef DISASM_ONLY
   5068     {
   5069       0xc00000007ffc0000ULL,
   5070       0ULL,
   5071       0ULL,
   5072       0ULL,
   5073       0ULL
   5074     },
   5075     {
   5076       0x0000000051a00000ULL,
   5077       -1ULL,
   5078       -1ULL,
   5079       -1ULL,
   5080       -1ULL
   5081     }
   5082 #endif
   5083   },
   5084   { "v1mulu", TILEGX_OPC_V1MULU, 0x1, 3, TREG_ZERO, 1,
   5085     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5086 #ifndef DISASM_ONLY
   5087     {
   5088       0xc00000007ffc0000ULL,
   5089       0ULL,
   5090       0ULL,
   5091       0ULL,
   5092       0ULL
   5093     },
   5094     {
   5095       0x0000000051a80000ULL,
   5096       -1ULL,
   5097       -1ULL,
   5098       -1ULL,
   5099       -1ULL
   5100     }
   5101 #endif
   5102   },
   5103   { "v1mulus", TILEGX_OPC_V1MULUS, 0x1, 3, TREG_ZERO, 1,
   5104     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5105 #ifndef DISASM_ONLY
   5106     {
   5107       0xc00000007ffc0000ULL,
   5108       0ULL,
   5109       0ULL,
   5110       0ULL,
   5111       0ULL
   5112     },
   5113     {
   5114       0x0000000051a40000ULL,
   5115       -1ULL,
   5116       -1ULL,
   5117       -1ULL,
   5118       -1ULL
   5119     }
   5120 #endif
   5121   },
   5122   { "v1mz", TILEGX_OPC_V1MZ, 0x3, 3, TREG_ZERO, 1,
   5123     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5124 #ifndef DISASM_ONLY
   5125     {
   5126       0xc00000007ffc0000ULL,
   5127       0xfffe000000000000ULL,
   5128       0ULL,
   5129       0ULL,
   5130       0ULL
   5131     },
   5132     {
   5133       0x0000000051ac0000ULL,
   5134       0x2886000000000000ULL,
   5135       -1ULL,
   5136       -1ULL,
   5137       -1ULL
   5138     }
   5139 #endif
   5140   },
   5141   { "v1sadau", TILEGX_OPC_V1SADAU, 0x1, 3, TREG_ZERO, 1,
   5142     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5143 #ifndef DISASM_ONLY
   5144     {
   5145       0xc00000007ffc0000ULL,
   5146       0ULL,
   5147       0ULL,
   5148       0ULL,
   5149       0ULL
   5150     },
   5151     {
   5152       0x0000000051b00000ULL,
   5153       -1ULL,
   5154       -1ULL,
   5155       -1ULL,
   5156       -1ULL
   5157     }
   5158 #endif
   5159   },
   5160   { "v1sadu", TILEGX_OPC_V1SADU, 0x1, 3, TREG_ZERO, 1,
   5161     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5162 #ifndef DISASM_ONLY
   5163     {
   5164       0xc00000007ffc0000ULL,
   5165       0ULL,
   5166       0ULL,
   5167       0ULL,
   5168       0ULL
   5169     },
   5170     {
   5171       0x0000000051b40000ULL,
   5172       -1ULL,
   5173       -1ULL,
   5174       -1ULL,
   5175       -1ULL
   5176     }
   5177 #endif
   5178   },
   5179   { "v1shl", TILEGX_OPC_V1SHL, 0x3, 3, TREG_ZERO, 1,
   5180     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5181 #ifndef DISASM_ONLY
   5182     {
   5183       0xc00000007ffc0000ULL,
   5184       0xfffe000000000000ULL,
   5185       0ULL,
   5186       0ULL,
   5187       0ULL
   5188     },
   5189     {
   5190       0x0000000051b80000ULL,
   5191       0x2888000000000000ULL,
   5192       -1ULL,
   5193       -1ULL,
   5194       -1ULL
   5195     }
   5196 #endif
   5197   },
   5198   { "v1shli", TILEGX_OPC_V1SHLI, 0x3, 3, TREG_ZERO, 1,
   5199     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   5200 #ifndef DISASM_ONLY
   5201     {
   5202       0xc00000007ffc0000ULL,
   5203       0xfffe000000000000ULL,
   5204       0ULL,
   5205       0ULL,
   5206       0ULL
   5207     },
   5208     {
   5209       0x00000000601c0000ULL,
   5210       0x300e000000000000ULL,
   5211       -1ULL,
   5212       -1ULL,
   5213       -1ULL
   5214     }
   5215 #endif
   5216   },
   5217   { "v1shrs", TILEGX_OPC_V1SHRS, 0x3, 3, TREG_ZERO, 1,
   5218     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5219 #ifndef DISASM_ONLY
   5220     {
   5221       0xc00000007ffc0000ULL,
   5222       0xfffe000000000000ULL,
   5223       0ULL,
   5224       0ULL,
   5225       0ULL
   5226     },
   5227     {
   5228       0x0000000051bc0000ULL,
   5229       0x288a000000000000ULL,
   5230       -1ULL,
   5231       -1ULL,
   5232       -1ULL
   5233     }
   5234 #endif
   5235   },
   5236   { "v1shrsi", TILEGX_OPC_V1SHRSI, 0x3, 3, TREG_ZERO, 1,
   5237     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   5238 #ifndef DISASM_ONLY
   5239     {
   5240       0xc00000007ffc0000ULL,
   5241       0xfffe000000000000ULL,
   5242       0ULL,
   5243       0ULL,
   5244       0ULL
   5245     },
   5246     {
   5247       0x0000000060200000ULL,
   5248       0x3010000000000000ULL,
   5249       -1ULL,
   5250       -1ULL,
   5251       -1ULL
   5252     }
   5253 #endif
   5254   },
   5255   { "v1shru", TILEGX_OPC_V1SHRU, 0x3, 3, TREG_ZERO, 1,
   5256     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5257 #ifndef DISASM_ONLY
   5258     {
   5259       0xc00000007ffc0000ULL,
   5260       0xfffe000000000000ULL,
   5261       0ULL,
   5262       0ULL,
   5263       0ULL
   5264     },
   5265     {
   5266       0x0000000051c00000ULL,
   5267       0x288c000000000000ULL,
   5268       -1ULL,
   5269       -1ULL,
   5270       -1ULL
   5271     }
   5272 #endif
   5273   },
   5274   { "v1shrui", TILEGX_OPC_V1SHRUI, 0x3, 3, TREG_ZERO, 1,
   5275     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   5276 #ifndef DISASM_ONLY
   5277     {
   5278       0xc00000007ffc0000ULL,
   5279       0xfffe000000000000ULL,
   5280       0ULL,
   5281       0ULL,
   5282       0ULL
   5283     },
   5284     {
   5285       0x0000000060240000ULL,
   5286       0x3012000000000000ULL,
   5287       -1ULL,
   5288       -1ULL,
   5289       -1ULL
   5290     }
   5291 #endif
   5292   },
   5293   { "v1sub", TILEGX_OPC_V1SUB, 0x3, 3, TREG_ZERO, 1,
   5294     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5295 #ifndef DISASM_ONLY
   5296     {
   5297       0xc00000007ffc0000ULL,
   5298       0xfffe000000000000ULL,
   5299       0ULL,
   5300       0ULL,
   5301       0ULL
   5302     },
   5303     {
   5304       0x0000000051c80000ULL,
   5305       0x2890000000000000ULL,
   5306       -1ULL,
   5307       -1ULL,
   5308       -1ULL
   5309     }
   5310 #endif
   5311   },
   5312   { "v1subuc", TILEGX_OPC_V1SUBUC, 0x3, 3, TREG_ZERO, 1,
   5313     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5314 #ifndef DISASM_ONLY
   5315     {
   5316       0xc00000007ffc0000ULL,
   5317       0xfffe000000000000ULL,
   5318       0ULL,
   5319       0ULL,
   5320       0ULL
   5321     },
   5322     {
   5323       0x0000000051c40000ULL,
   5324       0x288e000000000000ULL,
   5325       -1ULL,
   5326       -1ULL,
   5327       -1ULL
   5328     }
   5329 #endif
   5330   },
   5331   { "v2add", TILEGX_OPC_V2ADD, 0x3, 3, TREG_ZERO, 1,
   5332     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5333 #ifndef DISASM_ONLY
   5334     {
   5335       0xc00000007ffc0000ULL,
   5336       0xfffe000000000000ULL,
   5337       0ULL,
   5338       0ULL,
   5339       0ULL
   5340     },
   5341     {
   5342       0x0000000051d00000ULL,
   5343       0x2894000000000000ULL,
   5344       -1ULL,
   5345       -1ULL,
   5346       -1ULL
   5347     }
   5348 #endif
   5349   },
   5350   { "v2addi", TILEGX_OPC_V2ADDI, 0x3, 3, TREG_ZERO, 1,
   5351     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   5352 #ifndef DISASM_ONLY
   5353     {
   5354       0xc00000007ff00000ULL,
   5355       0xfff8000000000000ULL,
   5356       0ULL,
   5357       0ULL,
   5358       0ULL
   5359     },
   5360     {
   5361       0x0000000040e00000ULL,
   5362       0x1938000000000000ULL,
   5363       -1ULL,
   5364       -1ULL,
   5365       -1ULL
   5366     }
   5367 #endif
   5368   },
   5369   { "v2addsc", TILEGX_OPC_V2ADDSC, 0x3, 3, TREG_ZERO, 1,
   5370     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5371 #ifndef DISASM_ONLY
   5372     {
   5373       0xc00000007ffc0000ULL,
   5374       0xfffe000000000000ULL,
   5375       0ULL,
   5376       0ULL,
   5377       0ULL
   5378     },
   5379     {
   5380       0x0000000051cc0000ULL,
   5381       0x2892000000000000ULL,
   5382       -1ULL,
   5383       -1ULL,
   5384       -1ULL
   5385     }
   5386 #endif
   5387   },
   5388   { "v2adiffs", TILEGX_OPC_V2ADIFFS, 0x1, 3, TREG_ZERO, 1,
   5389     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5390 #ifndef DISASM_ONLY
   5391     {
   5392       0xc00000007ffc0000ULL,
   5393       0ULL,
   5394       0ULL,
   5395       0ULL,
   5396       0ULL
   5397     },
   5398     {
   5399       0x0000000051d40000ULL,
   5400       -1ULL,
   5401       -1ULL,
   5402       -1ULL,
   5403       -1ULL
   5404     }
   5405 #endif
   5406   },
   5407   { "v2avgs", TILEGX_OPC_V2AVGS, 0x1, 3, TREG_ZERO, 1,
   5408     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5409 #ifndef DISASM_ONLY
   5410     {
   5411       0xc00000007ffc0000ULL,
   5412       0ULL,
   5413       0ULL,
   5414       0ULL,
   5415       0ULL
   5416     },
   5417     {
   5418       0x0000000051d80000ULL,
   5419       -1ULL,
   5420       -1ULL,
   5421       -1ULL,
   5422       -1ULL
   5423     }
   5424 #endif
   5425   },
   5426   { "v2cmpeq", TILEGX_OPC_V2CMPEQ, 0x3, 3, TREG_ZERO, 1,
   5427     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5428 #ifndef DISASM_ONLY
   5429     {
   5430       0xc00000007ffc0000ULL,
   5431       0xfffe000000000000ULL,
   5432       0ULL,
   5433       0ULL,
   5434       0ULL
   5435     },
   5436     {
   5437       0x0000000051dc0000ULL,
   5438       0x2896000000000000ULL,
   5439       -1ULL,
   5440       -1ULL,
   5441       -1ULL
   5442     }
   5443 #endif
   5444   },
   5445   { "v2cmpeqi", TILEGX_OPC_V2CMPEQI, 0x3, 3, TREG_ZERO, 1,
   5446     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   5447 #ifndef DISASM_ONLY
   5448     {
   5449       0xc00000007ff00000ULL,
   5450       0xfff8000000000000ULL,
   5451       0ULL,
   5452       0ULL,
   5453       0ULL
   5454     },
   5455     {
   5456       0x0000000040f00000ULL,
   5457       0x1940000000000000ULL,
   5458       -1ULL,
   5459       -1ULL,
   5460       -1ULL
   5461     }
   5462 #endif
   5463   },
   5464   { "v2cmples", TILEGX_OPC_V2CMPLES, 0x3, 3, TREG_ZERO, 1,
   5465     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5466 #ifndef DISASM_ONLY
   5467     {
   5468       0xc00000007ffc0000ULL,
   5469       0xfffe000000000000ULL,
   5470       0ULL,
   5471       0ULL,
   5472       0ULL
   5473     },
   5474     {
   5475       0x0000000051e00000ULL,
   5476       0x2898000000000000ULL,
   5477       -1ULL,
   5478       -1ULL,
   5479       -1ULL
   5480     }
   5481 #endif
   5482   },
   5483   { "v2cmpleu", TILEGX_OPC_V2CMPLEU, 0x3, 3, TREG_ZERO, 1,
   5484     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5485 #ifndef DISASM_ONLY
   5486     {
   5487       0xc00000007ffc0000ULL,
   5488       0xfffe000000000000ULL,
   5489       0ULL,
   5490       0ULL,
   5491       0ULL
   5492     },
   5493     {
   5494       0x0000000051e40000ULL,
   5495       0x289a000000000000ULL,
   5496       -1ULL,
   5497       -1ULL,
   5498       -1ULL
   5499     }
   5500 #endif
   5501   },
   5502   { "v2cmplts", TILEGX_OPC_V2CMPLTS, 0x3, 3, TREG_ZERO, 1,
   5503     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5504 #ifndef DISASM_ONLY
   5505     {
   5506       0xc00000007ffc0000ULL,
   5507       0xfffe000000000000ULL,
   5508       0ULL,
   5509       0ULL,
   5510       0ULL
   5511     },
   5512     {
   5513       0x0000000051e80000ULL,
   5514       0x289c000000000000ULL,
   5515       -1ULL,
   5516       -1ULL,
   5517       -1ULL
   5518     }
   5519 #endif
   5520   },
   5521   { "v2cmpltsi", TILEGX_OPC_V2CMPLTSI, 0x3, 3, TREG_ZERO, 1,
   5522     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   5523 #ifndef DISASM_ONLY
   5524     {
   5525       0xc00000007ff00000ULL,
   5526       0xfff8000000000000ULL,
   5527       0ULL,
   5528       0ULL,
   5529       0ULL
   5530     },
   5531     {
   5532       0x0000000041000000ULL,
   5533       0x1948000000000000ULL,
   5534       -1ULL,
   5535       -1ULL,
   5536       -1ULL
   5537     }
   5538 #endif
   5539   },
   5540   { "v2cmpltu", TILEGX_OPC_V2CMPLTU, 0x3, 3, TREG_ZERO, 1,
   5541     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5542 #ifndef DISASM_ONLY
   5543     {
   5544       0xc00000007ffc0000ULL,
   5545       0xfffe000000000000ULL,
   5546       0ULL,
   5547       0ULL,
   5548       0ULL
   5549     },
   5550     {
   5551       0x0000000051ec0000ULL,
   5552       0x289e000000000000ULL,
   5553       -1ULL,
   5554       -1ULL,
   5555       -1ULL
   5556     }
   5557 #endif
   5558   },
   5559   { "v2cmpltui", TILEGX_OPC_V2CMPLTUI, 0x3, 3, TREG_ZERO, 1,
   5560     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   5561 #ifndef DISASM_ONLY
   5562     {
   5563       0xc00000007ff00000ULL,
   5564       0xfff8000000000000ULL,
   5565       0ULL,
   5566       0ULL,
   5567       0ULL
   5568     },
   5569     {
   5570       0x0000000041100000ULL,
   5571       0x1950000000000000ULL,
   5572       -1ULL,
   5573       -1ULL,
   5574       -1ULL
   5575     }
   5576 #endif
   5577   },
   5578   { "v2cmpne", TILEGX_OPC_V2CMPNE, 0x3, 3, TREG_ZERO, 1,
   5579     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5580 #ifndef DISASM_ONLY
   5581     {
   5582       0xc00000007ffc0000ULL,
   5583       0xfffe000000000000ULL,
   5584       0ULL,
   5585       0ULL,
   5586       0ULL
   5587     },
   5588     {
   5589       0x0000000051f00000ULL,
   5590       0x28a0000000000000ULL,
   5591       -1ULL,
   5592       -1ULL,
   5593       -1ULL
   5594     }
   5595 #endif
   5596   },
   5597   { "v2dotp", TILEGX_OPC_V2DOTP, 0x1, 3, TREG_ZERO, 1,
   5598     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5599 #ifndef DISASM_ONLY
   5600     {
   5601       0xc00000007ffc0000ULL,
   5602       0ULL,
   5603       0ULL,
   5604       0ULL,
   5605       0ULL
   5606     },
   5607     {
   5608       0x0000000051f80000ULL,
   5609       -1ULL,
   5610       -1ULL,
   5611       -1ULL,
   5612       -1ULL
   5613     }
   5614 #endif
   5615   },
   5616   { "v2dotpa", TILEGX_OPC_V2DOTPA, 0x1, 3, TREG_ZERO, 1,
   5617     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5618 #ifndef DISASM_ONLY
   5619     {
   5620       0xc00000007ffc0000ULL,
   5621       0ULL,
   5622       0ULL,
   5623       0ULL,
   5624       0ULL
   5625     },
   5626     {
   5627       0x0000000051f40000ULL,
   5628       -1ULL,
   5629       -1ULL,
   5630       -1ULL,
   5631       -1ULL
   5632     }
   5633 #endif
   5634   },
   5635   { "v2int_h", TILEGX_OPC_V2INT_H, 0x3, 3, TREG_ZERO, 1,
   5636     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5637 #ifndef DISASM_ONLY
   5638     {
   5639       0xc00000007ffc0000ULL,
   5640       0xfffe000000000000ULL,
   5641       0ULL,
   5642       0ULL,
   5643       0ULL
   5644     },
   5645     {
   5646       0x0000000051fc0000ULL,
   5647       0x28a2000000000000ULL,
   5648       -1ULL,
   5649       -1ULL,
   5650       -1ULL
   5651     }
   5652 #endif
   5653   },
   5654   { "v2int_l", TILEGX_OPC_V2INT_L, 0x3, 3, TREG_ZERO, 1,
   5655     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5656 #ifndef DISASM_ONLY
   5657     {
   5658       0xc00000007ffc0000ULL,
   5659       0xfffe000000000000ULL,
   5660       0ULL,
   5661       0ULL,
   5662       0ULL
   5663     },
   5664     {
   5665       0x0000000052000000ULL,
   5666       0x28a4000000000000ULL,
   5667       -1ULL,
   5668       -1ULL,
   5669       -1ULL
   5670     }
   5671 #endif
   5672   },
   5673   { "v2maxs", TILEGX_OPC_V2MAXS, 0x3, 3, TREG_ZERO, 1,
   5674     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5675 #ifndef DISASM_ONLY
   5676     {
   5677       0xc00000007ffc0000ULL,
   5678       0xfffe000000000000ULL,
   5679       0ULL,
   5680       0ULL,
   5681       0ULL
   5682     },
   5683     {
   5684       0x0000000052040000ULL,
   5685       0x28a6000000000000ULL,
   5686       -1ULL,
   5687       -1ULL,
   5688       -1ULL
   5689     }
   5690 #endif
   5691   },
   5692   { "v2maxsi", TILEGX_OPC_V2MAXSI, 0x3, 3, TREG_ZERO, 1,
   5693     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   5694 #ifndef DISASM_ONLY
   5695     {
   5696       0xc00000007ff00000ULL,
   5697       0xfff8000000000000ULL,
   5698       0ULL,
   5699       0ULL,
   5700       0ULL
   5701     },
   5702     {
   5703       0x0000000041200000ULL,
   5704       0x1958000000000000ULL,
   5705       -1ULL,
   5706       -1ULL,
   5707       -1ULL
   5708     }
   5709 #endif
   5710   },
   5711   { "v2mins", TILEGX_OPC_V2MINS, 0x3, 3, TREG_ZERO, 1,
   5712     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5713 #ifndef DISASM_ONLY
   5714     {
   5715       0xc00000007ffc0000ULL,
   5716       0xfffe000000000000ULL,
   5717       0ULL,
   5718       0ULL,
   5719       0ULL
   5720     },
   5721     {
   5722       0x0000000052080000ULL,
   5723       0x28a8000000000000ULL,
   5724       -1ULL,
   5725       -1ULL,
   5726       -1ULL
   5727     }
   5728 #endif
   5729   },
   5730   { "v2minsi", TILEGX_OPC_V2MINSI, 0x3, 3, TREG_ZERO, 1,
   5731     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   5732 #ifndef DISASM_ONLY
   5733     {
   5734       0xc00000007ff00000ULL,
   5735       0xfff8000000000000ULL,
   5736       0ULL,
   5737       0ULL,
   5738       0ULL
   5739     },
   5740     {
   5741       0x0000000041300000ULL,
   5742       0x1960000000000000ULL,
   5743       -1ULL,
   5744       -1ULL,
   5745       -1ULL
   5746     }
   5747 #endif
   5748   },
   5749   { "v2mnz", TILEGX_OPC_V2MNZ, 0x3, 3, TREG_ZERO, 1,
   5750     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5751 #ifndef DISASM_ONLY
   5752     {
   5753       0xc00000007ffc0000ULL,
   5754       0xfffe000000000000ULL,
   5755       0ULL,
   5756       0ULL,
   5757       0ULL
   5758     },
   5759     {
   5760       0x00000000520c0000ULL,
   5761       0x28aa000000000000ULL,
   5762       -1ULL,
   5763       -1ULL,
   5764       -1ULL
   5765     }
   5766 #endif
   5767   },
   5768   { "v2mulfsc", TILEGX_OPC_V2MULFSC, 0x1, 3, TREG_ZERO, 1,
   5769     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5770 #ifndef DISASM_ONLY
   5771     {
   5772       0xc00000007ffc0000ULL,
   5773       0ULL,
   5774       0ULL,
   5775       0ULL,
   5776       0ULL
   5777     },
   5778     {
   5779       0x0000000052100000ULL,
   5780       -1ULL,
   5781       -1ULL,
   5782       -1ULL,
   5783       -1ULL
   5784     }
   5785 #endif
   5786   },
   5787   { "v2muls", TILEGX_OPC_V2MULS, 0x1, 3, TREG_ZERO, 1,
   5788     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5789 #ifndef DISASM_ONLY
   5790     {
   5791       0xc00000007ffc0000ULL,
   5792       0ULL,
   5793       0ULL,
   5794       0ULL,
   5795       0ULL
   5796     },
   5797     {
   5798       0x0000000052140000ULL,
   5799       -1ULL,
   5800       -1ULL,
   5801       -1ULL,
   5802       -1ULL
   5803     }
   5804 #endif
   5805   },
   5806   { "v2mults", TILEGX_OPC_V2MULTS, 0x1, 3, TREG_ZERO, 1,
   5807     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5808 #ifndef DISASM_ONLY
   5809     {
   5810       0xc00000007ffc0000ULL,
   5811       0ULL,
   5812       0ULL,
   5813       0ULL,
   5814       0ULL
   5815     },
   5816     {
   5817       0x0000000052180000ULL,
   5818       -1ULL,
   5819       -1ULL,
   5820       -1ULL,
   5821       -1ULL
   5822     }
   5823 #endif
   5824   },
   5825   { "v2mz", TILEGX_OPC_V2MZ, 0x3, 3, TREG_ZERO, 1,
   5826     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5827 #ifndef DISASM_ONLY
   5828     {
   5829       0xc00000007ffc0000ULL,
   5830       0xfffe000000000000ULL,
   5831       0ULL,
   5832       0ULL,
   5833       0ULL
   5834     },
   5835     {
   5836       0x00000000521c0000ULL,
   5837       0x28ac000000000000ULL,
   5838       -1ULL,
   5839       -1ULL,
   5840       -1ULL
   5841     }
   5842 #endif
   5843   },
   5844   { "v2packh", TILEGX_OPC_V2PACKH, 0x3, 3, TREG_ZERO, 1,
   5845     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5846 #ifndef DISASM_ONLY
   5847     {
   5848       0xc00000007ffc0000ULL,
   5849       0xfffe000000000000ULL,
   5850       0ULL,
   5851       0ULL,
   5852       0ULL
   5853     },
   5854     {
   5855       0x0000000052200000ULL,
   5856       0x28ae000000000000ULL,
   5857       -1ULL,
   5858       -1ULL,
   5859       -1ULL
   5860     }
   5861 #endif
   5862   },
   5863   { "v2packl", TILEGX_OPC_V2PACKL, 0x3, 3, TREG_ZERO, 1,
   5864     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5865 #ifndef DISASM_ONLY
   5866     {
   5867       0xc00000007ffc0000ULL,
   5868       0xfffe000000000000ULL,
   5869       0ULL,
   5870       0ULL,
   5871       0ULL
   5872     },
   5873     {
   5874       0x0000000052240000ULL,
   5875       0x28b0000000000000ULL,
   5876       -1ULL,
   5877       -1ULL,
   5878       -1ULL
   5879     }
   5880 #endif
   5881   },
   5882   { "v2packuc", TILEGX_OPC_V2PACKUC, 0x3, 3, TREG_ZERO, 1,
   5883     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5884 #ifndef DISASM_ONLY
   5885     {
   5886       0xc00000007ffc0000ULL,
   5887       0xfffe000000000000ULL,
   5888       0ULL,
   5889       0ULL,
   5890       0ULL
   5891     },
   5892     {
   5893       0x0000000052280000ULL,
   5894       0x28b2000000000000ULL,
   5895       -1ULL,
   5896       -1ULL,
   5897       -1ULL
   5898     }
   5899 #endif
   5900   },
   5901   { "v2sadas", TILEGX_OPC_V2SADAS, 0x1, 3, TREG_ZERO, 1,
   5902     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5903 #ifndef DISASM_ONLY
   5904     {
   5905       0xc00000007ffc0000ULL,
   5906       0ULL,
   5907       0ULL,
   5908       0ULL,
   5909       0ULL
   5910     },
   5911     {
   5912       0x00000000522c0000ULL,
   5913       -1ULL,
   5914       -1ULL,
   5915       -1ULL,
   5916       -1ULL
   5917     }
   5918 #endif
   5919   },
   5920   { "v2sadau", TILEGX_OPC_V2SADAU, 0x1, 3, TREG_ZERO, 1,
   5921     { { 23, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5922 #ifndef DISASM_ONLY
   5923     {
   5924       0xc00000007ffc0000ULL,
   5925       0ULL,
   5926       0ULL,
   5927       0ULL,
   5928       0ULL
   5929     },
   5930     {
   5931       0x0000000052300000ULL,
   5932       -1ULL,
   5933       -1ULL,
   5934       -1ULL,
   5935       -1ULL
   5936     }
   5937 #endif
   5938   },
   5939   { "v2sads", TILEGX_OPC_V2SADS, 0x1, 3, TREG_ZERO, 1,
   5940     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5941 #ifndef DISASM_ONLY
   5942     {
   5943       0xc00000007ffc0000ULL,
   5944       0ULL,
   5945       0ULL,
   5946       0ULL,
   5947       0ULL
   5948     },
   5949     {
   5950       0x0000000052340000ULL,
   5951       -1ULL,
   5952       -1ULL,
   5953       -1ULL,
   5954       -1ULL
   5955     }
   5956 #endif
   5957   },
   5958   { "v2sadu", TILEGX_OPC_V2SADU, 0x1, 3, TREG_ZERO, 1,
   5959     { { 8, 9, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   5960 #ifndef DISASM_ONLY
   5961     {
   5962       0xc00000007ffc0000ULL,
   5963       0ULL,
   5964       0ULL,
   5965       0ULL,
   5966       0ULL
   5967     },
   5968     {
   5969       0x0000000052380000ULL,
   5970       -1ULL,
   5971       -1ULL,
   5972       -1ULL,
   5973       -1ULL
   5974     }
   5975 #endif
   5976   },
   5977   { "v2shl", TILEGX_OPC_V2SHL, 0x3, 3, TREG_ZERO, 1,
   5978     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   5979 #ifndef DISASM_ONLY
   5980     {
   5981       0xc00000007ffc0000ULL,
   5982       0xfffe000000000000ULL,
   5983       0ULL,
   5984       0ULL,
   5985       0ULL
   5986     },
   5987     {
   5988       0x0000000052400000ULL,
   5989       0x28b6000000000000ULL,
   5990       -1ULL,
   5991       -1ULL,
   5992       -1ULL
   5993     }
   5994 #endif
   5995   },
   5996   { "v2shli", TILEGX_OPC_V2SHLI, 0x3, 3, TREG_ZERO, 1,
   5997     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   5998 #ifndef DISASM_ONLY
   5999     {
   6000       0xc00000007ffc0000ULL,
   6001       0xfffe000000000000ULL,
   6002       0ULL,
   6003       0ULL,
   6004       0ULL
   6005     },
   6006     {
   6007       0x0000000060280000ULL,
   6008       0x3014000000000000ULL,
   6009       -1ULL,
   6010       -1ULL,
   6011       -1ULL
   6012     }
   6013 #endif
   6014   },
   6015   { "v2shlsc", TILEGX_OPC_V2SHLSC, 0x3, 3, TREG_ZERO, 1,
   6016     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6017 #ifndef DISASM_ONLY
   6018     {
   6019       0xc00000007ffc0000ULL,
   6020       0xfffe000000000000ULL,
   6021       0ULL,
   6022       0ULL,
   6023       0ULL
   6024     },
   6025     {
   6026       0x00000000523c0000ULL,
   6027       0x28b4000000000000ULL,
   6028       -1ULL,
   6029       -1ULL,
   6030       -1ULL
   6031     }
   6032 #endif
   6033   },
   6034   { "v2shrs", TILEGX_OPC_V2SHRS, 0x3, 3, TREG_ZERO, 1,
   6035     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6036 #ifndef DISASM_ONLY
   6037     {
   6038       0xc00000007ffc0000ULL,
   6039       0xfffe000000000000ULL,
   6040       0ULL,
   6041       0ULL,
   6042       0ULL
   6043     },
   6044     {
   6045       0x0000000052440000ULL,
   6046       0x28b8000000000000ULL,
   6047       -1ULL,
   6048       -1ULL,
   6049       -1ULL
   6050     }
   6051 #endif
   6052   },
   6053   { "v2shrsi", TILEGX_OPC_V2SHRSI, 0x3, 3, TREG_ZERO, 1,
   6054     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   6055 #ifndef DISASM_ONLY
   6056     {
   6057       0xc00000007ffc0000ULL,
   6058       0xfffe000000000000ULL,
   6059       0ULL,
   6060       0ULL,
   6061       0ULL
   6062     },
   6063     {
   6064       0x00000000602c0000ULL,
   6065       0x3016000000000000ULL,
   6066       -1ULL,
   6067       -1ULL,
   6068       -1ULL
   6069     }
   6070 #endif
   6071   },
   6072   { "v2shru", TILEGX_OPC_V2SHRU, 0x3, 3, TREG_ZERO, 1,
   6073     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6074 #ifndef DISASM_ONLY
   6075     {
   6076       0xc00000007ffc0000ULL,
   6077       0xfffe000000000000ULL,
   6078       0ULL,
   6079       0ULL,
   6080       0ULL
   6081     },
   6082     {
   6083       0x0000000052480000ULL,
   6084       0x28ba000000000000ULL,
   6085       -1ULL,
   6086       -1ULL,
   6087       -1ULL
   6088     }
   6089 #endif
   6090   },
   6091   { "v2shrui", TILEGX_OPC_V2SHRUI, 0x3, 3, TREG_ZERO, 1,
   6092     { { 8, 9, 29 }, { 6, 7, 30 }, { 0, }, { 0, }, { 0, } },
   6093 #ifndef DISASM_ONLY
   6094     {
   6095       0xc00000007ffc0000ULL,
   6096       0xfffe000000000000ULL,
   6097       0ULL,
   6098       0ULL,
   6099       0ULL
   6100     },
   6101     {
   6102       0x0000000060300000ULL,
   6103       0x3018000000000000ULL,
   6104       -1ULL,
   6105       -1ULL,
   6106       -1ULL
   6107     }
   6108 #endif
   6109   },
   6110   { "v2sub", TILEGX_OPC_V2SUB, 0x3, 3, TREG_ZERO, 1,
   6111     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6112 #ifndef DISASM_ONLY
   6113     {
   6114       0xc00000007ffc0000ULL,
   6115       0xfffe000000000000ULL,
   6116       0ULL,
   6117       0ULL,
   6118       0ULL
   6119     },
   6120     {
   6121       0x0000000052500000ULL,
   6122       0x28be000000000000ULL,
   6123       -1ULL,
   6124       -1ULL,
   6125       -1ULL
   6126     }
   6127 #endif
   6128   },
   6129   { "v2subsc", TILEGX_OPC_V2SUBSC, 0x3, 3, TREG_ZERO, 1,
   6130     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6131 #ifndef DISASM_ONLY
   6132     {
   6133       0xc00000007ffc0000ULL,
   6134       0xfffe000000000000ULL,
   6135       0ULL,
   6136       0ULL,
   6137       0ULL
   6138     },
   6139     {
   6140       0x00000000524c0000ULL,
   6141       0x28bc000000000000ULL,
   6142       -1ULL,
   6143       -1ULL,
   6144       -1ULL
   6145     }
   6146 #endif
   6147   },
   6148   { "v4add", TILEGX_OPC_V4ADD, 0x3, 3, TREG_ZERO, 1,
   6149     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6150 #ifndef DISASM_ONLY
   6151     {
   6152       0xc00000007ffc0000ULL,
   6153       0xfffe000000000000ULL,
   6154       0ULL,
   6155       0ULL,
   6156       0ULL
   6157     },
   6158     {
   6159       0x0000000052580000ULL,
   6160       0x28c2000000000000ULL,
   6161       -1ULL,
   6162       -1ULL,
   6163       -1ULL
   6164     }
   6165 #endif
   6166   },
   6167   { "v4addsc", TILEGX_OPC_V4ADDSC, 0x3, 3, TREG_ZERO, 1,
   6168     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6169 #ifndef DISASM_ONLY
   6170     {
   6171       0xc00000007ffc0000ULL,
   6172       0xfffe000000000000ULL,
   6173       0ULL,
   6174       0ULL,
   6175       0ULL
   6176     },
   6177     {
   6178       0x0000000052540000ULL,
   6179       0x28c0000000000000ULL,
   6180       -1ULL,
   6181       -1ULL,
   6182       -1ULL
   6183     }
   6184 #endif
   6185   },
   6186   { "v4int_h", TILEGX_OPC_V4INT_H, 0x3, 3, TREG_ZERO, 1,
   6187     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6188 #ifndef DISASM_ONLY
   6189     {
   6190       0xc00000007ffc0000ULL,
   6191       0xfffe000000000000ULL,
   6192       0ULL,
   6193       0ULL,
   6194       0ULL
   6195     },
   6196     {
   6197       0x00000000525c0000ULL,
   6198       0x28c4000000000000ULL,
   6199       -1ULL,
   6200       -1ULL,
   6201       -1ULL
   6202     }
   6203 #endif
   6204   },
   6205   { "v4int_l", TILEGX_OPC_V4INT_L, 0x3, 3, TREG_ZERO, 1,
   6206     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6207 #ifndef DISASM_ONLY
   6208     {
   6209       0xc00000007ffc0000ULL,
   6210       0xfffe000000000000ULL,
   6211       0ULL,
   6212       0ULL,
   6213       0ULL
   6214     },
   6215     {
   6216       0x0000000052600000ULL,
   6217       0x28c6000000000000ULL,
   6218       -1ULL,
   6219       -1ULL,
   6220       -1ULL
   6221     }
   6222 #endif
   6223   },
   6224   { "v4packsc", TILEGX_OPC_V4PACKSC, 0x3, 3, TREG_ZERO, 1,
   6225     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6226 #ifndef DISASM_ONLY
   6227     {
   6228       0xc00000007ffc0000ULL,
   6229       0xfffe000000000000ULL,
   6230       0ULL,
   6231       0ULL,
   6232       0ULL
   6233     },
   6234     {
   6235       0x0000000052640000ULL,
   6236       0x28c8000000000000ULL,
   6237       -1ULL,
   6238       -1ULL,
   6239       -1ULL
   6240     }
   6241 #endif
   6242   },
   6243   { "v4shl", TILEGX_OPC_V4SHL, 0x3, 3, TREG_ZERO, 1,
   6244     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6245 #ifndef DISASM_ONLY
   6246     {
   6247       0xc00000007ffc0000ULL,
   6248       0xfffe000000000000ULL,
   6249       0ULL,
   6250       0ULL,
   6251       0ULL
   6252     },
   6253     {
   6254       0x00000000526c0000ULL,
   6255       0x28cc000000000000ULL,
   6256       -1ULL,
   6257       -1ULL,
   6258       -1ULL
   6259     }
   6260 #endif
   6261   },
   6262   { "v4shlsc", TILEGX_OPC_V4SHLSC, 0x3, 3, TREG_ZERO, 1,
   6263     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6264 #ifndef DISASM_ONLY
   6265     {
   6266       0xc00000007ffc0000ULL,
   6267       0xfffe000000000000ULL,
   6268       0ULL,
   6269       0ULL,
   6270       0ULL
   6271     },
   6272     {
   6273       0x0000000052680000ULL,
   6274       0x28ca000000000000ULL,
   6275       -1ULL,
   6276       -1ULL,
   6277       -1ULL
   6278     }
   6279 #endif
   6280   },
   6281   { "v4shrs", TILEGX_OPC_V4SHRS, 0x3, 3, TREG_ZERO, 1,
   6282     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6283 #ifndef DISASM_ONLY
   6284     {
   6285       0xc00000007ffc0000ULL,
   6286       0xfffe000000000000ULL,
   6287       0ULL,
   6288       0ULL,
   6289       0ULL
   6290     },
   6291     {
   6292       0x0000000052700000ULL,
   6293       0x28ce000000000000ULL,
   6294       -1ULL,
   6295       -1ULL,
   6296       -1ULL
   6297     }
   6298 #endif
   6299   },
   6300   { "v4shru", TILEGX_OPC_V4SHRU, 0x3, 3, TREG_ZERO, 1,
   6301     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6302 #ifndef DISASM_ONLY
   6303     {
   6304       0xc00000007ffc0000ULL,
   6305       0xfffe000000000000ULL,
   6306       0ULL,
   6307       0ULL,
   6308       0ULL
   6309     },
   6310     {
   6311       0x0000000052740000ULL,
   6312       0x28d0000000000000ULL,
   6313       -1ULL,
   6314       -1ULL,
   6315       -1ULL
   6316     }
   6317 #endif
   6318   },
   6319   { "v4sub", TILEGX_OPC_V4SUB, 0x3, 3, TREG_ZERO, 1,
   6320     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6321 #ifndef DISASM_ONLY
   6322     {
   6323       0xc00000007ffc0000ULL,
   6324       0xfffe000000000000ULL,
   6325       0ULL,
   6326       0ULL,
   6327       0ULL
   6328     },
   6329     {
   6330       0x00000000527c0000ULL,
   6331       0x28d4000000000000ULL,
   6332       -1ULL,
   6333       -1ULL,
   6334       -1ULL
   6335     }
   6336 #endif
   6337   },
   6338   { "v4subsc", TILEGX_OPC_V4SUBSC, 0x3, 3, TREG_ZERO, 1,
   6339     { { 8, 9, 16 }, { 6, 7, 17 }, { 0, }, { 0, }, { 0, } },
   6340 #ifndef DISASM_ONLY
   6341     {
   6342       0xc00000007ffc0000ULL,
   6343       0xfffe000000000000ULL,
   6344       0ULL,
   6345       0ULL,
   6346       0ULL
   6347     },
   6348     {
   6349       0x0000000052780000ULL,
   6350       0x28d2000000000000ULL,
   6351       -1ULL,
   6352       -1ULL,
   6353       -1ULL
   6354     }
   6355 #endif
   6356   },
   6357   { "wh64", TILEGX_OPC_WH64, 0x2, 1, TREG_ZERO, 1,
   6358     { { 0, }, { 7 }, { 0, }, { 0, }, { 0, } },
   6359 #ifndef DISASM_ONLY
   6360     {
   6361       0ULL,
   6362       0xfffff80000000000ULL,
   6363       0ULL,
   6364       0ULL,
   6365       0ULL
   6366     },
   6367     {
   6368       -1ULL,
   6369       0x286b300000000000ULL,
   6370       -1ULL,
   6371       -1ULL,
   6372       -1ULL
   6373     }
   6374 #endif
   6375   },
   6376   { "xor", TILEGX_OPC_XOR, 0xf, 3, TREG_ZERO, 1,
   6377     { { 8, 9, 16 }, { 6, 7, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
   6378 #ifndef DISASM_ONLY
   6379     {
   6380       0xc00000007ffc0000ULL,
   6381       0xfffe000000000000ULL,
   6382       0x00000000780c0000ULL,
   6383       0x3c06000000000000ULL,
   6384       0ULL
   6385     },
   6386     {
   6387       0x0000000052800000ULL,
   6388       0x28d6000000000000ULL,
   6389       0x00000000500c0000ULL,
   6390       0x2c06000000000000ULL,
   6391       -1ULL
   6392     }
   6393 #endif
   6394   },
   6395   { "xori", TILEGX_OPC_XORI, 0x3, 3, TREG_ZERO, 1,
   6396     { { 8, 9, 0 }, { 6, 7, 1 }, { 0, }, { 0, }, { 0, } },
   6397 #ifndef DISASM_ONLY
   6398     {
   6399       0xc00000007ff00000ULL,
   6400       0xfff8000000000000ULL,
   6401       0ULL,
   6402       0ULL,
   6403       0ULL
   6404     },
   6405     {
   6406       0x0000000041400000ULL,
   6407       0x1968000000000000ULL,
   6408       -1ULL,
   6409       -1ULL,
   6410       -1ULL
   6411     }
   6412 #endif
   6413   },
   6414   { NULL, TILEGX_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } },
   6415 #ifndef DISASM_ONLY
   6416     { 0, }, { 0, }
   6417 #endif
   6418   }
   6419 };
   6420 #define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6))
   6421 #define CHILD(array_index) (TILEGX_OPC_NONE + (array_index))
   6422 
   6423 static const UShort decode_X0_fsm[936] =
   6424 {
   6425   BITFIELD(22, 9) /* index 0 */,
   6426   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6427   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6428   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6429   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6430   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6431   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6432   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6433   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6434   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6435   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6436   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6437   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6438   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6439   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6440   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6441   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6442   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6443   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6444   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6445   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6446   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6447   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6448   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6449   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6450   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6451   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6452   CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI,
   6453   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6454   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6455   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6456   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6457   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6458   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6459   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6460   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6461   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6462   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6463   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6464   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6465   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6466   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6467   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6468   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE,
   6469   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6470   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6471   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6472   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BFEXTS,
   6473   TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTU,
   6474   TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFINS,
   6475   TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_MM,
   6476   TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_NONE,
   6477   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6478   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6479   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6480   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6481   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6482   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6483   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6484   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(528), CHILD(578),
   6485   CHILD(583), CHILD(588), CHILD(593), CHILD(598), TILEGX_OPC_NONE,
   6486   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6487   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6488   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6489   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6490   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6491   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6492   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6493   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6494   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6495   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6496   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6497   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6498   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6499   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6500   TILEGX_OPC_NONE, CHILD(603), CHILD(620), CHILD(637), CHILD(654), CHILD(671),
   6501   CHILD(703), CHILD(797), CHILD(814), CHILD(831), CHILD(848), CHILD(865),
   6502   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6503   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6504   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6505   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6506   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6507   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6508   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6509   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6510   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6511   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6512   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6513   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6514   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6515   TILEGX_OPC_NONE, CHILD(889), TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6516   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6517   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6518   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6519   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6520   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6521   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6522   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6523   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6524   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6525   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6526   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6527   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6528   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6529   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6530   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6531   TILEGX_OPC_NONE, CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6532   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6533   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6534   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6535   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6536   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6537   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6538   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6539   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6540   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6541   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
   6542   BITFIELD(6, 2) /* index 513 */,
   6543   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518),
   6544   BITFIELD(8, 2) /* index 518 */,
   6545   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523),
   6546   BITFIELD(10, 2) /* index 523 */,
   6547   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI,
   6548   BITFIELD(20, 2) /* index 528 */,
   6549   TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548),
   6550   BITFIELD(6, 2) /* index 533 */,
   6551   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538),
   6552   BITFIELD(8, 2) /* index 538 */,
   6553   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543),
   6554   BITFIELD(10, 2) /* index 543 */,
   6555   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
   6556   BITFIELD(0, 2) /* index 548 */,
   6557   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553),
   6558   BITFIELD(2, 2) /* index 553 */,
   6559   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558),
   6560   BITFIELD(4, 2) /* index 558 */,
   6561   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563),
   6562   BITFIELD(6, 2) /* index 563 */,
   6563   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568),
   6564   BITFIELD(8, 2) /* index 568 */,
   6565   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573),
   6566   BITFIELD(10, 2) /* index 573 */,
   6567   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
   6568   BITFIELD(20, 2) /* index 578 */,
   6569   TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, TILEGX_OPC_ORI,
   6570   BITFIELD(20, 2) /* index 583 */,
   6571   TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI, TILEGX_OPC_V1CMPLTSI,
   6572   TILEGX_OPC_V1CMPLTUI,
   6573   BITFIELD(20, 2) /* index 588 */,
   6574   TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI, TILEGX_OPC_V2ADDI,
   6575   TILEGX_OPC_V2CMPEQI,
   6576   BITFIELD(20, 2) /* index 593 */,
   6577   TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI, TILEGX_OPC_V2MAXSI,
   6578   TILEGX_OPC_V2MINSI,
   6579   BITFIELD(20, 2) /* index 598 */,
   6580   TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6581   BITFIELD(18, 4) /* index 603 */,
   6582   TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD,
   6583   TILEGX_OPC_AND, TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_CMPEQ,
   6584   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
   6585   TILEGX_OPC_CMPNE, TILEGX_OPC_CMULAF, TILEGX_OPC_CMULA, TILEGX_OPC_CMULFR,
   6586   BITFIELD(18, 4) /* index 620 */,
   6587   TILEGX_OPC_CMULF, TILEGX_OPC_CMULHR, TILEGX_OPC_CMULH, TILEGX_OPC_CMUL,
   6588   TILEGX_OPC_CRC32_32, TILEGX_OPC_CRC32_8, TILEGX_OPC_DBLALIGN2,
   6589   TILEGX_OPC_DBLALIGN4, TILEGX_OPC_DBLALIGN6, TILEGX_OPC_DBLALIGN,
   6590   TILEGX_OPC_FDOUBLE_ADDSUB, TILEGX_OPC_FDOUBLE_ADD_FLAGS,
   6591   TILEGX_OPC_FDOUBLE_MUL_FLAGS, TILEGX_OPC_FDOUBLE_PACK1,
   6592   TILEGX_OPC_FDOUBLE_PACK2, TILEGX_OPC_FDOUBLE_SUB_FLAGS,
   6593   BITFIELD(18, 4) /* index 637 */,
   6594   TILEGX_OPC_FDOUBLE_UNPACK_MAX, TILEGX_OPC_FDOUBLE_UNPACK_MIN,
   6595   TILEGX_OPC_FSINGLE_ADD1, TILEGX_OPC_FSINGLE_ADDSUB2,
   6596   TILEGX_OPC_FSINGLE_MUL1, TILEGX_OPC_FSINGLE_MUL2, TILEGX_OPC_FSINGLE_PACK2,
   6597   TILEGX_OPC_FSINGLE_SUB1, TILEGX_OPC_MNZ, TILEGX_OPC_MULAX,
   6598   TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HS_HU, TILEGX_OPC_MULA_HS_LS,
   6599   TILEGX_OPC_MULA_HS_LU, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_HU_LS,
   6600   BITFIELD(18, 4) /* index 654 */,
   6601   TILEGX_OPC_MULA_HU_LU, TILEGX_OPC_MULA_LS_LS, TILEGX_OPC_MULA_LS_LU,
   6602   TILEGX_OPC_MULA_LU_LU, TILEGX_OPC_MULX, TILEGX_OPC_MUL_HS_HS,
   6603   TILEGX_OPC_MUL_HS_HU, TILEGX_OPC_MUL_HS_LS, TILEGX_OPC_MUL_HS_LU,
   6604   TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_HU_LS, TILEGX_OPC_MUL_HU_LU,
   6605   TILEGX_OPC_MUL_LS_LS, TILEGX_OPC_MUL_LS_LU, TILEGX_OPC_MUL_LU_LU,
   6606   TILEGX_OPC_MZ,
   6607   BITFIELD(18, 4) /* index 671 */,
   6608   TILEGX_OPC_NOR, CHILD(688), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX,
   6609   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD,
   6610   TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL,
   6611   TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_SHUFFLEBYTES,
   6612   TILEGX_OPC_SUBXSC,
   6613   BITFIELD(12, 2) /* index 688 */,
   6614   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(693),
   6615   BITFIELD(14, 2) /* index 693 */,
   6616   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(698),
   6617   BITFIELD(16, 2) /* index 698 */,
   6618   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
   6619   BITFIELD(18, 4) /* index 703 */,
   6620   TILEGX_OPC_SUBX, TILEGX_OPC_SUB, CHILD(720), TILEGX_OPC_V1ADDUC,
   6621   TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADIFFU, TILEGX_OPC_V1AVGU,
   6622   TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU,
   6623   TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE,
   6624   TILEGX_OPC_V1DDOTPUSA, TILEGX_OPC_V1DDOTPUS, TILEGX_OPC_V1DOTPA,
   6625   BITFIELD(12, 4) /* index 720 */,
   6626   TILEGX_OPC_NONE, CHILD(737), CHILD(742), CHILD(747), CHILD(752), CHILD(757),
   6627   CHILD(762), CHILD(767), CHILD(772), CHILD(777), CHILD(782), CHILD(787),
   6628   CHILD(792), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6629   BITFIELD(16, 2) /* index 737 */,
   6630   TILEGX_OPC_CLZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6631   BITFIELD(16, 2) /* index 742 */,
   6632   TILEGX_OPC_CTZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6633   BITFIELD(16, 2) /* index 747 */,
   6634   TILEGX_OPC_FNOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6635   BITFIELD(16, 2) /* index 752 */,
   6636   TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6637   BITFIELD(16, 2) /* index 757 */,
   6638   TILEGX_OPC_NOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6639   BITFIELD(16, 2) /* index 762 */,
   6640   TILEGX_OPC_PCNT, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6641   BITFIELD(16, 2) /* index 767 */,
   6642   TILEGX_OPC_REVBITS, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6643   BITFIELD(16, 2) /* index 772 */,
   6644   TILEGX_OPC_REVBYTES, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6645   BITFIELD(16, 2) /* index 777 */,
   6646   TILEGX_OPC_TBLIDXB0, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6647   BITFIELD(16, 2) /* index 782 */,
   6648   TILEGX_OPC_TBLIDXB1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6649   BITFIELD(16, 2) /* index 787 */,
   6650   TILEGX_OPC_TBLIDXB2, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6651   BITFIELD(16, 2) /* index 792 */,
   6652   TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6653   BITFIELD(18, 4) /* index 797 */,
   6654   TILEGX_OPC_V1DOTPUSA, TILEGX_OPC_V1DOTPUS, TILEGX_OPC_V1DOTP,
   6655   TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1MAXU,
   6656   TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MULTU, TILEGX_OPC_V1MULUS,
   6657   TILEGX_OPC_V1MULU, TILEGX_OPC_V1MZ, TILEGX_OPC_V1SADAU, TILEGX_OPC_V1SADU,
   6658   TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS,
   6659   BITFIELD(18, 4) /* index 814 */,
   6660   TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC, TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC,
   6661   TILEGX_OPC_V2ADD, TILEGX_OPC_V2ADIFFS, TILEGX_OPC_V2AVGS,
   6662   TILEGX_OPC_V2CMPEQ, TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU,
   6663   TILEGX_OPC_V2CMPLTS, TILEGX_OPC_V2CMPLTU, TILEGX_OPC_V2CMPNE,
   6664   TILEGX_OPC_V2DOTPA, TILEGX_OPC_V2DOTP, TILEGX_OPC_V2INT_H,
   6665   BITFIELD(18, 4) /* index 831 */,
   6666   TILEGX_OPC_V2INT_L, TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ,
   6667   TILEGX_OPC_V2MULFSC, TILEGX_OPC_V2MULS, TILEGX_OPC_V2MULTS, TILEGX_OPC_V2MZ,
   6668   TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC,
   6669   TILEGX_OPC_V2SADAS, TILEGX_OPC_V2SADAU, TILEGX_OPC_V2SADS,
   6670   TILEGX_OPC_V2SADU, TILEGX_OPC_V2SHLSC,
   6671   BITFIELD(18, 4) /* index 848 */,
   6672   TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU, TILEGX_OPC_V2SUBSC,
   6673   TILEGX_OPC_V2SUB, TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H,
   6674   TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC,
   6675   TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC,
   6676   TILEGX_OPC_V4SUB,
   6677   BITFIELD(18, 3) /* index 865 */,
   6678   CHILD(874), CHILD(877), CHILD(880), CHILD(883), CHILD(886), TILEGX_OPC_NONE,
   6679   TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6680   BITFIELD(21, 1) /* index 874 */,
   6681   TILEGX_OPC_XOR, TILEGX_OPC_NONE,
   6682   BITFIELD(21, 1) /* index 877 */,
   6683   TILEGX_OPC_V1DDOTPUA, TILEGX_OPC_NONE,
   6684   BITFIELD(21, 1) /* index 880 */,
   6685   TILEGX_OPC_V1DDOTPU, TILEGX_OPC_NONE,
   6686   BITFIELD(21, 1) /* index 883 */,
   6687   TILEGX_OPC_V1DOTPUA, TILEGX_OPC_NONE,
   6688   BITFIELD(21, 1) /* index 886 */,
   6689   TILEGX_OPC_V1DOTPU, TILEGX_OPC_NONE,
   6690   BITFIELD(18, 4) /* index 889 */,
   6691   TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI,
   6692   TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI,
   6693   TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI,
   6694   TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6695   TILEGX_OPC_NONE,
   6696   BITFIELD(0, 2) /* index 906 */,
   6697   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   6698   CHILD(911),
   6699   BITFIELD(2, 2) /* index 911 */,
   6700   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   6701   CHILD(916),
   6702   BITFIELD(4, 2) /* index 916 */,
   6703   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   6704   CHILD(921),
   6705   BITFIELD(6, 2) /* index 921 */,
   6706   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   6707   CHILD(926),
   6708   BITFIELD(8, 2) /* index 926 */,
   6709   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   6710   CHILD(931),
   6711   BITFIELD(10, 2) /* index 931 */,
   6712   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   6713   TILEGX_OPC_INFOL,
   6714 };
   6715 
   6716 static const UShort decode_X1_fsm[1266] =
   6717 {
   6718   BITFIELD(53, 9) /* index 0 */,
   6719   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6720   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6721   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6722   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6723   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6724   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6725   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6726   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6727   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6728   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
   6729   CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI,
   6730   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6731   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6732   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6733   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6734   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6735   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6736   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6737   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6738   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6739   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6740   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6741   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6742   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6743   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6744   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
   6745   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE,
   6746   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6747   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6748   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6749   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6750   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6751   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6752   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6753   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BEQZT,
   6754   TILEGX_OPC_BEQZT, TILEGX_OPC_BEQZ, TILEGX_OPC_BEQZ, TILEGX_OPC_BGEZT,
   6755   TILEGX_OPC_BGEZT, TILEGX_OPC_BGEZ, TILEGX_OPC_BGEZ, TILEGX_OPC_BGTZT,
   6756   TILEGX_OPC_BGTZT, TILEGX_OPC_BGTZ, TILEGX_OPC_BGTZ, TILEGX_OPC_BLBCT,
   6757   TILEGX_OPC_BLBCT, TILEGX_OPC_BLBC, TILEGX_OPC_BLBC, TILEGX_OPC_BLBST,
   6758   TILEGX_OPC_BLBST, TILEGX_OPC_BLBS, TILEGX_OPC_BLBS, TILEGX_OPC_BLEZT,
   6759   TILEGX_OPC_BLEZT, TILEGX_OPC_BLEZ, TILEGX_OPC_BLEZ, TILEGX_OPC_BLTZT,
   6760   TILEGX_OPC_BLTZT, TILEGX_OPC_BLTZ, TILEGX_OPC_BLTZ, TILEGX_OPC_BNEZT,
   6761   TILEGX_OPC_BNEZT, TILEGX_OPC_BNEZ, TILEGX_OPC_BNEZ, CHILD(528), CHILD(578),
   6762   CHILD(598), CHILD(703), CHILD(723), CHILD(728), CHILD(753), CHILD(758),
   6763   CHILD(763), CHILD(768), CHILD(773), CHILD(778), TILEGX_OPC_NONE,
   6764   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6765   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6766   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6767   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6768   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6769   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6770   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6771   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6772   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6773   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6774   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6775   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6776   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_JAL,
   6777   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
   6778   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
   6779   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
   6780   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
   6781   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
   6782   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
   6783   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
   6784   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_J, TILEGX_OPC_J,
   6785   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
   6786   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
   6787   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
   6788   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
   6789   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
   6790   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
   6791   CHILD(783), CHILD(800), CHILD(832), CHILD(849), CHILD(1168), CHILD(1185),
   6792   CHILD(1202), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6793   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6794   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6795   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6796   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6797   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6798   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6799   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6800   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6801   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6802   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6803   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6804   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6805   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6806   TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1219), TILEGX_OPC_NONE,
   6807   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6808   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6809   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6810   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6811   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6812   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6813   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6814   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6815   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6816   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6817   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6818   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6819   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6820   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6821   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6822   TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1236), CHILD(1236), CHILD(1236),
   6823   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6824   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6825   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6826   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6827   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6828   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6829   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6830   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6831   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6832   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6833   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6834   CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236), CHILD(1236),
   6835   CHILD(1236),
   6836   BITFIELD(37, 2) /* index 513 */,
   6837   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518),
   6838   BITFIELD(39, 2) /* index 518 */,
   6839   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523),
   6840   BITFIELD(41, 2) /* index 523 */,
   6841   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI,
   6842   BITFIELD(51, 2) /* index 528 */,
   6843   TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548),
   6844   BITFIELD(37, 2) /* index 533 */,
   6845   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538),
   6846   BITFIELD(39, 2) /* index 538 */,
   6847   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543),
   6848   BITFIELD(41, 2) /* index 543 */,
   6849   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
   6850   BITFIELD(31, 2) /* index 548 */,
   6851   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553),
   6852   BITFIELD(33, 2) /* index 553 */,
   6853   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558),
   6854   BITFIELD(35, 2) /* index 558 */,
   6855   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563),
   6856   BITFIELD(37, 2) /* index 563 */,
   6857   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568),
   6858   BITFIELD(39, 2) /* index 568 */,
   6859   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573),
   6860   BITFIELD(41, 2) /* index 573 */,
   6861   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
   6862   BITFIELD(51, 2) /* index 578 */,
   6863   TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, CHILD(583),
   6864   BITFIELD(31, 2) /* index 583 */,
   6865   TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(588),
   6866   BITFIELD(33, 2) /* index 588 */,
   6867   TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(593),
   6868   BITFIELD(35, 2) /* index 593 */,
   6869   TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD,
   6870   TILEGX_OPC_PREFETCH_ADD_L1_FAULT,
   6871   BITFIELD(51, 2) /* index 598 */,
   6872   CHILD(603), CHILD(618), CHILD(633), CHILD(648),
   6873   BITFIELD(31, 2) /* index 603 */,
   6874   TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(608),
   6875   BITFIELD(33, 2) /* index 608 */,
   6876   TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(613),
   6877   BITFIELD(35, 2) /* index 613 */,
   6878   TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD,
   6879   TILEGX_OPC_PREFETCH_ADD_L1,
   6880   BITFIELD(31, 2) /* index 618 */,
   6881   TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(623),
   6882   BITFIELD(33, 2) /* index 623 */,
   6883   TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(628),
   6884   BITFIELD(35, 2) /* index 628 */,
   6885   TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD,
   6886   TILEGX_OPC_PREFETCH_ADD_L2_FAULT,
   6887   BITFIELD(31, 2) /* index 633 */,
   6888   TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(638),
   6889   BITFIELD(33, 2) /* index 638 */,
   6890   TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(643),
   6891   BITFIELD(35, 2) /* index 643 */,
   6892   TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD,
   6893   TILEGX_OPC_PREFETCH_ADD_L2,
   6894   BITFIELD(31, 2) /* index 648 */,
   6895   CHILD(653), CHILD(653), CHILD(653), CHILD(673),
   6896   BITFIELD(43, 2) /* index 653 */,
   6897   CHILD(658), TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
   6898   BITFIELD(45, 2) /* index 658 */,
   6899   CHILD(663), TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
   6900   BITFIELD(47, 2) /* index 663 */,
   6901   CHILD(668), TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
   6902   BITFIELD(49, 2) /* index 668 */,
   6903   TILEGX_OPC_LD4S_TLS, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
   6904   TILEGX_OPC_LD4S_ADD,
   6905   BITFIELD(33, 2) /* index 673 */,
   6906   CHILD(653), CHILD(653), CHILD(653), CHILD(678),
   6907   BITFIELD(35, 2) /* index 678 */,
   6908   CHILD(653), CHILD(653), CHILD(653), CHILD(683),
   6909   BITFIELD(43, 2) /* index 683 */,
   6910   CHILD(688), TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6911   TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6912   BITFIELD(45, 2) /* index 688 */,
   6913   CHILD(693), TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6914   TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6915   BITFIELD(47, 2) /* index 693 */,
   6916   CHILD(698), TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6917   TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6918   BITFIELD(49, 2) /* index 698 */,
   6919   TILEGX_OPC_LD4S_TLS, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6920   TILEGX_OPC_PREFETCH_ADD_L3_FAULT, TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
   6921   BITFIELD(51, 2) /* index 703 */,
   6922   CHILD(708), TILEGX_OPC_LDNT1S_ADD, TILEGX_OPC_LDNT1U_ADD,
   6923   TILEGX_OPC_LDNT2S_ADD,
   6924   BITFIELD(31, 2) /* index 708 */,
   6925   TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(713),
   6926   BITFIELD(33, 2) /* index 713 */,
   6927   TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(718),
   6928   BITFIELD(35, 2) /* index 718 */,
   6929   TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD,
   6930   TILEGX_OPC_PREFETCH_ADD_L3,
   6931   BITFIELD(51, 2) /* index 723 */,
   6932   TILEGX_OPC_LDNT2U_ADD, TILEGX_OPC_LDNT4S_ADD, TILEGX_OPC_LDNT4U_ADD,
   6933   TILEGX_OPC_LDNT_ADD,
   6934   BITFIELD(51, 2) /* index 728 */,
   6935   CHILD(733), TILEGX_OPC_LDNA_ADD, TILEGX_OPC_MFSPR, TILEGX_OPC_MTSPR,
   6936   BITFIELD(43, 2) /* index 733 */,
   6937   CHILD(738), TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
   6938   BITFIELD(45, 2) /* index 738 */,
   6939   CHILD(743), TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
   6940   BITFIELD(47, 2) /* index 743 */,
   6941   CHILD(748), TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
   6942   BITFIELD(49, 2) /* index 748 */,
   6943   TILEGX_OPC_LD_TLS, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD, TILEGX_OPC_LD_ADD,
   6944   BITFIELD(51, 2) /* index 753 */,
   6945   TILEGX_OPC_ORI, TILEGX_OPC_ST1_ADD, TILEGX_OPC_ST2_ADD, TILEGX_OPC_ST4_ADD,
   6946   BITFIELD(51, 2) /* index 758 */,
   6947   TILEGX_OPC_STNT1_ADD, TILEGX_OPC_STNT2_ADD, TILEGX_OPC_STNT4_ADD,
   6948   TILEGX_OPC_STNT_ADD,
   6949   BITFIELD(51, 2) /* index 763 */,
   6950   TILEGX_OPC_ST_ADD, TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI,
   6951   TILEGX_OPC_V1CMPLTSI,
   6952   BITFIELD(51, 2) /* index 768 */,
   6953   TILEGX_OPC_V1CMPLTUI, TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI,
   6954   TILEGX_OPC_V2ADDI,
   6955   BITFIELD(51, 2) /* index 773 */,
   6956   TILEGX_OPC_V2CMPEQI, TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI,
   6957   TILEGX_OPC_V2MAXSI,
   6958   BITFIELD(51, 2) /* index 778 */,
   6959   TILEGX_OPC_V2MINSI, TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6960   BITFIELD(49, 4) /* index 783 */,
   6961   TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD,
   6962   TILEGX_OPC_AND, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPEXCH4, TILEGX_OPC_CMPEXCH,
   6963   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
   6964   TILEGX_OPC_CMPNE, TILEGX_OPC_DBLALIGN2, TILEGX_OPC_DBLALIGN4,
   6965   TILEGX_OPC_DBLALIGN6,
   6966   BITFIELD(49, 4) /* index 800 */,
   6967   TILEGX_OPC_EXCH4, TILEGX_OPC_EXCH, TILEGX_OPC_FETCHADD4,
   6968   TILEGX_OPC_FETCHADDGEZ4, TILEGX_OPC_FETCHADDGEZ, TILEGX_OPC_FETCHADD,
   6969   TILEGX_OPC_FETCHAND4, TILEGX_OPC_FETCHAND, TILEGX_OPC_FETCHOR4,
   6970   TILEGX_OPC_FETCHOR, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, TILEGX_OPC_NOR,
   6971   CHILD(817), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX,
   6972   BITFIELD(43, 2) /* index 817 */,
   6973   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(822),
   6974   BITFIELD(45, 2) /* index 822 */,
   6975   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(827),
   6976   BITFIELD(47, 2) /* index 827 */,
   6977   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
   6978   BITFIELD(49, 4) /* index 832 */,
   6979   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD,
   6980   TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL,
   6981   TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_ST1,
   6982   TILEGX_OPC_ST2, TILEGX_OPC_ST4, TILEGX_OPC_STNT1, TILEGX_OPC_STNT2,
   6983   TILEGX_OPC_STNT4,
   6984   BITFIELD(46, 7) /* index 849 */,
   6985   TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT,
   6986   TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT,
   6987   TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST,
   6988   TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_SUBXSC,
   6989   TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC,
   6990   TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBX,
   6991   TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX,
   6992   TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
   6993   TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB,
   6994   TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, CHILD(978), CHILD(987),
   6995   CHILD(1066), CHILD(1150), CHILD(1159), TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   6996   TILEGX_OPC_NONE, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC,
   6997   TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC,
   6998   TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD,
   6999   TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD,
   7000   TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
   7001   TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
   7002   TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
   7003   TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES,
   7004   TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES,
   7005   TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU,
   7006   TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU,
   7007   TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU,
   7008   TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
   7009   TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
   7010   TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
   7011   TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU,
   7012   TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU,
   7013   TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE,
   7014   TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE,
   7015   TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE,
   7016   TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
   7017   TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
   7018   TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
   7019   TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
   7020   TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
   7021   TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
   7022   BITFIELD(43, 3) /* index 978 */,
   7023   TILEGX_OPC_NONE, TILEGX_OPC_DRAIN, TILEGX_OPC_DTLBPR, TILEGX_OPC_FINV,
   7024   TILEGX_OPC_FLUSHWB, TILEGX_OPC_FLUSH, TILEGX_OPC_FNOP, TILEGX_OPC_ICOH,
   7025   BITFIELD(43, 3) /* index 987 */,
   7026   CHILD(996), TILEGX_OPC_INV, TILEGX_OPC_IRET, TILEGX_OPC_JALRP,
   7027   TILEGX_OPC_JALR, TILEGX_OPC_JRP, TILEGX_OPC_JR, CHILD(1051),
   7028   BITFIELD(31, 2) /* index 996 */,
   7029   CHILD(1001), CHILD(1026), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
   7030   BITFIELD(33, 2) /* index 1001 */,
   7031   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(1006),
   7032   BITFIELD(35, 2) /* index 1006 */,
   7033   TILEGX_OPC_ILL, CHILD(1011), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
   7034   BITFIELD(37, 2) /* index 1011 */,
   7035   TILEGX_OPC_ILL, CHILD(1016), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
   7036   BITFIELD(39, 2) /* index 1016 */,
   7037   TILEGX_OPC_ILL, CHILD(1021), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
   7038   BITFIELD(41, 2) /* index 1021 */,
   7039   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_BPT, TILEGX_OPC_ILL,
   7040   BITFIELD(33, 2) /* index 1026 */,
   7041   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(1031),
   7042   BITFIELD(35, 2) /* index 1031 */,
   7043   TILEGX_OPC_ILL, CHILD(1036), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
   7044   BITFIELD(37, 2) /* index 1036 */,
   7045   TILEGX_OPC_ILL, CHILD(1041), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
   7046   BITFIELD(39, 2) /* index 1041 */,
   7047   TILEGX_OPC_ILL, CHILD(1046), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
   7048   BITFIELD(41, 2) /* index 1046 */,
   7049   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_RAISE, TILEGX_OPC_ILL,
   7050   BITFIELD(31, 2) /* index 1051 */,
   7051   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(1056),
   7052   BITFIELD(33, 2) /* index 1056 */,
   7053   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(1061),
   7054   BITFIELD(35, 2) /* index 1061 */,
   7055   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S,
   7056   TILEGX_OPC_PREFETCH_L1_FAULT,
   7057   BITFIELD(43, 3) /* index 1066 */,
   7058   CHILD(1075), CHILD(1090), CHILD(1105), CHILD(1120), CHILD(1135),
   7059   TILEGX_OPC_LDNA, TILEGX_OPC_LDNT1S, TILEGX_OPC_LDNT1U,
   7060   BITFIELD(31, 2) /* index 1075 */,
   7061   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1080),
   7062   BITFIELD(33, 2) /* index 1080 */,
   7063   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1085),
   7064   BITFIELD(35, 2) /* index 1085 */,
   7065   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH,
   7066   BITFIELD(31, 2) /* index 1090 */,
   7067   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1095),
   7068   BITFIELD(33, 2) /* index 1095 */,
   7069   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1100),
   7070   BITFIELD(35, 2) /* index 1100 */,
   7071   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S,
   7072   TILEGX_OPC_PREFETCH_L2_FAULT,
   7073   BITFIELD(31, 2) /* index 1105 */,
   7074   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1110),
   7075   BITFIELD(33, 2) /* index 1110 */,
   7076   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1115),
   7077   BITFIELD(35, 2) /* index 1115 */,
   7078   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2,
   7079   BITFIELD(31, 2) /* index 1120 */,
   7080   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1125),
   7081   BITFIELD(33, 2) /* index 1125 */,
   7082   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1130),
   7083   BITFIELD(35, 2) /* index 1130 */,
   7084   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S,
   7085   TILEGX_OPC_PREFETCH_L3_FAULT,
   7086   BITFIELD(31, 2) /* index 1135 */,
   7087   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1140),
   7088   BITFIELD(33, 2) /* index 1140 */,
   7089   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1145),
   7090   BITFIELD(35, 2) /* index 1145 */,
   7091   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3,
   7092   BITFIELD(43, 3) /* index 1150 */,
   7093   TILEGX_OPC_LDNT2S, TILEGX_OPC_LDNT2U, TILEGX_OPC_LDNT4S, TILEGX_OPC_LDNT4U,
   7094   TILEGX_OPC_LDNT, TILEGX_OPC_LD, TILEGX_OPC_LNK, TILEGX_OPC_MF,
   7095   BITFIELD(43, 3) /* index 1159 */,
   7096   TILEGX_OPC_NAP, TILEGX_OPC_NOP, TILEGX_OPC_SWINT0, TILEGX_OPC_SWINT1,
   7097   TILEGX_OPC_SWINT2, TILEGX_OPC_SWINT3, TILEGX_OPC_WH64, TILEGX_OPC_NONE,
   7098   BITFIELD(49, 4) /* index 1168 */,
   7099   TILEGX_OPC_V1MAXU, TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MZ,
   7100   TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS, TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC,
   7101   TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC, TILEGX_OPC_V2ADD, TILEGX_OPC_V2CMPEQ,
   7102   TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU, TILEGX_OPC_V2CMPLTS,
   7103   TILEGX_OPC_V2CMPLTU,
   7104   BITFIELD(49, 4) /* index 1185 */,
   7105   TILEGX_OPC_V2CMPNE, TILEGX_OPC_V2INT_H, TILEGX_OPC_V2INT_L,
   7106   TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ, TILEGX_OPC_V2MZ,
   7107   TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC,
   7108   TILEGX_OPC_V2SHLSC, TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU,
   7109   TILEGX_OPC_V2SUBSC, TILEGX_OPC_V2SUB,
   7110   BITFIELD(49, 4) /* index 1202 */,
   7111   TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H,
   7112   TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC,
   7113   TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC,
   7114   TILEGX_OPC_V4SUB, TILEGX_OPC_XOR, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   7115   TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   7116   BITFIELD(49, 4) /* index 1219 */,
   7117   TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI,
   7118   TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI,
   7119   TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI,
   7120   TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   7121   TILEGX_OPC_NONE,
   7122   BITFIELD(31, 2) /* index 1236 */,
   7123   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   7124   CHILD(1241),
   7125   BITFIELD(33, 2) /* index 1241 */,
   7126   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   7127   CHILD(1246),
   7128   BITFIELD(35, 2) /* index 1246 */,
   7129   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   7130   CHILD(1251),
   7131   BITFIELD(37, 2) /* index 1251 */,
   7132   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   7133   CHILD(1256),
   7134   BITFIELD(39, 2) /* index 1256 */,
   7135   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   7136   CHILD(1261),
   7137   BITFIELD(41, 2) /* index 1261 */,
   7138   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
   7139   TILEGX_OPC_INFOL,
   7140 };
   7141 
   7142 static const UShort decode_Y0_fsm[178] =
   7143 {
   7144   BITFIELD(27, 4) /* index 0 */,
   7145   CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI,
   7146   TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(118), CHILD(123),
   7147   CHILD(128), CHILD(133), CHILD(153), CHILD(158), CHILD(163), CHILD(168),
   7148   CHILD(173),
   7149   BITFIELD(6, 2) /* index 17 */,
   7150   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22),
   7151   BITFIELD(8, 2) /* index 22 */,
   7152   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27),
   7153   BITFIELD(10, 2) /* index 27 */,
   7154   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
   7155   BITFIELD(0, 2) /* index 32 */,
   7156   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37),
   7157   BITFIELD(2, 2) /* index 37 */,
   7158   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42),
   7159   BITFIELD(4, 2) /* index 42 */,
   7160   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47),
   7161   BITFIELD(6, 2) /* index 47 */,
   7162   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52),
   7163   BITFIELD(8, 2) /* index 52 */,
   7164   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57),
   7165   BITFIELD(10, 2) /* index 57 */,
   7166   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
   7167   BITFIELD(18, 2) /* index 62 */,
   7168   TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
   7169   BITFIELD(15, 5) /* index 67 */,
   7170   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
   7171   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
   7172   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD,
   7173   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
   7174   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
   7175   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD,
   7176   TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD,
   7177   TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(100),
   7178   CHILD(109), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   7179   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   7180   BITFIELD(12, 3) /* index 100 */,
   7181   TILEGX_OPC_NONE, TILEGX_OPC_CLZ, TILEGX_OPC_CTZ, TILEGX_OPC_FNOP,
   7182   TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NOP, TILEGX_OPC_PCNT,
   7183   TILEGX_OPC_REVBITS,
   7184   BITFIELD(12, 3) /* index 109 */,
   7185   TILEGX_OPC_REVBYTES, TILEGX_OPC_TBLIDXB0, TILEGX_OPC_TBLIDXB1,
   7186   TILEGX_OPC_TBLIDXB2, TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   7187   TILEGX_OPC_NONE,
   7188   BITFIELD(18, 2) /* index 118 */,
   7189   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
   7190   BITFIELD(18, 2) /* index 123 */,
   7191   TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE, TILEGX_OPC_MULAX, TILEGX_OPC_MULX,
   7192   BITFIELD(18, 2) /* index 128 */,
   7193   TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_MNZ, TILEGX_OPC_MZ,
   7194   BITFIELD(18, 2) /* index 133 */,
   7195   TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(138), TILEGX_OPC_XOR,
   7196   BITFIELD(12, 2) /* index 138 */,
   7197   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(143),
   7198   BITFIELD(14, 2) /* index 143 */,
   7199   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(148),
   7200   BITFIELD(16, 2) /* index 148 */,
   7201   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
   7202   BITFIELD(18, 2) /* index 153 */,
   7203   TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU,
   7204   BITFIELD(18, 2) /* index 158 */,
   7205   TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX,
   7206   TILEGX_OPC_SHL3ADDX,
   7207   BITFIELD(18, 2) /* index 163 */,
   7208   TILEGX_OPC_MUL_HS_HS, TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_LS_LS,
   7209   TILEGX_OPC_MUL_LU_LU,
   7210   BITFIELD(18, 2) /* index 168 */,
   7211   TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_LS_LS,
   7212   TILEGX_OPC_MULA_LU_LU,
   7213   BITFIELD(18, 2) /* index 173 */,
   7214   TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI,
   7215 };
   7216 
   7217 static const UShort decode_Y1_fsm[167] =
   7218 {
   7219   BITFIELD(58, 4) /* index 0 */,
   7220   TILEGX_OPC_NONE, CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI,
   7221   TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(117), CHILD(122),
   7222   CHILD(127), CHILD(132), CHILD(152), CHILD(157), CHILD(162), TILEGX_OPC_NONE,
   7223   BITFIELD(37, 2) /* index 17 */,
   7224   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22),
   7225   BITFIELD(39, 2) /* index 22 */,
   7226   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27),
   7227   BITFIELD(41, 2) /* index 27 */,
   7228   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
   7229   BITFIELD(31, 2) /* index 32 */,
   7230   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37),
   7231   BITFIELD(33, 2) /* index 37 */,
   7232   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42),
   7233   BITFIELD(35, 2) /* index 42 */,
   7234   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47),
   7235   BITFIELD(37, 2) /* index 47 */,
   7236   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52),
   7237   BITFIELD(39, 2) /* index 52 */,
   7238   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57),
   7239   BITFIELD(41, 2) /* index 57 */,
   7240   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
   7241   BITFIELD(49, 2) /* index 62 */,
   7242   TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
   7243   BITFIELD(47, 4) /* index 67 */,
   7244   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
   7245   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
   7246   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD,
   7247   TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(84),
   7248   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
   7249   BITFIELD(43, 3) /* index 84 */,
   7250   CHILD(93), CHILD(96), CHILD(99), CHILD(102), CHILD(105), CHILD(108),
   7251   CHILD(111), CHILD(114),
   7252   BITFIELD(46, 1) /* index 93 */,
   7253   TILEGX_OPC_NONE, TILEGX_OPC_FNOP,
   7254   BITFIELD(46, 1) /* index 96 */,
   7255   TILEGX_OPC_NONE, TILEGX_OPC_ILL,
   7256   BITFIELD(46, 1) /* index 99 */,
   7257   TILEGX_OPC_NONE, TILEGX_OPC_JALRP,
   7258   BITFIELD(46, 1) /* index 102 */,
   7259   TILEGX_OPC_NONE, TILEGX_OPC_JALR,
   7260   BITFIELD(46, 1) /* index 105 */,
   7261   TILEGX_OPC_NONE, TILEGX_OPC_JRP,
   7262   BITFIELD(46, 1) /* index 108 */,
   7263   TILEGX_OPC_NONE, TILEGX_OPC_JR,
   7264   BITFIELD(46, 1) /* index 111 */,
   7265   TILEGX_OPC_NONE, TILEGX_OPC_LNK,
   7266   BITFIELD(46, 1) /* index 114 */,
   7267   TILEGX_OPC_NONE, TILEGX_OPC_NOP,
   7268   BITFIELD(49, 2) /* index 117 */,
   7269   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
   7270   BITFIELD(49, 2) /* index 122 */,
   7271   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE,
   7272   BITFIELD(49, 2) /* index 127 */,
   7273   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_MNZ, TILEGX_OPC_MZ,
   7274   BITFIELD(49, 2) /* index 132 */,
   7275   TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(137), TILEGX_OPC_XOR,
   7276   BITFIELD(43, 2) /* index 137 */,
   7277   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(142),
   7278   BITFIELD(45, 2) /* index 142 */,
   7279   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(147),
   7280   BITFIELD(47, 2) /* index 147 */,
   7281   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
   7282   BITFIELD(49, 2) /* index 152 */,
   7283   TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU,
   7284   BITFIELD(49, 2) /* index 157 */,
   7285   TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX,
   7286   TILEGX_OPC_SHL3ADDX,
   7287   BITFIELD(49, 2) /* index 162 */,
   7288   TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI,
   7289 };
   7290 
   7291 static const UShort decode_Y2_fsm[118] =
   7292 {
   7293   BITFIELD(62, 2) /* index 0 */,
   7294   TILEGX_OPC_NONE, CHILD(5), CHILD(66), CHILD(109),
   7295   BITFIELD(55, 3) /* index 5 */,
   7296   CHILD(14), CHILD(14), CHILD(14), CHILD(17), CHILD(40), CHILD(40), CHILD(40),
   7297   CHILD(43),
   7298   BITFIELD(26, 1) /* index 14 */,
   7299   TILEGX_OPC_LD1S, TILEGX_OPC_LD1U,
   7300   BITFIELD(26, 1) /* index 17 */,
   7301   CHILD(20), CHILD(30),
   7302   BITFIELD(51, 2) /* index 20 */,
   7303   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(25),
   7304   BITFIELD(53, 2) /* index 25 */,
   7305   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S,
   7306   TILEGX_OPC_PREFETCH_L1_FAULT,
   7307   BITFIELD(51, 2) /* index 30 */,
   7308   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(35),
   7309   BITFIELD(53, 2) /* index 35 */,
   7310   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH,
   7311   BITFIELD(26, 1) /* index 40 */,
   7312   TILEGX_OPC_LD2S, TILEGX_OPC_LD2U,
   7313   BITFIELD(26, 1) /* index 43 */,
   7314   CHILD(46), CHILD(56),
   7315   BITFIELD(51, 2) /* index 46 */,
   7316   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(51),
   7317   BITFIELD(53, 2) /* index 51 */,
   7318   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S,
   7319   TILEGX_OPC_PREFETCH_L2_FAULT,
   7320   BITFIELD(51, 2) /* index 56 */,
   7321   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(61),
   7322   BITFIELD(53, 2) /* index 61 */,
   7323   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2,
   7324   BITFIELD(56, 2) /* index 66 */,
   7325   CHILD(71), CHILD(74), CHILD(90), CHILD(93),
   7326   BITFIELD(26, 1) /* index 71 */,
   7327   TILEGX_OPC_NONE, TILEGX_OPC_LD4S,
   7328   BITFIELD(26, 1) /* index 74 */,
   7329   TILEGX_OPC_NONE, CHILD(77),
   7330   BITFIELD(51, 2) /* index 77 */,
   7331   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(82),
   7332   BITFIELD(53, 2) /* index 82 */,
   7333   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(87),
   7334   BITFIELD(55, 1) /* index 87 */,
   7335   TILEGX_OPC_LD4S, TILEGX_OPC_PREFETCH_L3_FAULT,
   7336   BITFIELD(26, 1) /* index 90 */,
   7337   TILEGX_OPC_LD4U, TILEGX_OPC_LD,
   7338   BITFIELD(26, 1) /* index 93 */,
   7339   CHILD(96), TILEGX_OPC_LD,
   7340   BITFIELD(51, 2) /* index 96 */,
   7341   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(101),
   7342   BITFIELD(53, 2) /* index 101 */,
   7343   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(106),
   7344   BITFIELD(55, 1) /* index 106 */,
   7345   TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3,
   7346   BITFIELD(26, 1) /* index 109 */,
   7347   CHILD(112), CHILD(115),
   7348   BITFIELD(57, 1) /* index 112 */,
   7349   TILEGX_OPC_ST1, TILEGX_OPC_ST4,
   7350   BITFIELD(57, 1) /* index 115 */,
   7351   TILEGX_OPC_ST2, TILEGX_OPC_ST,
   7352 };
   7353 
   7354 #undef BITFIELD
   7355 #undef CHILD
   7356 const UShort * const
   7357 tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS] =
   7358 {
   7359   decode_X0_fsm,
   7360   decode_X1_fsm,
   7361   decode_Y0_fsm,
   7362   decode_Y1_fsm,
   7363   decode_Y2_fsm
   7364 };
   7365 const struct tilegx_operand tilegx_operands[35] =
   7366 {
   7367   {
   7368     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X0),
   7369     8, 1, 0, 0, 0, 0,
   7370     create_Imm8_X0, get_Imm8_X0
   7371   },
   7372   {
   7373     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X1),
   7374     8, 1, 0, 0, 0, 0,
   7375     create_Imm8_X1, get_Imm8_X1
   7376   },
   7377   {
   7378     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y0),
   7379     8, 1, 0, 0, 0, 0,
   7380     create_Imm8_Y0, get_Imm8_Y0
   7381   },
   7382   {
   7383     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y1),
   7384     8, 1, 0, 0, 0, 0,
   7385     create_Imm8_Y1, get_Imm8_Y1
   7386   },
   7387   {
   7388     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X0_HW0_LAST),
   7389     16, 1, 0, 0, 0, 0,
   7390     create_Imm16_X0, get_Imm16_X0
   7391   },
   7392   {
   7393     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X1_HW0_LAST),
   7394     16, 1, 0, 0, 0, 0,
   7395     create_Imm16_X1, get_Imm16_X1
   7396   },
   7397   {
   7398     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7399     6, 0, 0, 1, 0, 0,
   7400     create_Dest_X1, get_Dest_X1
   7401   },
   7402   {
   7403     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7404     6, 0, 1, 0, 0, 0,
   7405     create_SrcA_X1, get_SrcA_X1
   7406   },
   7407   {
   7408     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7409     6, 0, 0, 1, 0, 0,
   7410     create_Dest_X0, get_Dest_X0
   7411   },
   7412   {
   7413     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7414     6, 0, 1, 0, 0, 0,
   7415     create_SrcA_X0, get_SrcA_X0
   7416   },
   7417   {
   7418     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7419     6, 0, 0, 1, 0, 0,
   7420     create_Dest_Y0, get_Dest_Y0
   7421   },
   7422   {
   7423     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7424     6, 0, 1, 0, 0, 0,
   7425     create_SrcA_Y0, get_SrcA_Y0
   7426   },
   7427   {
   7428     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7429     6, 0, 0, 1, 0, 0,
   7430     create_Dest_Y1, get_Dest_Y1
   7431   },
   7432   {
   7433     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7434     6, 0, 1, 0, 0, 0,
   7435     create_SrcA_Y1, get_SrcA_Y1
   7436   },
   7437   {
   7438     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7439     6, 0, 1, 0, 0, 0,
   7440     create_SrcA_Y2, get_SrcA_Y2
   7441   },
   7442   {
   7443     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7444     6, 0, 1, 1, 0, 0,
   7445     create_SrcA_X1, get_SrcA_X1
   7446   },
   7447   {
   7448     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7449     6, 0, 1, 0, 0, 0,
   7450     create_SrcB_X0, get_SrcB_X0
   7451   },
   7452   {
   7453     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7454     6, 0, 1, 0, 0, 0,
   7455     create_SrcB_X1, get_SrcB_X1
   7456   },
   7457   {
   7458     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7459     6, 0, 1, 0, 0, 0,
   7460     create_SrcB_Y0, get_SrcB_Y0
   7461   },
   7462   {
   7463     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7464     6, 0, 1, 0, 0, 0,
   7465     create_SrcB_Y1, get_SrcB_Y1
   7466   },
   7467   {
   7468     TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_BROFF_X1),
   7469     17, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
   7470     create_BrOff_X1, get_BrOff_X1
   7471   },
   7472   {
   7473     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMSTART_X0),
   7474     6, 0, 0, 0, 0, 0,
   7475     create_BFStart_X0, get_BFStart_X0
   7476   },
   7477   {
   7478     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMEND_X0),
   7479     6, 0, 0, 0, 0, 0,
   7480     create_BFEnd_X0, get_BFEnd_X0
   7481   },
   7482   {
   7483     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7484     6, 0, 1, 1, 0, 0,
   7485     create_Dest_X0, get_Dest_X0
   7486   },
   7487   {
   7488     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7489     6, 0, 1, 1, 0, 0,
   7490     create_Dest_Y0, get_Dest_Y0
   7491   },
   7492   {
   7493     TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_JUMPOFF_X1),
   7494     27, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
   7495     create_JumpOff_X1, get_JumpOff_X1
   7496   },
   7497   {
   7498     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7499     6, 0, 0, 1, 0, 0,
   7500     create_SrcBDest_Y2, get_SrcBDest_Y2
   7501   },
   7502   {
   7503     TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MF_IMM14_X1),
   7504     14, 0, 0, 0, 0, 0,
   7505     create_MF_Imm14_X1, get_MF_Imm14_X1
   7506   },
   7507   {
   7508     TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MT_IMM14_X1),
   7509     14, 0, 0, 0, 0, 0,
   7510     create_MT_Imm14_X1, get_MT_Imm14_X1
   7511   },
   7512   {
   7513     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X0),
   7514     6, 0, 0, 0, 0, 0,
   7515     create_ShAmt_X0, get_ShAmt_X0
   7516   },
   7517   {
   7518     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X1),
   7519     6, 0, 0, 0, 0, 0,
   7520     create_ShAmt_X1, get_ShAmt_X1
   7521   },
   7522   {
   7523     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y0),
   7524     6, 0, 0, 0, 0, 0,
   7525     create_ShAmt_Y0, get_ShAmt_Y0
   7526   },
   7527   {
   7528     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y1),
   7529     6, 0, 0, 0, 0, 0,
   7530     create_ShAmt_Y1, get_ShAmt_Y1
   7531   },
   7532   {
   7533     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
   7534     6, 0, 1, 0, 0, 0,
   7535     create_SrcBDest_Y2, get_SrcBDest_Y2
   7536   },
   7537   {
   7538     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_DEST_IMM8_X1),
   7539     8, 1, 0, 0, 0, 0,
   7540     create_Dest_Imm8_X1, get_Dest_Imm8_X1
   7541   }
   7542 };
   7543 
   7544 
   7545 /* Given a set of bundle bits and a specific pipe, returns which
   7546  * instruction the bundle contains in that pipe.
   7547  */
   7548 const struct tilegx_opcode *
   7549 find_opcode ( tilegx_bundle_bits bits, tilegx_pipeline pipe )
   7550 {
   7551   const UShort *table = tilegx_bundle_decoder_fsms[pipe];
   7552   Int index = 0;
   7553 
   7554   while (1)
   7555   {
   7556     UShort bitspec = table[index];
   7557     UInt bitfield =
   7558       ((UInt)(bits >> (bitspec & 63))) & (bitspec >> 6);
   7559 
   7560     UShort next = table[index + 1 + bitfield];
   7561     if (next <= TILEGX_OPC_NONE)
   7562       return &tilegx_opcodes[next];
   7563 
   7564     index = next - TILEGX_OPC_NONE;
   7565   }
   7566 }
   7567 
   7568 
   7569 int
   7570 parse_insn_tilegx ( tilegx_bundle_bits bits,
   7571                     ULong pc,
   7572                     struct tilegx_decoded_instruction
   7573                     decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE] )
   7574 {
   7575   Int num_instructions = 0;
   7576   Int pipe;
   7577 
   7578   Int min_pipe, max_pipe;
   7579   if ((bits & TILEGX_BUNDLE_MODE_MASK) == 0)
   7580   {
   7581     min_pipe = TILEGX_PIPELINE_X0;
   7582     max_pipe = TILEGX_PIPELINE_X1;
   7583   }
   7584   else
   7585   {
   7586     min_pipe = TILEGX_PIPELINE_Y0;
   7587     max_pipe = TILEGX_PIPELINE_Y2;
   7588   }
   7589 
   7590   /* For each pipe, find an instruction that fits. */
   7591   for (pipe = min_pipe; pipe <= max_pipe; pipe++)
   7592   {
   7593     const struct tilegx_opcode *opc;
   7594     struct tilegx_decoded_instruction *d;
   7595     Int i;
   7596 
   7597     d = &decoded[num_instructions++];
   7598     opc = find_opcode (bits, (tilegx_pipeline)pipe);
   7599     d->opcode = opc;
   7600 
   7601     /* Decode each operand, sign extending, etc. as appropriate. */
   7602     for (i = 0; i < opc->num_operands; i++)
   7603     {
   7604       const struct tilegx_operand *op =
   7605         &tilegx_operands[opc->operands[pipe][i]];
   7606       Int raw_opval = op->extract (bits);
   7607       Long opval;
   7608 
   7609       if (op->is_signed)
   7610       {
   7611         /* Sign-extend the operand. */
   7612         Int shift = (int)((sizeof(int) * 8) - op->num_bits);
   7613         raw_opval = (raw_opval << shift) >> shift;
   7614       }
   7615 
   7616       /* Adjust PC-relative scaled branch offsets. */
   7617       if (op->type == TILEGX_OP_TYPE_ADDRESS)
   7618         opval = (raw_opval * TILEGX_BUNDLE_SIZE_IN_BYTES) + pc;
   7619       else
   7620         opval = raw_opval;
   7621 
   7622       /* Record the final value. */
   7623       d->operands[i] = op;
   7624       d->operand_values[i] = opval;
   7625     }
   7626   }
   7627   decoded[num_instructions].opcode = NULL;
   7628   return num_instructions;
   7629 }
   7630 
   7631 tilegx_bundle_bits mkTileGxInsn ( Int opc, Int argc, ... )
   7632 {
   7633   struct tilegx_decoded_instruction decoded;
   7634   decoded.opcode =  &tilegx_opcodes[opc];
   7635   Int i;
   7636   va_list argv;
   7637 
   7638   if (decoded.opcode->num_operands != argc)
   7639     return -1;
   7640 
   7641   if (opc > TILEGX_OPC_NONE) return 0;
   7642 
   7643   if (decoded.opcode->num_operands > 4)
   7644     return -1;
   7645 
   7646   va_start(argv, argc);
   7647   for (i = 0 ; i < decoded.opcode->num_operands; i++)
   7648   {
   7649     decoded.operands[i] = 0;
   7650     decoded.operand_values[i] = va_arg(argv, ULong);
   7651   }
   7652   va_end(argv);
   7653 
   7654   return encode_insn_tilegx(decoded);
   7655 }
   7656 
   7657 tilegx_bundle_bits
   7658 encode_insn_tilegx ( struct tilegx_decoded_instruction decoded )
   7659 {
   7660   const struct tilegx_opcode *opc =
   7661     decoded.opcode;
   7662 
   7663   tilegx_bundle_bits insn = 0;
   7664   Int pipeX01 = (opc->pipes & 0x01) ? 0 : 1;
   7665   Int op_num  = opc->num_operands;
   7666 
   7667   /* Assume either X0 or X1. */
   7668   if ((opc->pipes & 3) == 0)
   7669     return -1;
   7670 
   7671   /* Insert fnop in other pipe. */
   7672   insn = tilegx_opcodes[TILEGX_OPC_FNOP].
   7673     fixed_bit_values[pipeX01 ? 0 : 1];
   7674 
   7675   insn |= opc->fixed_bit_values[pipeX01];
   7676 
   7677   Int i;
   7678   /* loop for each operand. */
   7679   for (i = 0 ; i < op_num; i++)
   7680     {
   7681       const struct tilegx_operand *opd =
   7682         &tilegx_operands[opc->operands[pipeX01][i]];
   7683       Long  op = decoded.operand_values[i];
   7684       decoded.operands[i] = opd;
   7685       ULong x = opd->insert(op);
   7686       insn |= x;
   7687     }
   7688 
   7689   return insn;
   7690 }
   7691 
   7692 /*---------------------------------------------------------------*/
   7693 /*--- end                                    tilegx_disasm.c  ---*/
   7694 /*---------------------------------------------------------------*/
   7695