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      1 //===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // Utility functions for Hexagon specific MCInst queries
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
     15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
     16 
     17 #include "llvm/MC/MCInstrInfo.h"
     18 
     19 #include <bitset>
     20 
     21 namespace llvm {
     22 class MCInstrDesc;
     23 class MCInstrInfo;
     24 class MCInst;
     25 class MCOperand;
     26 namespace HexagonMCInstrInfo {
     27 void AppendImplicitOperands(MCInst &MCI);
     28 
     29 // Return number of bits in the constant extended operand.
     30 unsigned getBitCount(MCInstrInfo const &MCII, MCInst const &MCI);
     31 
     32 // Return constant extended operand number.
     33 unsigned short getCExtOpNum(MCInstrInfo const &MCII, MCInst const &MCI);
     34 
     35 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
     36 
     37 std::bitset<16> GetImplicitBits(MCInst const &MCI);
     38 
     39 // Return the max value that a constant extendable operand can have
     40 // without being extended.
     41 int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI);
     42 
     43 // Return the min value that a constant extendable operand can have
     44 // without being extended.
     45 int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI);
     46 
     47 // Return the operand that consumes or produces a new value.
     48 MCOperand const &getNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
     49 
     50 // Return the Hexagon ISA class for the insn.
     51 unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI);
     52 
     53 // Return whether the instruction is a legal new-value producer.
     54 bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
     55 
     56 // Return whether the insn is an actual insn.
     57 bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI);
     58 
     59 // Return whether the instruction needs to be constant extended.
     60 bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI);
     61 
     62 // Return true if the insn may be extended based on the operand value.
     63 bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI);
     64 
     65 // Return whether the instruction must be always extended.
     66 bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI);
     67 
     68 // Return whether the insn is a new-value consumer.
     69 bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
     70 
     71 // Return true if the operand can be constant extended.
     72 bool isOperandExtended(MCInstrInfo const &MCII, MCInst const &MCI,
     73                        unsigned short OperandNum);
     74 
     75 bool isPacketBegin(MCInst const &MCI);
     76 
     77 bool isPacketEnd(MCInst const &MCI);
     78 
     79 // Return whether the insn is a prefix.
     80 bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI);
     81 
     82 // Return whether the insn is solo, i.e., cannot be in a packet.
     83 bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI);
     84 
     85 static const size_t packetBeginIndex = 0;
     86 static const size_t packetEndIndex = 1;
     87 
     88 void resetPacket(MCInst &MCI);
     89 
     90 inline void SanityCheckImplicitOperands(MCInst const &MCI) {
     91   assert(MCI.getNumOperands() >= 2 && "At least the two implicit operands");
     92   assert(MCI.getOperand(MCI.getNumOperands() - 1).isInst() &&
     93           "Implicit bits and flags");
     94   assert(MCI.getOperand(MCI.getNumOperands() - 2).isImm() &&
     95           "Parent pointer");
     96 }
     97 
     98 void SetImplicitBits(MCInst &MCI, std::bitset<16> Bits);
     99 
    100 void setPacketBegin(MCInst &MCI, bool Y);
    101 
    102 void setPacketEnd(MCInst &MCI, bool Y);
    103 }
    104 }
    105 
    106 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
    107