| /external/llvm/test/MC/AArch64/ |
| arm64-verbose-vector-case.s | 3 pmull v8.8h, v8.8b, v8.8b label
5 pmull v8.1q, v8.1d, v8.1d label
7 // CHECK: pmull v8.8h, v8.8b, v8.8b // encoding: [0x08,0xe1,0x28,0x0e]
9 // CHECK: pmull v8.1q, v8.1d, v8.1d // encoding: [0x08,0xe1,0xe8,0x0e]
12 pmull v8.8H, v8.8B, v8.8B label
14 pmull v8.1Q, v8.1D, v8.1D label
16 // CHECK: pmull v8.8h, v8.8b, v8.8b // encoding: [0x08,0xe1,0x28,0x0e]
18 // CHECK: pmull v8.1q, v8.1d, v8.1d // encoding: [0x08,0xe1,0xe8,0x0e]
|
| /external/vixl/src/vixl/a64/ |
| logic-a64.cc | 1126 LogicVRegister Simulator::pmull(VectorFormat vform, function in class:vixl::Simulator
[all...] |
