1 /* 2 * Copyright 2010 Jerome Glisse <glisse (at) freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 * Corbin Simpson <MostAwesomeDude (at) gmail.com> 26 */ 27 #include "r600_pipe.h" 28 #include "util/u_upload_mgr.h" 29 #include "util/u_memory.h" 30 31 static void r600_buffer_destroy(struct pipe_screen *screen, 32 struct pipe_resource *buf) 33 { 34 struct r600_resource *rbuffer = r600_resource(buf); 35 36 pb_reference(&rbuffer->buf, NULL); 37 FREE(rbuffer); 38 } 39 40 static struct pipe_transfer *r600_get_transfer(struct pipe_context *ctx, 41 struct pipe_resource *resource, 42 unsigned level, 43 unsigned usage, 44 const struct pipe_box *box) 45 { 46 struct r600_context *rctx = (struct r600_context*)ctx; 47 struct r600_transfer *transfer = util_slab_alloc(&rctx->pool_transfers); 48 49 assert(box->x + box->width <= resource->width0); 50 51 transfer->transfer.resource = resource; 52 transfer->transfer.level = level; 53 transfer->transfer.usage = usage; 54 transfer->transfer.box = *box; 55 transfer->transfer.stride = 0; 56 transfer->transfer.layer_stride = 0; 57 transfer->transfer.data = NULL; 58 transfer->staging = NULL; 59 transfer->offset = 0; 60 61 /* Note strides are zero, this is ok for buffers, but not for 62 * textures 2d & higher at least. 63 */ 64 return &transfer->transfer; 65 } 66 67 static void r600_set_constants_dirty_if_bound(struct r600_context *rctx, 68 struct r600_constbuf_state *state, 69 struct r600_resource *rbuffer) 70 { 71 bool found = false; 72 uint32_t mask = state->enabled_mask; 73 74 while (mask) { 75 unsigned i = u_bit_scan(&mask); 76 if (state->cb[i].buffer == &rbuffer->b.b) { 77 found = true; 78 state->dirty_mask |= 1 << i; 79 } 80 } 81 if (found) { 82 r600_constant_buffers_dirty(rctx, state); 83 } 84 } 85 86 static void *r600_buffer_transfer_map(struct pipe_context *pipe, 87 struct pipe_transfer *transfer) 88 { 89 struct r600_resource *rbuffer = r600_resource(transfer->resource); 90 struct r600_context *rctx = (struct r600_context*)pipe; 91 uint8_t *data; 92 93 if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE && 94 !(transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED)) { 95 assert(transfer->usage & PIPE_TRANSFER_WRITE); 96 97 /* Check if mapping this buffer would cause waiting for the GPU. */ 98 if (rctx->ws->cs_is_buffer_referenced(rctx->cs, rbuffer->cs_buf, RADEON_USAGE_READWRITE) || 99 rctx->ws->buffer_is_busy(rbuffer->buf, RADEON_USAGE_READWRITE)) { 100 unsigned i, mask; 101 102 /* Discard the buffer. */ 103 pb_reference(&rbuffer->buf, NULL); 104 105 /* Create a new one in the same pipe_resource. */ 106 /* XXX We probably want a different alignment for buffers and textures. */ 107 r600_init_resource(rctx->screen, rbuffer, rbuffer->b.b.width0, 4096, 108 rbuffer->b.b.bind, rbuffer->b.b.usage); 109 110 /* We changed the buffer, now we need to bind it where the old one was bound. */ 111 /* Vertex buffers. */ 112 mask = rctx->vertex_buffer_state.enabled_mask; 113 while (mask) { 114 i = u_bit_scan(&mask); 115 if (rctx->vertex_buffer_state.vb[i].buffer == &rbuffer->b.b) { 116 rctx->vertex_buffer_state.dirty_mask |= 1 << i; 117 r600_vertex_buffers_dirty(rctx); 118 } 119 } 120 /* Streamout buffers. */ 121 for (i = 0; i < rctx->num_so_targets; i++) { 122 if (rctx->so_targets[i]->b.buffer == &rbuffer->b.b) { 123 r600_context_streamout_end(rctx); 124 rctx->streamout_start = TRUE; 125 rctx->streamout_append_bitmask = ~0; 126 } 127 } 128 /* Constant buffers. */ 129 r600_set_constants_dirty_if_bound(rctx, &rctx->vs_constbuf_state, rbuffer); 130 r600_set_constants_dirty_if_bound(rctx, &rctx->ps_constbuf_state, rbuffer); 131 } 132 } 133 #if 0 /* this is broken (see Bug 53130) */ 134 else if ((transfer->usage & PIPE_TRANSFER_DISCARD_RANGE) && 135 !(transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) && 136 rctx->screen->has_streamout && 137 /* The buffer range must be aligned to 4. */ 138 transfer->box.x % 4 == 0 && transfer->box.width % 4 == 0) { 139 assert(transfer->usage & PIPE_TRANSFER_WRITE); 140 141 /* Check if mapping this buffer would cause waiting for the GPU. */ 142 if (rctx->ws->cs_is_buffer_referenced(rctx->cs, rbuffer->cs_buf, RADEON_USAGE_READWRITE) || 143 rctx->ws->buffer_is_busy(rbuffer->buf, RADEON_USAGE_READWRITE)) { 144 /* Do a wait-free write-only transfer using a temporary buffer. */ 145 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer; 146 147 rtransfer->staging = (struct r600_resource*) 148 pipe_buffer_create(pipe->screen, PIPE_BIND_VERTEX_BUFFER, 149 PIPE_USAGE_STAGING, transfer->box.width); 150 return rctx->ws->buffer_map(rtransfer->staging->cs_buf, rctx->cs, PIPE_TRANSFER_WRITE); 151 } 152 } 153 #endif 154 155 data = rctx->ws->buffer_map(rbuffer->cs_buf, rctx->cs, transfer->usage); 156 if (!data) 157 return NULL; 158 159 return (uint8_t*)data + transfer->box.x; 160 } 161 162 static void r600_buffer_transfer_unmap(struct pipe_context *pipe, 163 struct pipe_transfer *transfer) 164 { 165 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer; 166 167 if (rtransfer->staging) { 168 struct pipe_box box; 169 u_box_1d(0, transfer->box.width, &box); 170 171 /* Copy the staging buffer into the original one. */ 172 r600_copy_buffer(pipe, transfer->resource, transfer->box.x, 173 &rtransfer->staging->b.b, &box); 174 pipe_resource_reference((struct pipe_resource**)&rtransfer->staging, NULL); 175 } 176 } 177 178 static void r600_transfer_destroy(struct pipe_context *ctx, 179 struct pipe_transfer *transfer) 180 { 181 struct r600_context *rctx = (struct r600_context*)ctx; 182 util_slab_free(&rctx->pool_transfers, transfer); 183 } 184 185 static const struct u_resource_vtbl r600_buffer_vtbl = 186 { 187 u_default_resource_get_handle, /* get_handle */ 188 r600_buffer_destroy, /* resource_destroy */ 189 r600_get_transfer, /* get_transfer */ 190 r600_transfer_destroy, /* transfer_destroy */ 191 r600_buffer_transfer_map, /* transfer_map */ 192 NULL, /* transfer_flush_region */ 193 r600_buffer_transfer_unmap, /* transfer_unmap */ 194 NULL /* transfer_inline_write */ 195 }; 196 197 bool r600_init_resource(struct r600_screen *rscreen, 198 struct r600_resource *res, 199 unsigned size, unsigned alignment, 200 unsigned bind, unsigned usage) 201 { 202 uint32_t initial_domain, domains; 203 204 /* Staging resources particpate in transfers and blits only 205 * and are used for uploads and downloads from regular 206 * resources. We generate them internally for some transfers. 207 */ 208 if (usage == PIPE_USAGE_STAGING) { 209 domains = RADEON_DOMAIN_GTT; 210 initial_domain = RADEON_DOMAIN_GTT; 211 } else { 212 domains = RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM; 213 214 switch(usage) { 215 case PIPE_USAGE_DYNAMIC: 216 case PIPE_USAGE_STREAM: 217 case PIPE_USAGE_STAGING: 218 initial_domain = RADEON_DOMAIN_GTT; 219 break; 220 case PIPE_USAGE_DEFAULT: 221 case PIPE_USAGE_STATIC: 222 case PIPE_USAGE_IMMUTABLE: 223 default: 224 initial_domain = RADEON_DOMAIN_VRAM; 225 break; 226 } 227 } 228 229 res->buf = rscreen->ws->buffer_create(rscreen->ws, size, alignment, bind, initial_domain); 230 if (!res->buf) { 231 return false; 232 } 233 234 res->cs_buf = rscreen->ws->buffer_get_cs_handle(res->buf); 235 res->domains = domains; 236 return true; 237 } 238 239 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen, 240 const struct pipe_resource *templ, 241 unsigned alignment) 242 { 243 struct r600_screen *rscreen = (struct r600_screen*)screen; 244 struct r600_resource *rbuffer; 245 246 rbuffer = MALLOC_STRUCT(r600_resource); 247 248 rbuffer->b.b = *templ; 249 pipe_reference_init(&rbuffer->b.b.reference, 1); 250 rbuffer->b.b.screen = screen; 251 rbuffer->b.vtbl = &r600_buffer_vtbl; 252 253 if (!r600_init_resource(rscreen, rbuffer, templ->width0, alignment, templ->bind, templ->usage)) { 254 FREE(rbuffer); 255 return NULL; 256 } 257 return &rbuffer->b.b; 258 } 259
