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    Searched defs:r_base (Results 1 - 9 of 9) sorted by null

  /art/compiler/dex/quick/arm/
call_arm.cc 45 * adr r_base, <table>
49 * ldmia r_base!, {r_key, r_disp}
69 RegStorage r_base = AllocTemp(); local
80 NewLIR3(kThumb2Adr, r_base.GetReg(), 0, WrapPointer(tab_rec));
87 NewLIR2(kThumb2LdmiaWB, r_base.GetReg(), (1 << r_key.GetRegNum()) | (1 << r_disp.GetRegNum()));
  /art/compiler/dex/quick/arm64/
call_arm64.cc 41 * adr r_base, <table>
46 * ldp r_key, r_disp, [r_base], #8
50 * adr r_base, #0 ; This is the instruction from which we compute displacements
51 * add r_base, r_disp
52 * br r_base
68 RegStorage r_base = AllocTempWide(); local
73 NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, WrapPointer(tab_rec));
83 NewLIR4(kA64LdpPost4rrXD, r_key.GetReg(), r_disp.GetReg(), r_base.GetReg(), 2);
91 LIR* switch_label = NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, -1);
95 OpRegRegRegExtend(kOpAdd, r_base, r_base, As64BitReg(r_disp), kA64Sxtw, 0U)
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  /art/compiler/dex/quick/mips/
call_mips.cc 58 * addiu r_base, rRA, <table> - <BaseLabel> ; table relative to BaseLabel
59 addu r_end, r_end, r_base ; end of table
62 * beq r_base, r_end, done
63 * lw r_key, 0(r_base)
64 * addu r_base, 8
66 * lw r_disp, -4(r_base)
108 RegStorage r_base = AllocPtrSizeTemp(); local
109 NewLIR4(kMipsDelta, r_base.GetReg(), 0, WrapPointer(base_label), WrapPointer(tab_rec));
110 OpRegRegReg(kOpAdd, r_end, r_end, r_base);
118 LIR* exit_branch = OpCmpBranch(kCondEq, r_base, r_end, nullptr)
197 RegStorage r_base = AllocPtrSizeTemp(); local
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  /art/compiler/dex/quick/
gen_common.cc 96 RegStorage r_base = TargetReg(kArg0, kRef); local
97 LockTemp(r_base);
100 OpPcRelDexCacheArrayLoad(cu_->dex_file, offset, r_base, false);
103 RegStorage r_method = LoadCurrMethodWithHint(r_base);
104 LoadRefDisp(r_method, ArtMethod::DexCacheResolvedTypesOffset().Int32Value(), r_base,
107 LoadRefDisp(r_base, offset_of_field, r_base, kNotVolatile);
109 // r_base now points at static storage (Class*) or null if the type is not yet resolved.
112 // Check if r_base is null.
113 unresolved_branch = OpCmpImmBranch(kCondEq, r_base, 0, nullptr)
691 RegStorage r_base; local
769 RegStorage r_base; local
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  /art/compiler/dex/quick/x86/
int_x86.cc 1976 int r_base = rs_rX86_SP_32.GetReg(); local
2019 int r_base = rs_rX86_SP_32.GetReg(); local
2869 int r_base = rs_rX86_SP_32.GetReg(); local
2900 int r_base = rs_rX86_SP_32.GetReg(); local
    [all...]
target_x86.cc 905 int r_base = rs_rX86_SP_32.GetReg(); local
909 LIR * store = NewLIR3(kX86Mov32MI, r_base, displacement + LOWORD_OFFSET, val_lo);
912 store = NewLIR3(kX86Mov32MI, r_base, displacement + HIWORD_OFFSET, val_hi);
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  /external/valgrind/VEX/priv/
host_mips_isel.c 734 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1); local
736 return MIPSAMode_RR(r_idx, r_base);
753 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1); local
756 return MIPSAMode_RR(r_idx, r_base);
    [all...]
host_ppc_defs.c 4785 UInt opc2, v_reg, r_idx, r_base; local
5222 UInt r_idx, r_base; local
    [all...]
host_ppc_isel.c 2564 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess); local
2588 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1, IEndianess); local
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