/art/disassembler/ |
disassembler_arm.cc | 678 uint32_t shift_type = ((instr >> 4) & 0x3); local 768 bool noShift = (imm5 == 0 && shift_type != 0x3); 771 switch (shift_type) { 783 if (shift_type != 0x3 /* rrx */) { 784 args << StringPrintf(" #%d", (0 != imm5 || 0 == shift_type) ? imm5 : 32); [all...] |
/external/v8/src/arm64/ |
disasm-arm64.cc | 1540 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; local [all...] |
simulator-arm64.cc | 891 T Simulator::ShiftOperand(T value, Shift shift_type, unsigned amount) { 898 switch (shift_type) { 1394 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); local 1440 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); local [all...] |
/external/vixl/src/vixl/a64/ |
disasm-a64.cc | 3246 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; local [all...] |
simulator-a64.cc | 334 Shift shift_type, 340 switch (shift_type) { 983 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); local 985 int64_t op2 = ShiftOperand(reg_size, reg(reg_size, instr->Rm()), shift_type, [all...] |
/external/v8/src/arm/ |
simulator-arm.cc | 2607 int32_t shift_type = instr->Bit(6); local [all...] |
/external/valgrind/VEX/priv/ |
guest_arm_toIR.c | 9066 UInt regD = 99, regN = 99, regM = 99, imm5 = 99, shift_type = 99; local 9126 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local 9184 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local [all...] |