1 /************************************************************************** 2 * 3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * Copyright 2009-2010 VMware, Inc. All rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation the rights to use, copy, modify, merge, publish, 11 * distribute, sub license, and/or sell copies of the Software, and to 12 * permit persons to whom the Software is furnished to do so, subject to 13 * the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial portions 17 * of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 **************************************************************************/ 28 29 #ifndef TGSI_EXEC_H 30 #define TGSI_EXEC_H 31 32 #include "pipe/p_compiler.h" 33 #include "pipe/p_state.h" 34 #include "pipe/p_shader_tokens.h" 35 36 #if defined __cplusplus 37 extern "C" { 38 #endif 39 40 #define TGSI_CHAN_X 0 41 #define TGSI_CHAN_Y 1 42 #define TGSI_CHAN_Z 2 43 #define TGSI_CHAN_W 3 44 45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */ 46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */ 47 48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\ 49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++) 50 51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ 52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN))) 53 54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ 55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )) 56 57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\ 58 TGSI_FOR_EACH_CHANNEL( CHAN )\ 59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN ) 60 61 62 /** 63 * Registers may be treated as float, signed int or unsigned int. 64 */ 65 union tgsi_exec_channel 66 { 67 float f[TGSI_QUAD_SIZE]; 68 int i[TGSI_QUAD_SIZE]; 69 unsigned u[TGSI_QUAD_SIZE]; 70 }; 71 72 /** 73 * A vector[RGBA] of channels[4 pixels] 74 */ 75 struct tgsi_exec_vector 76 { 77 union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS]; 78 }; 79 80 /** 81 * For fragment programs, information for computing fragment input 82 * values from plane equation of the triangle/line. 83 */ 84 struct tgsi_interp_coef 85 { 86 float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */ 87 float dadx[TGSI_NUM_CHANNELS]; 88 float dady[TGSI_NUM_CHANNELS]; 89 }; 90 91 enum tgsi_sampler_control { 92 tgsi_sampler_lod_bias, 93 tgsi_sampler_lod_explicit 94 }; 95 96 /** 97 * Information for sampling textures, which must be implemented 98 * by code outside the TGSI executor. 99 */ 100 struct tgsi_sampler 101 { 102 /** Get samples for four fragments in a quad */ 103 void (*get_samples)(struct tgsi_sampler *sampler, 104 const float s[TGSI_QUAD_SIZE], 105 const float t[TGSI_QUAD_SIZE], 106 const float p[TGSI_QUAD_SIZE], 107 const float c0[TGSI_QUAD_SIZE], 108 enum tgsi_sampler_control control, 109 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 110 void (*get_dims)(struct tgsi_sampler *sampler, int level, 111 int dims[4]); 112 void (*get_texel)(struct tgsi_sampler *sampler, const int i[TGSI_QUAD_SIZE], 113 const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE], 114 const int lod[TGSI_QUAD_SIZE], const int8_t offset[3], 115 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 116 }; 117 118 #define TGSI_EXEC_NUM_TEMPS 128 119 #define TGSI_EXEC_NUM_IMMEDIATES 256 120 #define TGSI_EXEC_NUM_TEMP_ARRAYS 8 121 122 /* 123 * Locations of various utility registers (_I = Index, _C = Channel) 124 */ 125 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0) 126 #define TGSI_EXEC_TEMP_00000000_C 0 127 128 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) 129 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1 130 131 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0) 132 #define TGSI_EXEC_TEMP_80000000_C 2 133 134 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) 135 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3 136 137 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1) 138 #define TGSI_EXEC_TEMP_ONE_C 0 139 140 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1) 141 #define TGSI_EXEC_TEMP_TWO_C 1 142 143 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1) 144 #define TGSI_EXEC_TEMP_128_C 2 145 146 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1) 147 #define TGSI_EXEC_TEMP_MINUS_128_C 3 148 149 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2) 150 #define TGSI_EXEC_TEMP_KILMASK_C 0 151 152 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2) 153 #define TGSI_EXEC_TEMP_OUTPUT_C 1 154 155 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2) 156 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2 157 158 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2) 159 #define TGSI_EXEC_TEMP_THREE_C 3 160 161 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3) 162 #define TGSI_EXEC_TEMP_HALF_C 0 163 164 /* execution mask, each value is either 0 or ~0 */ 165 #define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3) 166 #define TGSI_EXEC_MASK_C 1 167 168 /* 4 register buffer for various purposes */ 169 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4) 170 #define TGSI_EXEC_NUM_TEMP_R 4 171 172 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8) 173 #define TGSI_EXEC_NUM_ADDRS 1 174 175 /* predicate register */ 176 #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9) 177 #define TGSI_EXEC_NUM_PREDS 1 178 179 #define TGSI_EXEC_NUM_TEMP_EXTRAS 10 180 181 182 183 #define TGSI_EXEC_MAX_NESTING 32 184 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING 185 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING 186 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING 187 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING 188 189 /* The maximum number of input attributes per vertex. For 2D 190 * input register files, this is the stride between two 1D 191 * arrays. 192 */ 193 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 17 194 195 /* The maximum number of constant vectors per constant buffer. 196 */ 197 #define TGSI_EXEC_MAX_CONST_BUFFER 4096 198 199 /* The maximum number of vertices per primitive */ 200 #define TGSI_MAX_PRIM_VERTICES 6 201 202 /* The maximum number of primitives to be generated */ 203 #define TGSI_MAX_PRIMITIVES 64 204 205 /* The maximum total number of vertices */ 206 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS) 207 208 #define TGSI_MAX_MISC_INPUTS 8 209 210 /** function call/activation record */ 211 struct tgsi_call_record 212 { 213 uint CondStackTop; 214 uint LoopStackTop; 215 uint ContStackTop; 216 int SwitchStackTop; 217 int BreakStackTop; 218 uint ReturnAddr; 219 }; 220 221 222 /* Switch-case block state. */ 223 struct tgsi_switch_record { 224 uint mask; /**< execution mask */ 225 union tgsi_exec_channel selector; /**< a value case statements are compared to */ 226 uint defaultMask; /**< non-execute mask for default case */ 227 }; 228 229 230 enum tgsi_break_type { 231 TGSI_EXEC_BREAK_INSIDE_LOOP, 232 TGSI_EXEC_BREAK_INSIDE_SWITCH 233 }; 234 235 236 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING) 237 238 239 /** 240 * Run-time virtual machine state for executing TGSI shader. 241 */ 242 struct tgsi_exec_machine 243 { 244 /* Total = program temporaries + internal temporaries 245 */ 246 struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS + 247 TGSI_EXEC_NUM_TEMP_EXTRAS]; 248 struct tgsi_exec_vector TempArray[TGSI_EXEC_NUM_TEMP_ARRAYS][TGSI_EXEC_NUM_TEMPS]; 249 250 float Imms[TGSI_EXEC_NUM_IMMEDIATES][4]; 251 252 float ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4]; 253 254 struct tgsi_exec_vector *Inputs; 255 struct tgsi_exec_vector *Outputs; 256 257 /* System values */ 258 unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT]; 259 union tgsi_exec_channel SystemValue[TGSI_MAX_MISC_INPUTS]; 260 261 struct tgsi_exec_vector *Addrs; 262 struct tgsi_exec_vector *Predicates; 263 264 struct tgsi_sampler **Samplers; 265 266 unsigned ImmLimit; 267 268 const void *Consts[PIPE_MAX_CONSTANT_BUFFERS]; 269 unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS]; 270 271 const struct tgsi_token *Tokens; /**< Declarations, instructions */ 272 unsigned Processor; /**< TGSI_PROCESSOR_x */ 273 274 /* GEOMETRY processor only. */ 275 unsigned *Primitives; 276 unsigned NumOutputs; 277 unsigned MaxGeometryShaderOutputs; 278 279 /* FRAGMENT processor only. */ 280 const struct tgsi_interp_coef *InterpCoefs; 281 struct tgsi_exec_vector QuadPos; 282 float Face; /**< +1 if front facing, -1 if back facing */ 283 bool flatshade_color; 284 /* Conditional execution masks */ 285 uint CondMask; /**< For IF/ELSE/ENDIF */ 286 uint LoopMask; /**< For BGNLOOP/ENDLOOP */ 287 uint ContMask; /**< For loop CONT statements */ 288 uint FuncMask; /**< For function calls */ 289 uint ExecMask; /**< = CondMask & LoopMask */ 290 291 /* Current switch-case state. */ 292 struct tgsi_switch_record Switch; 293 294 /* Current break type. */ 295 enum tgsi_break_type BreakType; 296 297 /** Condition mask stack (for nested conditionals) */ 298 uint CondStack[TGSI_EXEC_MAX_COND_NESTING]; 299 int CondStackTop; 300 301 /** Loop mask stack (for nested loops) */ 302 uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING]; 303 int LoopStackTop; 304 305 /** Loop label stack */ 306 uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING]; 307 int LoopLabelStackTop; 308 309 /** Loop continue mask stack (see comments in tgsi_exec.c) */ 310 uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING]; 311 int ContStackTop; 312 313 /** Switch case stack */ 314 struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING]; 315 int SwitchStackTop; 316 317 enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK]; 318 int BreakStackTop; 319 320 /** Function execution mask stack (for executing subroutine code) */ 321 uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING]; 322 int FuncStackTop; 323 324 /** Function call stack for saving/restoring the program counter */ 325 struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING]; 326 int CallStackTop; 327 328 struct tgsi_full_instruction *Instructions; 329 uint NumInstructions; 330 331 struct tgsi_full_declaration *Declarations; 332 uint NumDeclarations; 333 334 struct tgsi_declaration_sampler_view 335 SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS]; 336 337 boolean UsedGeometryShader; 338 }; 339 340 struct tgsi_exec_machine * 341 tgsi_exec_machine_create( void ); 342 343 void 344 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach); 345 346 347 void 348 tgsi_exec_machine_bind_shader( 349 struct tgsi_exec_machine *mach, 350 const struct tgsi_token *tokens, 351 uint numSamplers, 352 struct tgsi_sampler **samplers); 353 354 uint 355 tgsi_exec_machine_run( 356 struct tgsi_exec_machine *mach ); 357 358 359 void 360 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach); 361 362 363 boolean 364 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst); 365 366 367 static INLINE void 368 tgsi_set_kill_mask(struct tgsi_exec_machine *mach, unsigned mask) 369 { 370 mach->Temps[TGSI_EXEC_TEMP_KILMASK_I].xyzw[TGSI_EXEC_TEMP_KILMASK_C].u[0] = 371 mask; 372 } 373 374 375 /** Set execution mask values prior to executing the shader */ 376 static INLINE void 377 tgsi_set_exec_mask(struct tgsi_exec_machine *mach, 378 boolean ch0, boolean ch1, boolean ch2, boolean ch3) 379 { 380 int *mask = mach->Temps[TGSI_EXEC_MASK_I].xyzw[TGSI_EXEC_MASK_C].i; 381 mask[0] = ch0 ? ~0 : 0; 382 mask[1] = ch1 ? ~0 : 0; 383 mask[2] = ch2 ? ~0 : 0; 384 mask[3] = ch3 ? ~0 : 0; 385 } 386 387 388 extern void 389 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach, 390 unsigned num_bufs, 391 const void **bufs, 392 const unsigned *buf_sizes); 393 394 395 static INLINE int 396 tgsi_exec_get_shader_param(enum pipe_shader_cap param) 397 { 398 switch(param) { 399 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 400 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 401 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 402 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 403 return INT_MAX; 404 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 405 return TGSI_EXEC_MAX_NESTING; 406 case PIPE_SHADER_CAP_MAX_INPUTS: 407 return TGSI_EXEC_MAX_INPUT_ATTRIBS; 408 case PIPE_SHADER_CAP_MAX_CONSTS: 409 return TGSI_EXEC_MAX_CONST_BUFFER; 410 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 411 return PIPE_MAX_CONSTANT_BUFFERS; 412 case PIPE_SHADER_CAP_MAX_TEMPS: 413 return TGSI_EXEC_NUM_TEMPS; 414 case PIPE_SHADER_CAP_MAX_ADDRS: 415 return TGSI_EXEC_NUM_ADDRS; 416 case PIPE_SHADER_CAP_MAX_PREDS: 417 return TGSI_EXEC_NUM_PREDS; 418 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 419 return 1; 420 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 421 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 422 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 423 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 424 return 1; 425 case PIPE_SHADER_CAP_SUBROUTINES: 426 return 1; 427 case PIPE_SHADER_CAP_INTEGERS: 428 return 1; 429 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 430 return PIPE_MAX_SAMPLERS; 431 default: 432 return 0; 433 } 434 } 435 436 #if defined __cplusplus 437 } /* extern "C" */ 438 #endif 439 440 #endif /* TGSI_EXEC_H */ 441
