/art/compiler/dex/ |
ssa_transformation.cc | 513 int v_reg = SRegToVReg(ssa_reg); local 525 uses[idx] = pred_bb->data_flow_info->vreg_to_ssa_map_exit[v_reg];
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gvn_dead_code_elimination.cc | 36 inline uint16_t GvnDeadCodeElimination::MIRData::PrevChange(int v_reg) const { 38 DCHECK(v_reg == vreg_def || v_reg == vreg_def + 1); 39 return (v_reg == vreg_def) ? prev_value.change : prev_value_high.change; 42 inline void GvnDeadCodeElimination::MIRData::SetPrevChange(int v_reg, uint16_t change) { 44 DCHECK(v_reg == vreg_def || v_reg == vreg_def + 1); 45 if (v_reg == vreg_def) { 52 inline void GvnDeadCodeElimination::MIRData::RemovePrevChange(int v_reg, MIRData* prev_data) { 53 DCHECK_NE(PrevChange(v_reg), kNPos) 522 int v_reg = mir_graph_->SRegToVReg(s_reg); local 630 int v_reg = mir_graph_->SRegToVReg(data->mir->ssa_rep->uses[i]); local 1055 int v_reg = mir_graph_->SRegToVReg(s_reg); local 1444 int v_reg = mir_graph_->SRegToVReg(s_reg); local [all...] |
type_inference.cc | 213 int v_reg = mir_graph_->SRegToVReg(s_reg); local 219 if (IsSRegLiveAtStart(phi_bb, v_reg, s_reg)) { 238 if (IsSRegLiveAtStart(bb, v_reg, s_reg)) { 337 int v_reg = mir_graph_->SRegToVReg(s_reg); local 347 if (pred_bb->data_flow_info->vreg_to_ssa_map_exit[v_reg] != s_reg) { 373 bool TypeInference::CheckCastData::IsSRegLiveAtStart(BasicBlock* bb, int v_reg, int32_t s_reg) { 374 DCHECK_EQ(v_reg, mir_graph_->SRegToVReg(s_reg)); 378 if (!bb->data_flow_info->live_in_v->IsBitSet(v_reg)) { 386 if (pred_bb->data_flow_info->vreg_to_ssa_map_exit[v_reg] != s_reg) { [all...] |
gvn_dead_code_elimination_test.cc | 239 int v_reg = cu_.mir_graph->SRegToVReg(s_reg); local 240 CHECK_LT(static_cast<size_t>(v_reg), num_vregs_); 242 CHECK_LT(static_cast<size_t>(v_reg + 1), num_vregs_); 244 return v_reg; 248 int v_reg = SRegToVReg(uses[*use], wide); local 255 return v_reg; 401 for (size_t v_reg = 0; v_reg != num_vregs_; ++v_reg) { 402 if (bb->data_flow_info->vreg_to_ssa_map_exit[v_reg] == INVALID_SREG) [all...] |
mir_graph.h | 151 // Minimum field size to contain Dalvik v_reg number. 195 int32_t v_reg; // Virtual register number for temporary. member in struct:art::CompilerTemp [all...] |
/art/compiler/dex/quick/arm/ |
target_arm.cc | 655 void ArmMir2Lir::MarkPreservedSingle(int v_reg, RegStorage reg) { 664 fp_vmap_table_[adjusted_reg_num] = v_reg; 670 void ArmMir2Lir::MarkPreservedDouble(int v_reg, RegStorage reg) { 675 MarkPreservedSingle(v_reg, lo); 676 MarkPreservedSingle(v_reg + 1, hi); 841 int v_reg = mir_graph_->SRegToVReg(s_reg); local 860 MarkPreservedSingle(v_reg, p->GetReg()); 870 MarkPreservedDouble(v_reg, info->GetReg()); 894 int v_reg = mir_graph_->SRegToVReg(s_reg); local 896 MarkPreservedSingle(v_reg, res) [all...] |
/external/webp/src/dsp/ |
enc_mips32.c | 527 int v_reg; local 555 "lh %[v_reg], 0(%[res_coeffs]) \n\t" 559 "negu %[temp_2], %[v_reg] \n\t" 560 "slti %[temp_3], %[v_reg], 0 \n\t" 561 "movn %[v_reg], %[temp_2], %[temp_3] \n\t" 565 "sltiu %[temp_3], %[v_reg], 2 \n\t" 566 "move %[ctx_reg], %[v_reg] \n\t" 569 "slt %[temp_3], %[v_reg], %[const_max_level] \n\t" 570 "movn %[temp_1], %[v_reg], %[temp_3] \n\t" 571 "sll %[temp_2], %[v_reg], 1 \n\t [all...] |
/art/compiler/dex/quick/ |
ralloc_util.cc | 246 * v_reg numbers to distinguish them and can have an arbitrary 253 int v_reg = mir_graph_->SRegToVReg(s_reg); local 254 return v_reg; 260 int v_reg = mir_graph_->SRegToVReg(s_reg); local 265 core_vmap_table_.push_back(reg_num << VREG_NUM_WIDTH | (v_reg & ((1 << VREG_NUM_WIDTH) - 1))); 293 int v_reg = mir_graph_->SRegToVReg(s_reg); local 298 fp_vmap_table_.push_back(reg_num << VREG_NUM_WIDTH | (v_reg & ((1 << VREG_NUM_WIDTH) - 1))); 744 int v_reg = mir_graph_->SRegToVReg(info1->SReg()); local 746 StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile); 752 int v_reg = mir_graph_->SRegToVReg(info->SReg()) local 764 int v_reg = mir_graph_->SRegToVReg(info->SReg()); local [all...] |
/external/valgrind/VEX/priv/ |
host_ppc_defs.c | 4785 UInt opc2, v_reg, r_idx, r_base; local [all...] |