Home | History | Annotate | Download | only in include
      1 /*
      2 
      3   This file is provided under a dual BSD/GPLv2 license.  When using or
      4   redistributing this file, you may do so under either license.
      5 
      6   GPL LICENSE SUMMARY
      7 
      8   Copyright(c) 2005-2008 Intel Corporation. All rights reserved.
      9 
     10   This program is free software; you can redistribute it and/or modify
     11   it under the terms of version 2 of the GNU General Public License as
     12   published by the Free Software Foundation.
     13 
     14   This program is distributed in the hope that it will be useful, but
     15   WITHOUT ANY WARRANTY; without even the implied warranty of
     16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     17   General Public License for more details.
     18 
     19   You should have received a copy of the GNU General Public License
     20   along with this program; if not, write to the Free Software
     21   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
     22   The full GNU General Public License is included in this distribution
     23   in the file called LICENSE.GPL.
     24 
     25   Contact Information:
     26     Intel Corporation
     27     2200 Mission College Blvd.
     28     Santa Clara, CA  97052
     29 
     30   BSD LICENSE
     31 
     32   Copyright(c) 2005-2008 Intel Corporation. All rights reserved.
     33 
     34   Redistribution and use in source and binary forms, with or without
     35   modification, are permitted provided that the following conditions
     36   are met:
     37 
     38     * Redistributions of source code must retain the above copyright
     39       notice, this list of conditions and the following disclaimer.
     40     * Redistributions in binary form must reproduce the above copyright
     41       notice, this list of conditions and the following disclaimer in
     42       the documentation and/or other materials provided with the
     43       distribution.
     44     * Neither the name of Intel Corporation nor the names of its
     45       contributors may be used to endorse or promote products derived
     46       from this software without specific prior written permission.
     47 
     48   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     49   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     50   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     51   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     52   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     53   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     54   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     55   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     56   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     57   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     58   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     59 
     60 */
     61 #ifndef VIDDEC_FW_PARSER_FW_IPC_H
     62 #define VIDDEC_FW_PARSER_FW_IPC_H 1
     63 
     64 #include "viddec_fw_parser_ipclib.h"
     65 
     66 /** Generic Firmware-to-host Message Send Queue */
     67 typedef struct
     68 {
     69     struct IPC_MsgQueue         mq;     /* local MSGQueue handle */
     70 } FW_IPC_SendQue;
     71 
     72 /** Generic Host-to-Firmware Message Receive Queue */
     73 typedef struct
     74 {
     75     struct IPC_MsgQueue         mq;     /* local MSGQueue handle */
     76 } FW_IPC_ReceiveQue;
     77 
     78 typedef struct
     79 {
     80     unsigned int state;
     81     unsigned int priority;
     82 }FW_IPC_stream_info;
     83 
     84 /* ---------------------------------------------------------------------- */
     85 /* ---------------------------------------------------------------------- */
     86 
     87 typedef struct
     88 {
     89     /** Synchronous Message Buffer, shared between host and firmware */
     90     volatile char                  *sync_msg_buf;
     91 
     92     /** WARNING: EACH OF THESE STRUCTS MUST BE 8 BYTE ALIGNED */
     93     FW_IPC_SendQue         snd_q[CONFIG_IPC_HOST_MAX_RX_QUEUES];
     94 
     95     /** WARNING: EACH OF THESE STRUCTS MUST BE 8 BYTE ALIGNED */
     96     FW_IPC_ReceiveQue      rcv_q[CONFIG_IPC_FW_MAX_RX_QUEUES];
     97     /** WARNING: EACH OF THESE STRUCTS MUST BE 8 BYTE ALIGNED */
     98     FW_IPC_ReceiveQue      wkld_q[CONFIG_IPC_FW_MAX_RX_QUEUES];
     99 
    100     /** FIRMWARE_TO_HOST Message Queues (outbound) */
    101     struct _IPC_QueueHeader        *snd_q_shared[CONFIG_IPC_HOST_MAX_RX_QUEUES];
    102     /** HOST_TO_FIRMWARE Message Queues (inbbound) */
    103     struct _IPC_QueueHeader        *rcv_q_shared[CONFIG_IPC_FW_MAX_RX_QUEUES];
    104     /** HOST_TO_FIRMWARE Message Queues (inbbound) */
    105     struct _IPC_QueueHeader        *wkld_q_shared[CONFIG_IPC_FW_MAX_RX_QUEUES];
    106     /** Actual qheaders allocated in FW memory */
    107     struct _IPC_QueueHeader         snd_qh[CONFIG_IPC_HOST_MAX_RX_QUEUES];
    108     struct _IPC_QueueHeader         rcv_qh[CONFIG_IPC_FW_MAX_RX_QUEUES];
    109     struct _IPC_QueueHeader         wkld_qh[CONFIG_IPC_FW_MAX_RX_QUEUES];
    110 
    111     /** Stream releated info like priority */
    112     FW_IPC_stream_info              strm_info[CONFIG_IPC_FW_MAX_RX_QUEUES];
    113 
    114     unsigned int                    one_msg_size;
    115     unsigned char                   one_msg[CONFIG_IPC_MESSAGE_MAX_SIZE];
    116 } FW_IPC_Handle;
    117 
    118 /*@}*/
    119 
    120 /** @weakgroup Host IPC Functions */
    121 /** @ingroup fw_ipc */
    122 /*@{*/
    123 
    124 /**
    125 This function allows us to check and see if there's space available on the send queue(output) of fw
    126 for the message of size(message_size). It also provides us the amount of space available.
    127 @param[in] fwipc          : Ipc handle.
    128 @param[in] message_size  : size of message that we want to write.
    129 @param[out] bytes        : returns the amount of space available for writing.
    130 @retval 0                : if space is not available for current message.
    131 @retval 1                : if space is available for current message.
    132 */
    133 int FwIPC_SpaceAvailForMessage(FW_IPC_Handle *fwipc, FW_IPC_SendQue *snd_q, unsigned int message_size, unsigned int *bytes);
    134 
    135 /**
    136 This function writes the message of message_size into queue(host_rx_queue).
    137 @param[in] fwipc          : Ipc handle.
    138 @param[in] host_rx_queue : id of the queue that needs to be written.
    139 @param[in] message       : Message that we want to write.
    140 @param[in] message_size  : size of message that we want to write.
    141 @retval 0                : if write fails.
    142 @retval 1                : if write succeeds.
    143 */
    144 int FwIPC_SendMessage(FW_IPC_Handle *fwipc, unsigned int host_rx_queue, const char *message, unsigned int message_size );
    145 
    146 /**
    147 This function reads a message(which is <= max_message_size) from rcv_queue of firmware into input parameter message.
    148 @param[in] fwipc             : Ipc handle.
    149 @param[in] rcv_q            : Receive queue to read from.
    150 @param[out] message          : Message that we want to read.
    151 @param[in] max_message_size : max possible size of the message.
    152 @retval                     : The size of message that was read.
    153 */
    154 int FwIPC_ReadMessage(FW_IPC_Handle *fwipc, FW_IPC_ReceiveQue *rcv_q, char *message, unsigned int max_message_size );
    155 
    156 /**
    157 This function Initialises shared queue headers and sync command buffer for IPC.
    158 @param[in] fwipc                       : Ipc handle.
    159 @param[in] synchronous_command_buffer : update handle with pointer to shared memory
    160                                         between host and FW.
    161 @retval 0                             : if write succeeds.
    162 */
    163 int FwIPC_Initialize(FW_IPC_Handle *fwipc, volatile char *synchronous_command_buffer );
    164 
    165 /**
    166 This function Initialises Sendqueue with circular buffer which has actual data.
    167 @param[in] fwipc                       : Ipc handle.
    168 @param[in] snd_q                       : Send queue that needs to be initialized.
    169 @param[in] snd_circbuf                 : Address of circular buffer.
    170 */
    171 void FWIPC_SendQueue_Init(FW_IPC_Handle *fwipc, FW_IPC_SendQue *snd_q, void *snd_circbuf );
    172 
    173 /**
    174 This function Initialises Recvqueue with circular buffer which has actual data.
    175 @param[in] fwipc                       : Ipc handle.
    176 @param[in] rcv_q                       : Receive queue that needs to be initialized.
    177 @param[in] rcv_circbuf                 : Address of circular buffer.
    178 */
    179 void FwIPC_ReceiveQueue_Init(FW_IPC_Handle *fwipc, FW_IPC_ReceiveQue *rcv_q, void *rcv_circbuf );
    180 
    181 /**
    182 This function reads the nth(index) message(which is <= max_message_size ) from rcv_queue of firmware into input parameter message
    183 by peeking the queue.
    184 @param[in] fwipc             : Ipc handle.
    185 @param[in] rcv_q            : Send queue to read from.
    186 @param[out] message          : Message that we want to read.
    187 @param[in] max_message_size : max possible size of the message.
    188 @param[in] index            : nth message(index >=0).
    189 @retval                     : The size of message that was read.
    190 */
    191 int FwIPC_PeekReadMessage(FW_IPC_Handle *fwipc,  FW_IPC_ReceiveQue *rcv_q, char *message, unsigned int max_message_size, unsigned int index );
    192 
    193 /*@}*/
    194 #endif /* FW_IPC_H */
    195