1 tblgen - Target Description To C++ Code Generator 2 ================================================= 3 4 SYNOPSIS 5 -------- 6 7 :program:`tblgen` [*options*] [*filename*] 8 9 DESCRIPTION 10 ----------- 11 12 :program:`tblgen` translates from target description (``.td``) files into C++ 13 code that can be included in the definition of an LLVM target library. Most 14 users of LLVM will not need to use this program. It is only for assisting with 15 writing an LLVM target backend. 16 17 The input and output of :program:`tblgen` is beyond the scope of this short 18 introduction; please see the :doc:`introduction to TableGen 19 <../TableGen/index>`. 20 21 The *filename* argument specifies the name of a Target Description (``.td``) 22 file to read as input. 23 24 OPTIONS 25 ------- 26 27 .. program:: tblgen 28 29 .. option:: -help 30 31 Print a summary of command line options. 32 33 .. option:: -o filename 34 35 Specify the output file name. If ``filename`` is ``-``, then 36 :program:`tblgen` sends its output to standard output. 37 38 .. option:: -I directory 39 40 Specify where to find other target description files for inclusion. The 41 ``directory`` value should be a full or partial path to a directory that 42 contains target description files. 43 44 .. option:: -asmparsernum N 45 46 Make -gen-asm-parser emit assembly writer number ``N``. 47 48 .. option:: -asmwriternum N 49 50 Make -gen-asm-writer emit assembly writer number ``N``. 51 52 .. option:: -class className 53 54 Print the enumeration list for this class. 55 56 .. option:: -print-records 57 58 Print all records to standard output (default). 59 60 .. option:: -print-enums 61 62 Print enumeration values for a class. 63 64 .. option:: -print-sets 65 66 Print expanded sets for testing DAG exprs. 67 68 .. option:: -gen-emitter 69 70 Generate machine code emitter. 71 72 .. option:: -gen-register-info 73 74 Generate registers and register classes info. 75 76 .. option:: -gen-instr-info 77 78 Generate instruction descriptions. 79 80 .. option:: -gen-asm-writer 81 82 Generate the assembly writer. 83 84 .. option:: -gen-disassembler 85 86 Generate disassembler. 87 88 .. option:: -gen-pseudo-lowering 89 90 Generate pseudo instruction lowering. 91 92 .. option:: -gen-dag-isel 93 94 Generate a DAG (Directed Acycle Graph) instruction selector. 95 96 .. option:: -gen-asm-matcher 97 98 Generate assembly instruction matcher. 99 100 .. option:: -gen-dfa-packetizer 101 102 Generate DFA Packetizer for VLIW targets. 103 104 .. option:: -gen-fast-isel 105 106 Generate a "fast" instruction selector. 107 108 .. option:: -gen-subtarget 109 110 Generate subtarget enumerations. 111 112 .. option:: -gen-intrinsic 113 114 Generate intrinsic information. 115 116 .. option:: -gen-tgt-intrinsic 117 118 Generate target intrinsic information. 119 120 .. option:: -gen-enhanced-disassembly-info 121 122 Generate enhanced disassembly info. 123 124 .. option:: -version 125 126 Show the version number of this program. 127 128 EXIT STATUS 129 ----------- 130 131 If :program:`tblgen` succeeds, it will exit with 0. Otherwise, if an error 132 occurs, it will exit with a non-zero value. 133
