| /external/libedit/src/ |
| keymacro.c | 628 #define ADDC(c) \
644 ADDC(sep[0]);
647 ADDC('^');
648 ADDC('@');
665 ADDC(sep[1]);
667 ADDC('\0');
|
| /system/core/toolbox/upstream-netbsd/bin/dd/ |
| misc.c | 206 #define ADDC(c) do { if (enable != 0) buffer_write(&c, 1, 0); } \
213 ADDC(*ptr);
295 ADDC(*ptr);
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 198 /// like ADDC/SUBC, which indicate the carry result is always false.
205 ADDC, SUBC,
[all...] |
| SelectionDAG.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 262 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
|
| MipsSEISelDAGToDAG.cpp | 235 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
[all...] |
| MipsSEISelLowering.cpp | 386 // (addc multLo, Lo0), (adde multHi, Hi0),
393 // ADDENode's second operand must be a flag output of an ADDC node in order
397 if (ADDCNode->getOpcode() != ISD::ADDC)
443 // replace uses of adde and addc here
458 // (addc Lo0, multLo), (sube Hi0, multHi),
[all...] |
| /external/pcre/dist/sljit/ |
| sljitNativeSPARC_32.c | 100 return push_inst(compiler, ADDC | (flags & SET_FLAGS) | D(dst) | S1(src1) | ARG2(flags, src2), DR(dst) | (flags & SET_FLAGS));
|
| sljitNativePPC_32.c | 119 return push_inst(compiler, ADDC | OERC(ALT_SET_FLAGS) | D(dst) | A(src1) | B(src2));
|
| sljitNativePPC_64.c | 240 return push_inst(compiler, ADDC | OERC(ALT_SET_FLAGS) | D(dst) | A(src1) | B(src2));
|
| sljitNativeSPARC_common.c | 119 #define ADDC (OPC1(0x2) | OPC3(0x08))
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 114 setOperationAction(ISD::ADDC, VT, Expand);
214 setOperationAction(ISD::ADDC, MVT::Other, Expand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 210 case ISD::ADDC: return "addc";
|
| LegalizeIntegerTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 72 ADDC, // Add with carry
|
| ARMISelLowering.cpp | 586 setTargetDAGCombine(ISD::ADDC);
684 setOperationAction(ISD::ADDC, MVT::i32, Custom);
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 126 setOperationAction(ISD::ADDC, MVT::i64, Expand);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 71 setOperationAction(ISD::ADDC, MVT::i32, Legal);
833 SDValue Lo = DAG.getNode(ISD::ADDC, DL, DAG.getVTList(MVT::i32, MVT::Glue),
[all...] |
| AMDGPUISelLowering.cpp | 338 setOperationAction(ISD::ADDC, VT, Expand);
[all...] |
| R600ISelLowering.cpp | 185 setOperationAction(ISD::ADDC, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 95 setOperationAction(ISD::ADDC, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 224 setOperationAction(ISD::ADDC, MVT::i32, Custom);
228 setOperationAction(ISD::ADDC, MVT::i64, Custom);
[all...] |
