/external/v8/src/arm64/ |
assembler-arm64-inl.h | 913 DCHECK(AreSameSizeAndType(rt, rt2)); 937 DCHECK(AreSameSizeAndType(rt, rt2)); 950 DCHECK(AreSameSizeAndType(rt, rt2)); 963 DCHECK(AreSameSizeAndType(rt, rt2)); [all...] |
assembler-arm64.cc | 256 bool AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, [all...] |
macro-assembler-arm64.cc | 846 DCHECK(AreSameSizeAndType(rd, rm)); 870 DCHECK(AreSameSizeAndType(src0, src1, src2, src3)); 884 DCHECK(AreSameSizeAndType(src0, src1, src2, src3, src4, src5, src6, src7)); 900 DCHECK(AreSameSizeAndType(dst0, dst1, dst2, dst3)); [all...] |
assembler-arm64.h | 427 // AreSameSizeAndType returns true if all of the specified registers have the 431 bool AreSameSizeAndType(const CPURegister& reg1, 454 DCHECK(AreSameSizeAndType(reg1, reg2, reg3, reg4)); [all...] |
/external/vixl/src/vixl/a64/ |
macro-assembler-a64.cc | [all...] |
assembler-a64.cc | [all...] |
assembler-a64.h | 417 // AreSameSizeAndType returns true if all of the specified registers have the 421 bool AreSameSizeAndType(const CPURegister& reg1, 459 VIXL_ASSERT(AreSameSizeAndType(reg1, reg2, reg3, reg4)); [all...] |