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Searched
refs:AsRegister
(Results
1 - 13
of
13
) sorted by null
/art/compiler/optimizing/
code_generator_x86_64.cc
622
__ movq(destination.
AsRegister
<CpuRegister>(), source.
AsRegister
<CpuRegister>());
624
__ movd(destination.
AsRegister
<CpuRegister>(), source.AsFpuRegister<XmmRegister>());
626
__ movl(destination.
AsRegister
<CpuRegister>(),
630
__ movq(destination.
AsRegister
<CpuRegister>(),
635
__ movd(destination.AsFpuRegister<XmmRegister>(), source.
AsRegister
<CpuRegister>());
649
source.
AsRegister
<CpuRegister>());
666
source.
AsRegister
<CpuRegister>());
702
__ movl(location.
AsRegister
<CpuRegister>(), imm);
712
Load64BitValue(location.
AsRegister
<CpuRegister>(), value)
[
all
...]
intrinsics_x86_64.cc
73
CpuRegister trg_reg = trg.
AsRegister
<CpuRegister>();
74
if (trg_reg.
AsRegister
() != RAX) {
80
CpuRegister trg_reg = trg.
AsRegister
<CpuRegister>();
81
if (trg_reg.
AsRegister
() != RAX) {
180
__ movd(output.
AsRegister
<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit);
186
__ movd(output.AsFpuRegister<XmmRegister>(), input.
AsRegister
<CpuRegister>(), is64bit);
228
CpuRegister out = locations->Out().
AsRegister
<CpuRegister>();
352
CpuRegister out = output.
AsRegister
<CpuRegister>();
353
CpuRegister mask = locations->GetTemp(0).
AsRegister
<CpuRegister>();
529
CpuRegister out = locations->Out().
AsRegister
<CpuRegister>()
[
all
...]
intrinsics_arm.cc
69
Register trg_reg = trg.
AsRegister
<Register>();
164
__ vmovrs(output.
AsRegister
<Register>(), input.AsFpuRegister<SRegister>());
176
__ vmovsr(output.AsFpuRegister<SRegister>(), input.
AsRegister
<Register>());
268
Register mask = locations->GetTemp(0).
AsRegister
<Register>();
284
Register in_reg = in.
AsRegister
<Register>();
285
Register out_reg = output.
AsRegister
<Register>();
313
Register op1 = locations->InAt(0).
AsRegister
<Register>();
314
Register op2 = locations->InAt(1).
AsRegister
<Register>();
315
Register out = locations->Out().
AsRegister
<Register>();
367
__ ldrsb(invoke->GetLocations()->Out().
AsRegister
<Register>()
[
all
...]
code_generator_arm.cc
717
__ Mov(destination.
AsRegister
<Register>(), source.
AsRegister
<Register>());
719
__ vmovrs(destination.
AsRegister
<Register>(), source.AsFpuRegister<SRegister>());
721
__ LoadFromOffset(kLoadWord, destination.
AsRegister
<Register>(), SP, source.GetStackIndex());
725
__ vmovsr(destination.AsFpuRegister<SRegister>(), source.
AsRegister
<Register>());
734
__ StoreToOffset(kStoreWord, source.
AsRegister
<Register>(), SP, destination.GetStackIndex());
814
__ LoadImmediate(location.
AsRegister
<Register>(), value);
[
all
...]
code_generator_x86.cc
621
__ movl(destination.
AsRegister
<Register>(), source.
AsRegister
<Register>());
623
__ movd(destination.
AsRegister
<Register>(), source.AsFpuRegister<XmmRegister>());
626
__ movl(destination.
AsRegister
<Register>(), Address(ESP, source.GetStackIndex()));
630
__ movd(destination.AsFpuRegister<XmmRegister>(), source.
AsRegister
<Register>());
640
__ movl(Address(ESP, destination.GetStackIndex()), source.
AsRegister
<Register>());
729
__ movl(location.
AsRegister
<Register>(), imm);
865
__ testl(lhs.
AsRegister
<Register>(), lhs.
AsRegister
<Register>());
879
__ cmpl(lhs.
AsRegister
<Register>(), rhs.AsRegister<Register>())
[
all
...]
code_generator_mips64.cc
635
destination.
AsRegister
<GpuRegister>(),
643
gpr = destination.
AsRegister
<GpuRegister>();
658
__ Move(destination.
AsRegister
<GpuRegister>(), source.
AsRegister
<GpuRegister>());
685
source.
AsRegister
<GpuRegister>(),
736
GpuRegister r1 = loc1.
AsRegister
<GpuRegister>();
737
GpuRegister r2 = loc2.
AsRegister
<GpuRegister>();
772
__ StoreToOffset(store_type, reg_loc.
AsRegister
<GpuRegister>(), SP, mem_loc.GetStackIndex());
773
__ Move(reg_loc.
AsRegister
<GpuRegister>(), TMP);
800
GpuRegister dst = location.
AsRegister
<GpuRegister>()
[
all
...]
intrinsics_x86.cc
77
Register target_reg = target.
AsRegister
<Register>();
204
__ movd(output.
AsRegister
<Register>(), input.AsFpuRegister<XmmRegister>());
220
__ movd(output.AsFpuRegister<XmmRegister>(), input.
AsRegister
<Register>());
279
Register out = locations->Out().
AsRegister
<Register>();
407
Register out = output.
AsRegister
<Register>();
409
Register temp = locations->GetTemp(0).
AsRegister
<Register>();
440
Register temp = locations->GetTemp(0).
AsRegister
<Register>();
629
Register temp = locations->GetTemp(0).
AsRegister
<Register>();
644
Register out = locations->Out().
AsRegister
<Register>();
645
Register op2 = op2_loc.
AsRegister
<Register>()
[
all
...]
locations.h
174
T
AsRegister
() const {
/art/compiler/utils/x86_64/
managed_register_x86_64.cc
63
Register low = AsRegisterPairLow().
AsRegister
();
64
Register high = AsRegisterPairHigh().
AsRegister
();
101
os << "CPU: " << static_cast<int>(AsCpuRegister().
AsRegister
());
constants_x86_64.h
34
Register
AsRegister
() const {
assembler_x86_64.cc
28
return os << reg.
AsRegister
();
1151
const bool src_rax = src.
AsRegister
() == RAX;
1152
const bool dst_rax = dst.
AsRegister
() == RAX;
1171
const bool src_rax = src.
AsRegister
() == RAX;
1172
const bool dst_rax = dst.
AsRegister
() == RAX;
[
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...]
assembler_x86_64.h
178
CHECK_EQ(base_in.
AsRegister
(), RSP);
209
CHECK_NE(index_in.
AsRegister
(), RSP); // Illegal addressing mode.
216
CHECK_NE(index_in.
AsRegister
(), RSP); // Illegal addressing mode.
assembler_x86_64_test.cc
121
return a.
AsRegister
() < b.
AsRegister
();
[
all
...]
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