| /external/llvm/lib/Target/X86/ |
| X86MachineFunctionInfo.cpp | 23 for (const MCPhysReg *CSR =
25 unsigned Reg = *CSR;
26 ++CSR)
|
| /external/llvm/lib/CodeGen/ |
| RegisterClassInfo.cpp | 51 const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF);
52 if (Update || CSR != CalleeSaved) {
53 // Build a CSRNum map. Every CSR alias gets an entry pointing to the last
54 // overlapping CSR.
57 for (unsigned N = 0; unsigned Reg = CSR[N]; ++N)
59 CSRNum[*AI] = N + 1; // 0 means no CSR, 1 means CalleeSaved[0], ...
62 CalleeSaved = CSR;
77 /// registers filtered out. Volatile registers come first followed by CSR
78 /// aliases ordered according to the CSR order specified by the target.
107 // PhysReg aliases a CSR, save it for later
[all...] |
| MachineFunction.cpp | 600 for (const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF); CSR && *CSR; ++CSR)
601 BV.set(*CSR);
[all...] |
| RegAllocPBQP.cpp | 546 const MCPhysReg *CSR = TRI.getCalleeSavedRegs(&MF);
547 for (unsigned i = 0; CSR[i] != 0; ++i)
548 if (TRI.regsOverlap(reg, CSR[i]))
|
| RegAllocGreedy.cpp | 91 CSRFirstTimeCost("regalloc-csr-first-time-cost",
863 // Don't start using a CSR when the CostPerUseLimit is low.
865 if (unsigned CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg))
866 if (!MRI->isPhysRegUsed(CSR))
[all...] |
| /external/llvm/include/llvm/ADT/ |
| Triple.h | 120 CSR
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 392 for (const MCPhysReg *CSR =
394 *CSR; ++CSR) {
395 unsigned CalleeSavedReg = *CSR;
[all...] |
| /external/llvm/lib/Support/ |
| Triple.cpp | 134 case CSR: return "csr";
344 .Case("csr", Triple::CSR)
[all...] |
| /external/clang/lib/Sema/ |
| SemaChecking.cpp | [all...] |
| /external/harfbuzz_ng/src/ |
| hb-ot-shape-complex-indic-table.cc | 349 /* 17C8 */ _(M,R), _(RS,T), _(RS,T), _(RS,T),_(CSR,T), _(M,T), _(M,T), _(M,T),
430 /* 1B00 */ _(Bi,x), _(Bi,x), _(Bi,x),_(CSR,x), _(Vs,x), _(VI,x), _(VI,x), _(VI,x),
449 /* 1B80 */ _(Bi,x),_(CSR,x), _(Vs,x), _(VI,x), _(VI,x), _(VI,x), _(VI,x), _(VI,x),
[all...] |
