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  /external/clang/test/CXX/special/class.copy/
p23-cxx11.cpp 122 struct D7 {
137 template struct CopyAssign<D7>; // expected-note {{here}}
138 template struct MoveAssign<D7>; // expected-note {{here}}
139 template struct MoveOrCopyAssign<D7>; // expected-note {{here}}
  /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/
Filt_6k_7k_neon.s 44 VLD1.S16 {D4, D5, D6, D7}, [r0]!
48 VST1.S16 D7[0], [r1]!
49 VST1.S16 D7[1], [r1]!
93 VMOV.S16 D7[3], r5 @set fir_6k_7K = 0
118 VMLAL.S16 Q10,D15,D7[0]
120 VMLAL.S16 Q12,D16,D7[0]
140 VMLAL.S16 Q10,D15,D7[1]
142 VMLAL.S16 Q12,D16,D7[1]
162 VMLAL.S16 Q10,D15,D7[2]
164 VMLAL.S16 Q12,D16,D7[2
    [all...]
syn_filt_neon.s 62 VLD1.S16 {D4, D5, D6, D7}, [r10]! @ first 16 temp_p
74 VMLAL.S16 Q5, D0, D7
77 VEXT.8 D6, D6, D7, #2
87 VEXT.8 D7, D7, D20, #2
Syn_filt_32_neon.s 56 VLD1.S16 {D4, D5, D6, D7}, [r10]! @ sig_hi[-16] ~ sig_hi[-1]
89 VMLAL.S16 Q11, D7, D0
93 VEXT.8 D6, D6, D7, #2
114 VEXT.8 D7, D7, D20, #2
Norm_Corr_neon.s 85 VMLAL.S16 Q10, D7, D7
134 VMLAL.S16 Q10, D7, D7
135 VMLAL.S16 Q11, D7, D15
155 VMLAL.S16 Q10, D7, D7
156 VMLAL.S16 Q11, D7, D15
Dot_p_neon.s 55 VMLAL.S16 Q15, D23, D7
72 VMLAL.S16 Q15, D7, D3
87 VMLAL.S16 Q15, D7, D7
  /device/htc/flounder/nfc/
libnfc-brcm-20795a10.conf 34 NFA_DM_START_UP_CFG={AA:80:01:01:B0:05:01:03:03:03:08:B5:03:01:03:FF:C9:0D:24:00:00:00:01:00:BB:00:E4:00:0A:01:02:D6:0D:00:02:02:00:00:00:00:01:00:01:59:00:85:B2:02:A1:05:C8:1E:06:1F:00:0A:09:30:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:59:01:00:00:40:04:D7:01:07:DD:32:06:00:00:10:22:08:08:06:04:03:02:00:09:27:0A:6D:20:00:74:20:00:00:00:01:85:00:00:32:1F:1D:1D:14:14:12:00:02:55:55:55:55:55:55:55:55:55:55:55:55:55:1E:CA:20:00:00:00:00:08:E8:03:00:00:90:01:00:00:FF:FF:00:00:00:00:00:00:00:00:00:00:00:20:14:01:00:00:00}
  /device/moto/shamu/nfc/
libnfc-brcm-20795a10.conf 35 NFA_DM_START_UP_CFG={71:80:01:01:B0:05:01:03:03:03:08:B5:03:01:03:FF:C9:0D:24:00:00:00:01:00:BB:00:E4:00:0A:01:02:D6:0D:00:02:00:00:00:00:00:01:00:01:5A:00:8A:B2:02:B8:0B:C8:1E:06:1F:00:0A:02:30:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:56:01:00:00:40:04:D7:01:07:DD:14:00:00:00:38:16:40:40:00:00:80:00:40:24:27:0A:67:20:00:52:20:CA:05:00:00:00:00:18}
  /system/bt/conf/
auto_pair_devlist.conf 13 AddressBlacklist=00:02:C7,00:16:FE,00:19:C1,00:1B:FB,00:1E:3D,00:21:4F,00:23:06,00:24:33,00:A0:79,00:0E:6D,00:13:E0,00:21:E8,00:60:57,00:0E:9F,00:12:1C,00:18:91,00:18:96,00:13:04,00:16:FD,00:22:A0,00:0B:4C,00:60:6F,00:23:3D,00:C0:59,00:0A:30,00:1E:AE,00:1C:D7,00:80:F0,00:12:8A,00:09:93,00:80:37,00:26:7E,00:26:e8
  /art/compiler/utils/mips/
constants_mips.h 39 D7 = 7,
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/
armVCM4P10_TransformResidual4x4_s.s 82 de2 DN D7.S16
84 dIn1RS DN D7.S16
94 dg2 DN D7.S16
96 df1RS DN D7.S16
omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s 126 dindexRow0 DN D7.32
128 dByteIndexRow0 DN D7.8
161 de2 DN D7.S16
163 dIn1RS DN D7.S16
173 dg2 DN D7.S16
175 df1RS DN D7.S16
omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s 65 dRow0 DN D7.U8
78 dRown0 DN D7.U8
100 dRow0n DN D7.U8
116 dP_3 DN D7.U8
240 ;// p0-p3 - d4-d7
omxVCM4P10_TransformDequantLumaDCFromPair_s.s 88 dRowDiff2 DN D7.S16
102 dColDiff2 DN D7.S16
  /external/llvm/test/MC/MachO/
x86_32-symbols.s 26 D7:
757 // CHECK: ('_string', 'D7')
x86_64-symbols.s 26 D7:
205 // CHECK-NEXT: Name: D7 (31)
  /external/libhevc/common/arm/
ihevc_sao_edge_offset_class1_chroma.s 116 VLD1.8 D7,[r6] @offset_tbl_u = vld1_s8(pi1_sao_offset_u)
180 VTBL.8 D12,{D7},D12 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
196 @VTBL.8 D13,D7,D13 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
200 VTBL.8 D24,{D7},D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
205 @VTBL.8 D24,D7,D22 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
207 @VTBL.8 D25,D7,D23 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
250 VTBL.8 D24,{D7},D22
254 @VTBL.8 D24,D7,D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
260 @VTBL.8 D25,D7,D23 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
331 VTBL.8 D12,{D7},D1
    [all...]
ihevc_sao_edge_offset_class1.s 112 VLD1.8 D7,[r6] @offset_tbl = vld1_s8(pi1_sao_offset)
174 VTBL.8 D12,{D7},D12 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
188 VTBL.8 D13,{D7},D13 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
192 VTBL.8 D24,{D7},D22 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
196 VTBL.8 D25,{D7},D23 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
236 VTBL.8 D24,{D7},D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
242 VTBL.8 D25,{D7},D23 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
311 VTBL.8 D12,{D7},D12 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
322 VTBL.8 D24,{D7},D22 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
354 VTBL.8 D24,{D7},D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)
    [all...]
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/
armVCM4P2_Clip8_s.s 57 dx31 DN D7.S16
omxVCM4P2_QuantInvInter_I_s.s 97 dResult0 DN D7.S16
  /external/llvm/unittests/Support/
AlignOfTest.cpp 59 struct D7 : S1, S3 {};
125 [AlignOf<D7>::Alignment > 0]
166 EXPECT_LE(alignOf<S1>(), alignOf<D7>());
244 EXPECT_EQ(alignOf<D7>(), alignOf<AlignedCharArrayUnion<D7> >());
299 EXPECT_EQ(sizeof(D7), sizeof(AlignedCharArrayUnion<D7>));
  /art/runtime/arch/arm64/
registers_arm64.h 122 D7 = 7,
  /external/libhevc/decoder/arm/
ihevcd_fmt_conv_420sp_to_rgba8888.s 196 VMULL.S16 Q11,D7,D0[0] @//(V-128)*C1 FOR R
201 VMLAL.S16 Q7,D7,D0[2] @//Q7 = (U-128)*C2 + (V-128)*C3
327 VMULL.S16 Q11,D7,D0[0] @//(V-128)*C1 FOR R
332 VMLAL.S16 Q7,D7,D0[2] @//Q7 = (U-128)*C2 + (V-128)*C3
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/comm/src/
omxVCCOMM_Copy16x16_s.s 43 X7 DN D7.S8
  /art/compiler/utils/arm/
managed_register_arm_test.cc 472 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
494 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
516 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
538 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
560 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
582 EXPECT_TRUE(reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
604 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
626 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromDRegister(D7)));
635 reg = ArmManagedRegister::FromDRegister(D7);
    [all...]

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