/external/v8/src/ic/arm64/ |
stub-cache-arm64.cc | 122 __ Eor(scratch, scratch, flags);
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ic-arm64.cc | 509 __ Eor(scratch2, scratch2, Operand(scratch3, ASR, Name::kHashShift)); [all...] |
/external/v8/src/compiler/arm64/ |
code-generator-arm64.cc | 260 __ Eor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 263 __ Eor(i.OutputRegister32(), i.InputRegister32(0), i.InputOperand32(1));
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/external/v8/test/cctest/ |
test-assembler-arm64.cc | 599 __ Eor(w13, w0, kWMinInt); 953 TEST(eor) { 961 __ Eor(x2, x0, Operand(x1)); 962 __ Eor(w3, w0, Operand(w1, LSL, 4)); 963 __ Eor(x4, x0, Operand(x1, LSL, 4)); 964 __ Eor(x5, x0, Operand(x1, LSR, 1)); 965 __ Eor(w6, w0, Operand(w1, ASR, 20)); 966 __ Eor(x7, x0, Operand(x1, ASR, 20)); 967 __ Eor(w8, w0, Operand(w1, ROR, 28)); 968 __ Eor(x9, x0, Operand(x1, ROR, 28)) [all...] |
test-disasm-arm64.cc | 119 COMPARE(dci(0x521e0400), "eor w0, w0, #0xc"); 645 COMPARE(eor(w15, w16, Operand(0x00000001)), 646 "eor w15, w16, #0x1"); 647 COMPARE(eor(x17, x18, Operand(0x0000000000000003L)), 648 "eor x17, x18, #0x3"); 663 "eor w19, w20, #0x7ffffffe"); 665 "eor x21, x22, #0x3ffffffffffffffc"); 674 COMPARE(eor(wcsp, w0, Operand(31)), "eor wcsp, w0, #0x1f"); 724 COMPARE(eor(w0, w1, Operand(w2)), "eor w0, w1, w2") [all...] |
/art/compiler/utils/arm/ |
assembler_arm32_test.cc | 590 TEST_F(AssemblerArm32Test, Eor) { 591 T4Helper(&arm::Arm32Assembler::eor, true, "eor{cond} {reg1}, {reg2}, {shift}", "eor");
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/external/v8/src/arm64/ |
macro-assembler-arm64.cc | 93 case EOR: 111 case EOR: [all...] |
code-stubs-arm64.cc | 465 __ Eor(result, result, 1 << Map::kIsUndetectable); 833 __ Eor(temp, temp, kDSignMask); [all...] |
macro-assembler-arm64-inl.h | 107 void MacroAssembler::Eor(const Register& rd, 112 LogicalMacro(rd, rn, operand, EOR); [all...] |
macro-assembler-arm64.h | 158 inline void Eor(const Register& rd, [all...] |
lithium-codegen-arm64.cc | [all...] |
full-codegen-arm64.cc | [all...] |
/external/vixl/test/ |
test-assembler-a64.cc | 592 __ Eor(w13, w0, kWMinInt); 938 TEST(eor) { 945 __ Eor(x2, x0, Operand(x1)); 946 __ Eor(w3, w0, Operand(w1, LSL, 4)); 947 __ Eor(x4, x0, Operand(x1, LSL, 4)); 948 __ Eor(x5, x0, Operand(x1, LSR, 1)); 949 __ Eor(w6, w0, Operand(w1, ASR, 20)); 950 __ Eor(x7, x0, Operand(x1, ASR, 20)); 951 __ Eor(w8, w0, Operand(w1, ROR, 28)); 952 __ Eor(x9, x0, Operand(x1, ROR, 28)) [all...] |
test-disasm-a64.cc | 125 COMPARE(dci(0x521e0400), "eor w0, w0, #0xc"); 744 COMPARE(eor(w15, w16, Operand(0x00000001)), 745 "eor w15, w16, #0x1"); 746 COMPARE(eor(x17, x18, Operand(0x0000000000000003)), 747 "eor x17, x18, #0x3"); 762 "eor w19, w20, #0x7ffffffe"); 764 "eor x21, x22, #0x3ffffffffffffffc"); 773 COMPARE(eor(wsp, w0, Operand(31)), "eor wsp, w0, #0x1f"); [all...] |
/art/compiler/optimizing/ |
code_generator_arm64.cc | [all...] |
/external/vixl/src/vixl/a64/ |
macro-assembler-a64.h | 621 void Eor(const Register& rd, [all...] |
macro-assembler-a64.cc | 671 void MacroAssembler::Eor(const Register& rd, 675 LogicalMacro(rd, rn, operand, EOR); 726 case EOR: 745 case EOR: [all...] |