| /external/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.cpp | 485 unsigned FirstReg = 0;
492 if (FirstReg != 0) {
494 State->UnionGroups(FirstReg, Reg);
497 FirstReg = Reg;
501 DEBUG(dbgs() << "->g" << State->GetGroup(FirstReg) << '\n');
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FunctionLoweringInfo.cpp | 491 unsigned FirstReg = 0;
499 if (!FirstReg) FirstReg = R;
502 return FirstReg;
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| MipsISelLowering.h | 434 const Argument *FuncArg, unsigned FirstReg,
443 unsigned FirstReg, unsigned LastReg,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 677 unsigned FirstReg = SwapOps ? FalseReg : TrueReg,
683 if (MRI.getRegClass(FirstReg)->contains(PPC::R0) ||
684 MRI.getRegClass(FirstReg)->contains(PPC::X0)) {
686 MRI.getRegClass(FirstReg)->contains(PPC::X0) ?
688 unsigned OldFirstReg = FirstReg;
689 FirstReg = MRI.createVirtualRegister(FirstRC);
690 BuildMI(MBB, MI, dl, get(TargetOpcode::COPY), FirstReg)
695 .addReg(FirstReg).addReg(SecondReg)
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
