| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.cpp | 103 unsigned FrameReg;
106 FrameReg = Mips::SP;
110 FrameReg = Mips::S0;
114 FrameReg = MI.getOperand(OpNo+2).getReg();
116 FrameReg = Mips::SP;
137 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
143 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
147 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
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| MipsSERegisterInfo.cpp | 134 unsigned FrameReg;
137 FrameReg = isN64 ? Mips::SP_64 : Mips::SP;
139 FrameReg = getFrameRegister(MF);
178 BuildMI(MBB, II, DL, TII.get(ADDiu), Reg).addReg(FrameReg).addImm(Offset);
180 FrameReg = Reg;
195 BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg)
198 FrameReg = Reg;
204 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
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| Mips16InstrInfo.h | 83 // This is to adjust some FrameReg. We return the new register to be used
84 // in place of FrameReg and the adjusted immediate field (&NewImm)
86 unsigned loadImmediate(unsigned FrameReg,
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| Mips16InstrInfo.cpp | 307 unsigned Mips16InstrInfo::loadImmediate(unsigned FrameReg, int64_t Imm,
388 if (FrameReg == Mips::SP) {
407 BuildMI(MBB, II, DL, get(Mips:: AdduRxRyRz16), Reg).addReg(FrameReg)
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| MipsTargetStreamer.h | 129 unsigned FrameReg;
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| /external/llvm/lib/CodeGen/ |
| TargetFrameLoweringImpl.cpp | 36 int FI, unsigned &FrameReg) const {
42 FrameReg = RI->getFrameRegister(MF);
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| /external/llvm/lib/Target/BPF/ |
| BPFRegisterInfo.cpp | 59 unsigned FrameReg = getFrameRegister(MF);
66 MI.getOperand(i).ChangeToRegister(FrameReg, false);
82 MI.getOperand(i).ChangeToRegister(FrameReg, false);
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| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.h | 42 unsigned &FrameReg) const override;
44 unsigned &FrameReg,
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| AArch64RegisterInfo.cpp | 383 unsigned FrameReg;
389 Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg,
392 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
398 Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg);
399 if (rewriteAArch64FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
410 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII);
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| AArch64FrameLowering.cpp | 635 unsigned FrameReg;
636 return getFrameIndexReference(MF, FI, FrameReg);
645 unsigned &FrameReg) const {
646 return resolveFrameIndexReference(MF, FI, FrameReg);
650 int FI, unsigned &FrameReg,
694 FrameReg = RegInfo->getFrameRegister(MF);
700 FrameReg = RegInfo->getBaseRegister();
702 FrameReg = AArch64::SP;
[all...] |
| AArch64InstrInfo.h | 208 unsigned FrameReg, int &Offset,
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 115 unsigned FrameReg = getFrameRegister(MF);
160 dstReg).addReg(FrameReg).addReg(dstReg);
164 dstReg).addReg(FrameReg).addImm(Offset);
186 resReg).addReg(FrameReg).addReg(resReg);
190 resReg).addReg(FrameReg).addImm(Offset);
197 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false);
209 dstReg).addReg(FrameReg).addReg(dstReg);
217 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false);
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| /external/llvm/lib/Target/ARM/ |
| ThumbRegisterInfo.cpp | 354 unsigned FrameReg, int &Offset,
370 emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,
380 unsigned NumBits = (FrameReg == ARM::SP) ? 8 : 5;
393 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
399 if (NewOpc != Opcode && FrameReg != ARM::SP)
514 unsigned FrameReg = ARM::SP;
524 FrameReg = getFrameRegister(MF);
527 FrameReg = BasePtr;
535 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
547 MI.getOperand(FIOperandNum). ChangeToRegister(FrameReg, false /*isDef*/)
[all...] |
| ThumbRegisterInfo.h | 50 unsigned FrameReg, int &Offset,
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| ARMFrameLowering.h | 50 unsigned &FrameReg) const override;
52 unsigned &FrameReg, int SPAdj) const;
|
| ARMBaseRegisterInfo.cpp | 703 unsigned FrameReg;
705 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);
712 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
727 Done = rewriteARMFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
730 Done = rewriteT2FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
750 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false);
754 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
758 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
|
| Thumb2InstrInfo.cpp | 446 unsigned FrameReg, int &Offset,
464 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
485 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
498 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
534 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
595 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
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| ARMFrameLowering.cpp | [all...] |
| ARMBaseInstrInfo.h | 490 unsigned FrameReg, int &Offset,
494 unsigned FrameReg, int &Offset,
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 64 unsigned Reg, unsigned FrameReg, int Offset ) {
72 .addReg(FrameReg)
79 .addReg(FrameReg)
85 .addReg(FrameReg)
95 unsigned Reg, unsigned FrameReg,
108 .addReg(FrameReg)
115 .addReg(FrameReg)
121 .addReg(FrameReg)
289 unsigned FrameReg = getFrameRegister(MF);
293 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/)
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 207 /// returned directly, and the base register is returned via FrameReg.
209 unsigned &FrameReg) const;
215 unsigned &FrameReg) const {
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.h | 70 unsigned &FrameReg) const override;
74 unsigned &FrameReg) const override;
|
| X86RegisterInfo.cpp | 577 unsigned FrameReg = getFrameRegister(MF);
579 FrameReg = getX86SubSuperRegister(FrameReg, MVT::i32, false);
580 return FrameReg;
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| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 513 unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
514 if (FrameReg == X86::NoRegister)
515 return FrameReg;
516 return getX86SubSuperRegister(FrameReg, MVT::i32);
546 unsigned FrameReg = GetFrameReg(Ctx, Out);
547 if (MRI && FrameReg != X86::NoRegister) {
549 if (FrameReg == X86::ESP) {
556 MCInstBuilder(X86::MOV32rr).addReg(LocalFrameReg).addReg(FrameReg));
581 unsigned FrameReg = GetFrameReg(Ctx, Out);
582 if (Ctx.getRegisterInfo() && FrameReg != X86::NoRegister)
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | 520 unsigned FrameReg = 0;
522 int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
525 DwarfExpr.AddMachineRegIndirect(FrameReg, Offset);
|
