/art/compiler/dex/quick/mips/ |
utility_mips.cc | 91 res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg()); 93 res = RawLIR(current_dalvik_offset_, opcode, r_src.GetReg(), r_dest.GetReg()); 142 res = NewLIR2(kMipsMove, r_dest.GetReg(), rZERO); 145 res = NewLIR3(kMipsOri, r_dest.GetReg(), rZERO, value); 148 res = NewLIR3(kMipsAddiu, r_dest.GetReg(), rZERO, value); 150 res = NewLIR2(kMipsLui, r_dest.GetReg(), value >> 16); 152 NewLIR3(kMipsOri, r_dest.GetReg(), r_dest.GetReg(), value) [all...] |
int_mips.cc | 59 NewLIR3(kMipsSlt, temp.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); 60 NewLIR3(kMipsSlt, rl_result.reg.GetReg(), rl_src2.reg.GetReg(), rl_src1.reg.GetReg()); 61 NewLIR3(kMipsSubu, rl_result.reg.GetReg(), rl_result.reg.GetReg(), temp.GetReg()); 68 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()) [all...] |
fp_mips.cc | 68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); 114 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); 176 NewLIR2(op, rl_result.reg.GetReg(), rl_src.reg.GetReg()); 267 NewLIR2(kMipsFnegs, rl_result.reg.GetReg(), rl_src.reg.GetReg()); [all...] |
call_mips.cc | 91 NewLIR2(kMipsLui, r_end.GetReg(), size_hi); 98 NewLIR3(kMipsOri, r_end.GetReg(), r_end.GetReg(), size_lo); 100 NewLIR3(kMipsOri, r_end.GetReg(), rZERO, size_lo); 109 NewLIR4(kMipsDelta, r_base.GetReg(), 0, WrapPointer(base_label), WrapPointer(tab_rec)); 198 NewLIR4(kMipsDelta, r_base.GetReg(), 0, WrapPointer(base_label), WrapPointer(tab_rec));
|
codegen_mips.h | 303 ->GetReg().GetReg(), 304 ret_val.GetReg()); 325 ->GetReg().GetReg(), 326 ret_val.GetReg());
|
/art/compiler/dex/quick/arm/ |
utility_arm.cc | 98 r_dest, rs_r15pc.GetReg(), 0, 0, 0, data_target); 228 return LoadFPConstantValue(r_dest.GetReg(), value); 233 return NewLIR2(kThumbMovImm, r_dest.GetReg(), value); 238 res = NewLIR2(kThumb2MovI8M, r_dest.GetReg(), mod_imm); 243 res = NewLIR2(kThumb2MvnI8M, r_dest.GetReg(), mod_imm); 248 res = NewLIR2(kThumb2MovImm16, r_dest.GetReg(), value); 252 res = NewLIR2(kThumb2MovImm16, r_dest.GetReg(), Low16Bits(value)); 253 NewLIR2(kThumb2MovImm16H, r_dest.GetReg(), High16Bits(value)); 282 return NewLIR1(opcode, r_dest_src.GetReg()); 376 return NewLIR3(kThumb2RevRR, r_dest_src1.GetReg(), r_src2.GetReg(), r_src2.GetReg()) [all...] |
fp_arm.cc | 68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); 115 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); 126 NewLIR3(kThumb2Vmuls, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()); 141 NewLIR3(kThumb2Vmuld, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()) [all...] |
call_arm.cc | 74 if (r_key.GetReg() > r_disp.GetReg()) { 80 NewLIR3(kThumb2Adr, r_base.GetReg(), 0, WrapPointer(tab_rec)); 87 NewLIR2(kThumb2LdmiaWB, r_base.GetReg(), (1 << r_key.GetRegNum()) | (1 << r_disp.GetRegNum())); 91 LIR* switch_branch = NewLIR1(kThumb2AddPCR, r_disp.GetReg()); 116 NewLIR3(kThumb2Adr, table_base.GetReg(), 0, WrapPointer(tab_rec)); 135 LIR* switch_branch = NewLIR1(kThumb2AddPCR, disp_reg.GetReg()); 164 NewLIR3(kThumb2Ldrex, rs_r1.GetReg(), rs_r0.GetReg(), 172 NewLIR4(kThumb2Strex, rs_r1.GetReg(), rs_r2.GetReg(), rs_r0.GetReg() [all...] |
int_arm.cc | 147 NewLIR2(kThumb2MovI8M, t_reg.GetReg(), ModifiedImmediate(-1)); 157 rl_temp.reg.SetReg(t_reg.GetReg()); 180 NewLIR4(kThumb2OrrRRRs, t_reg.GetReg(), low_reg.GetReg(), high_reg.GetReg(), 0); 302 if (rl_result.reg.GetReg() == rl_true.reg.GetReg()) { // Is the "true" case already in place? 305 } else if (rl_result.reg.GetReg() == rl_false.reg.GetReg()) { // False case in place? 397 reg.GetReg(), 0) [all...] |
target_arm.cc | 607 int sp_reg_num = info->GetReg().GetRegNum(); 716 res.reg.SetLowReg(rs_r2.GetReg()); 717 res.reg.SetHighReg(rs_r3.GetReg()); 728 res.reg.SetReg(rs_r1.GetReg()); 858 res = RegStorage::FloatSolo64(p->GetReg().GetRegNum() >> 1); 860 MarkPreservedSingle(v_reg, p->GetReg()); 868 res = info->GetReg(); 870 MarkPreservedDouble(v_reg, info->GetReg()); 879 info->FindMatchingView(RegisterInfo::kLowSingleStorageMask)->GetReg().GetReg(); [all...] |
/art/compiler/dex/quick/arm64/ |
utility_arm64.cc | 115 return NewLIR2(kA64Fmov2sw, r_dest.GetReg(), rwzr); 119 return NewLIR2(kA64Fmov2fI, r_dest.GetReg(), encoded_imm); 131 r_dest.GetReg(), 0, 0, 0, 0, data_target); 139 return NewLIR2(kA64Fmov2Sx, r_dest.GetReg(), rxzr); 143 return NewLIR2(WIDE(kA64Fmov2fI), r_dest.GetReg(), encoded_imm); 157 r_dest.GetReg(), 0, 0, 0, 0, data_target); 406 DCHECK(!A64_REG_IS_SP(r_dest.GetReg())); 407 DCHECK(!A64_REG_IS_ZR(r_dest.GetReg())); 421 res = NewLIR2(opcode, r_dest.GetReg(), rwzr); 437 res = NewLIR3(kA64Movn3rdM, r_dest.GetReg(), ~useful_bits, shift) [all...] |
fp_arm64.cc | 64 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); 117 NewLIR3(WIDE(op), rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); 128 NewLIR3(kA64Fmul3fff, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()); 143 NewLIR3(WIDE(kA64Fmul3fff), rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()) [all...] |
int_arm64.cc | 65 NewLIR4(kA64Csinc4rrrc, rl_result.reg.GetReg(), rwzr, rwzr, kArmCondEq); 66 NewLIR4(kA64Csneg4rrrc, rl_result.reg.GetReg(), rl_result.reg.GetReg(), 67 rl_result.reg.GetReg(), kArmCondGe); 179 NewLIR4(is_wide ? WIDE(opcode) : opcode, rs_dest.GetReg(), left_op.GetReg(), right_op.GetReg(), 217 NewLIR4(opcode, rl_result.reg.GetReg(), 218 rl_true.reg.GetReg(), rl_false.reg.GetReg(), ArmConditionEncoding(mir->meta.ccode)) [all...] |
call_arm64.cc | 73 NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, WrapPointer(tab_rec)); 80 LIR* branch_out = NewLIR2(kA64Cbz2rt, r_idx.GetReg(), 0); 83 NewLIR4(kA64LdpPost4rrXD, r_key.GetReg(), r_disp.GetReg(), r_base.GetReg(), 2); 91 LIR* switch_label = NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, -1); 96 NewLIR1(kA64Br1x, r_base.GetReg()); 119 NewLIR3(kA64Adr2xd, table_base.GetReg(), 0, WrapPointer(tab_rec)); 139 LIR* switch_label = NewLIR3(kA64Adr2xd, branch_reg.GetReg(), 0, -1); 144 NewLIR1(kA64Br1x, branch_reg.GetReg()); [all...] |
codegen_arm64.h | 287 ->GetReg().GetReg(), 288 ret_val.GetReg()); 323 ->GetReg().GetReg(), 324 ret_val.GetReg());
|
/art/compiler/dex/quick/x86/ |
fp_x86.cc | 73 NewLIR2(op, r_dest.GetReg(), r_src2.GetReg()); 123 NewLIR2(op, rl_result.reg.GetReg(), rl_src2.reg.GetReg()); 170 LIR *fild64 = NewLIR2NoDest(kX86Fild64M, rs_rX86_SP_32.GetReg(), 178 LIR *fstp = NewLIR2NoDest(opcode, rs_rX86_SP_32.GetReg(), displacement); 240 NewLIR2(kX86Cvtsi2ssRR, temp_reg.GetReg(), rl_result.reg.GetReg()); 241 NewLIR2(kX86ComissRR, rl_src.reg.GetReg(), temp_reg.GetReg()); [all...] |
utility_x86.cc | 53 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg()); 91 return NewLIR2(kX86XorpsRR, r_dest.GetReg(), r_dest.GetReg()); 98 res = NewLIR2(kX86Xor32RR, r_dest.GetReg(), r_dest.GetReg()); 102 res = NewLIR2(kX86Mov32RI, r_dest.GetReg(), value); 106 NewLIR2(kX86MovdxrRR, r_dest_save.GetReg(), r_dest.GetReg()); 136 return NewLIR1(opcode, r_dest_src.GetReg()); [all...] |
quick_assemble_x86_test.cc | 165 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); 167 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); 172 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); 174 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); 179 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); [all...] |
target_x86.cc | 292 SetupRegMask(def_mask, rs_rAX.GetReg()); 296 SetupRegMask(def_mask, rs_rDX.GetReg()); 299 SetupRegMask(use_mask, rs_rAX.GetReg()); 303 SetupRegMask(use_mask, rs_rCX.GetReg()); 307 SetupRegMask(use_mask, rs_rDX.GetReg()); 311 SetupRegMask(use_mask, rs_rBX.GetReg()); 316 SetupRegMask(use_mask, rs_rAX.GetReg()); 317 SetupRegMask(use_mask, rs_rCX.GetReg()); 318 SetupRegMask(use_mask, rs_rDI.GetReg()); 319 SetupRegMask(def_mask, rs_rDI.GetReg()); [all...] |
int_x86.cc | 45 NewLIR2(kX86Set8R, rl_result.reg.GetReg(), kX86CondG); // result = (src1 > src2) ? 1 : 0 46 NewLIR2(kX86Set8R, temp_reg.GetReg(), kX86CondL); // temp = (src1 >= src2) ? 0 : 1 47 NewLIR2(kX86Sub8RR, rl_result.reg.GetReg(), temp_reg.GetReg()); 48 NewLIR2(kX86Movsx8qRR, rl_result.reg.GetReg(), rl_result.reg.GetReg()); 64 NewLIR2(kX86Set8R, rs_r2.GetReg(), kX86CondL); // r2 = (r1:r0) < (r3:r2) ? 1 : 0 65 NewLIR2(kX86Movzx8RR, rs_r2.GetReg(), rs_r2.GetReg()); 68 NewLIR2(kX86Set8R, rs_r0.GetReg(), kX86CondNz); // r0 = (r1:r0) != (r3:r2) ? 1 : [all...] |
call_x86.cc | 90 LIR* lea = RawLIR(current_dalvik_offset_, kX86Lea64RM, table_base.GetReg(), kRIPReg, 97 NewLIR5(kX86MovsxdRA, addr_for_jump.GetReg(), table_base.GetReg(), keyReg.GetReg(), 2, 0); 109 NewLIR5(kX86PcRelLoadRA, addr_for_jump.GetReg(), r_pc.GetReg(), keyReg.GetReg(), 117 NewLIR1(kX86JmpR, addr_for_jump.GetReg()); 129 NewLIR2(cu_->target64 ? kX86Mov64RT : kX86Mov32RT, rl_result.reg.GetReg(), ex_offset); 141 NewLIR2(cu_->target64 ? kX86Mov64RT : kX86Mov32RT, reg_card_base.GetReg(), ct_offset) [all...] |
codegen_x86.h | 397 LOG(FATAL) << "Expected 64b register " << reg.GetReg(); 399 LOG(WARNING) << "Expected 64b register " << reg.GetReg(); 406 ->GetReg().GetReg(), 407 ret_val.GetReg()); 415 LOG(FATAL) << "Expected 32b register " << reg.GetReg(); 417 LOG(WARNING) << "Expected 32b register " << reg.GetReg(); 424 ->GetReg().GetReg(), 425 ret_val.GetReg()); [all...] |
/art/compiler/dex/quick/ |
ralloc_util.cc | 85 m2l_->reginfo_map_[reg.GetReg()] = info; 91 m2l_->reginfo_map_[reg.GetReg()] = info; 97 m2l_->reginfo_map_[reg.GetReg()] = info; 103 m2l_->reginfo_map_[reg.GetReg()] = info; 131 m2l_->reginfo_map_[RegStorage::InvalidReg().GetReg()] = invalid_reg; 148 info->GetReg().GetReg(), info->GetReg().GetRegNum(), info->GetReg().IsFloat() ? 'f' : 'c', 149 info->IsTemp(), info->InUse(), info->IsWide(), info->Partner().GetReg(), info->IsLive() [all...] |
quick_cfi_test.cc | 93 m2l->core_spill_mask_ |= 1 << info->GetReg().GetRegNum(); 99 m2l->fp_spill_mask_ |= 1 << info->GetReg().GetRegNum();
|
/art/compiler/dex/ |
reg_storage.h | 102 // TODO: deprecate use of kInvalidRegVal and speed up GetReg(). Rely on valid bit instead. 209 int GetReg() const { 277 return RegStorage(k64BitPair, low.GetReg(), high.GetReg());
|