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Searched
refs:IsPair
(Results
1 - 21
of
21
) sorted by null
/art/compiler/dex/
reg_storage.h
162
constexpr bool
IsPair
() const {
210
DCHECK(!
IsPair
()) << "reg_ = 0x" << std::hex << reg_;
217
DCHECK(!
IsPair
());
223
DCHECK(
IsPair
());
229
DCHECK(
IsPair
());
235
DCHECK(
IsPair
());
241
DCHECK(
IsPair
());
247
DCHECK(
IsPair
());
252
DCHECK(
IsPair
());
273
DCHECK(!low.
IsPair
());
[
all
...]
/art/compiler/optimizing/
locations.h
164
DCHECK(
IsPair
());
169
DCHECK(
IsPair
());
209
bool
IsPair
() const {
288
} else if (
IsPair
() || IsDoubleStackSlot()) {
300
if ((
IsPair
() && other.
IsPair
()) || (IsDoubleStackSlot() && other.IsDoubleStackSlot())) {
581
|| input.
IsPair
()
locations.cc
76
} else if (location.
IsPair
()) {
register_allocator.cc
297
} else if (input.
IsPair
()) {
353
} else if (first.
IsPair
()) {
365
} else if (output.
IsPair
()) {
[
all
...]
parallel_move_test.cc
39
} else if (location.
IsPair
()) {
ssa_liveness_analysis.cc
320
return location.
IsPair
() ? location.low() : location.reg();
/art/compiler/dex/quick/
ralloc_util.cc
173
if (UNLIKELY(reg.
IsPair
())) {
419
DCHECK(!res.
IsPair
());
506
if (reg.
IsPair
()) {
535
if (reg.
IsPair
()) {
564
if (reg.
IsPair
()) {
578
if (reg.
IsPair
()) {
591
if (reg.
IsPair
()) {
604
if (reg.
IsPair
()) {
622
if (reg.
IsPair
()) {
637
if (reg.
IsPair
()) {
[
all
...]
mir_to_lir-inl.h
263
RegisterInfo* res = reg.
IsPair
() ? reginfo_map_[reg.GetLowReg()] : reginfo_map_[reg.GetReg()];
gen_loadstore.cc
393
if (!loc.reg.
IsPair
()) {
codegen_util.cc
[
all
...]
/art/compiler/dex/quick/arm/
utility_arm.cc
702
DCHECK(!r_dest.
IsPair
());
718
DCHECK(r_dest.
IsPair
());
735
DCHECK(r_dest.
IsPair
());
893
if (!r_src_dest.
IsPair
()) {
924
DCHECK(!r_dest.
IsPair
());
927
DCHECK(r_dest.
IsPair
());
[
all
...]
int_arm.cc
418
if (r_dest.
IsPair
()) {
421
if (r_src.
IsPair
()) {
457
if (dest_fp && r_dest.
IsPair
()) {
460
if (src_fp && r_src.
IsPair
()) {
856
RegStorage expected_reg = rl_src_expected.reg.
IsPair
() ? rl_src_expected.reg.GetLow() :
858
RegStorage new_val_reg = rl_src_new_value.reg.
IsPair
() ? rl_src_new_value.reg.GetLow() :
[
all
...]
/art/compiler/dex/quick/mips/
utility_mips.cc
550
if (!r_dest.
IsPair
()) {
721
if (fpuIs32Bit_ && !r_dest.
IsPair
()) {
782
DCHECK(r_dest.
IsPair
());
809
DCHECK(r_dest.
IsPair
());
898
if (fpuIs32Bit_ && !r_src.
IsPair
()) {
953
DCHECK(r_src.
IsPair
());
975
DCHECK(r_src.
IsPair
());
[
all
...]
int_mips.cc
187
if (r_dest.
IsPair
()) {
190
if (r_src.
IsPair
()) {
194
DCHECK(!r_dest.
IsPair
() && !r_src.
IsPair
());
445
DCHECK(reg.
IsPair
()); // TODO: support k64BitSolo.
codegen_mips.h
291
DCHECK(!reg.
IsPair
());
313
DCHECK(!reg.
IsPair
());
target_mips.cc
190
DCHECK(!reg.
IsPair
());
792
DCHECK(r_dest.
IsPair
());
814
DCHECK(!r_src.
IsPair
());
816
DCHECK(r_src.
IsPair
());
[
all
...]
/art/compiler/dex/quick/x86/
utility_x86.cc
260
int dest = r_dest.
IsPair
() ? r_dest.GetLowReg() : r_dest.GetReg();
311
int src = r_src.
IsPair
() ? r_src.GetLowReg() : r_src.GetReg();
570
int32_t low_reg_val = r_dest.
IsPair
() ? r_dest.GetLowReg() : r_dest.GetReg();
607
if (r_dest.
IsPair
()) {
627
if (r_dest.
IsPair
()) {
648
bool pair = r_dest.
IsPair
();
797
bool pair = r_src.
IsPair
();
[
all
...]
int_x86.cc
128
if (r_dest.
IsPair
()) {
131
if (r_src.
IsPair
()) {
161
if (!r_src.
IsPair
()) {
162
DCHECK(!r_dest.
IsPair
());
174
if (!r_dest.
IsPair
()) {
175
DCHECK(!r_src.
IsPair
());
185
DCHECK_EQ(r_dest.
IsPair
(), r_src.
IsPair
());
186
if (!r_src.
IsPair
()) {
215
DCHECK(!left_op.
IsPair
() && !right_op.IsPair() && !rs_dest.IsPair())
[
all
...]
codegen_x86.h
394
DCHECK(!reg.
IsPair
());
412
DCHECK(!reg.
IsPair
());
[
all
...]
target_x86.cc
[
all
...]
/art/compiler/dex/quick/arm64/
codegen_arm64.h
275
DCHECK(!reg.
IsPair
());
311
DCHECK(!reg.
IsPair
());
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