| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCNaCl.h | 21 bool *IsStore = nullptr);
|
| MipsNaClELFStreamer.cpp | 150 bool IsStore;
152 &IsStore);
158 bool MaskAfter = IsSPFirstOperand && !IsStore;
203 bool *IsStore) {
204 if (IsStore)
205 *IsStore = false;
235 if (IsStore)
236 *IsStore = true;
243 if (IsStore)
244 *IsStore = true
[all...] |
| /external/llvm/lib/CodeGen/ |
| AtomicExpandPass.cpp | 46 bool IsStore, bool IsLoad);
94 bool IsStore, IsLoad;
99 IsStore = false;
104 IsStore = true;
110 IsStore = IsLoad = true;
121 IsStore = IsLoad = true;
125 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad);
152 bool IsStore, bool IsLoad) {
155 auto LeadingFence = TLI->emitLeadingFence(Builder, Order, IsStore, IsLoad);
157 auto TrailingFence = TLI->emitTrailingFence(Builder, Order, IsStore, IsLoad)
[all...] |
| /external/v8/src/compiler/ |
| change-lowering-unittest.cc | 165 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number),
210 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number),
322 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number),
462 IsStore(kMachFloat64, kNoWriteBarrier, CaptureEq(&heap_number),
|
| graph-unittest.h | 95 Matcher<Node*> IsStore(const Matcher<MachineType>& type_matcher,
|
| graph-unittest.cc | 727 Matcher<Node*> IsStore(const Matcher<MachineType>& type_matcher,
|
| /external/v8/src/arm64/ |
| instructions-arm64.cc | 45 bool Instruction::IsStore() const {
|
| instructions-arm64.h | 216 bool IsStore() const;
|
| simulator-arm64.cc | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 407 bool IsStore, bool IsLoad) const override;
409 bool IsStore, bool IsLoad) const override;
|
| ARMLoadStoreOptimizer.cpp | 394 bool IsStore =
397 if (IsLoad || IsStore) {
410 if (Offset >= 0 && !(IsStore && InstrSrcReg == Base))
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 481 bool IsStore, bool IsLoad) const override;
483 bool IsStore, bool IsLoad) const override;
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/clang/lib/CodeGen/ |
| CGAtomic.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonExpandCondsets.cpp | 844 bool IsLoad = TheI->mayLoad(), IsStore = TheI->mayStore();
845 if (!IsLoad && !IsStore)
867 bool Conflict = (L && IsStore) || S;
[all...] |
| /external/vixl/src/vixl/a64/ |
| instructions-a64.cc | 104 bool Instruction::IsStore() const {
|
| instructions-a64.h | 269 bool IsStore() const;
|
| /external/llvm/lib/Target/X86/ |
| X86MCInstLower.cpp | 349 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg();
350 unsigned AddrBase = IsStore;
351 unsigned RegOp = IsStore ? 0 : 5;
[all...] |
| /art/compiler/dex/ |
| mir_graph.h | 285 bool IsStore() const {
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
