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    Searched refs:IsWide (Results 1 - 11 of 11) sorted by null

  /art/compiler/dex/quick/
ralloc_util.cc 149 info->IsTemp(), info->InUse(), info->IsWide(), info->Partner().GetReg(), info->IsLive(),
348 if (info->IsWide()) {
353 DCHECK(partner->IsWide());
377 if (info->IsWide()) {
380 DCHECK(partner->IsWide());
500 if (reg.Valid() && (wide != GetRegInfo(reg)->IsWide())) {
730 DCHECK(info1 && info2 && info1->IsWide() && info2->IsWide() &&
771 if (info->IsWide()) {
869 if (info_lo->IsWide() && info_lo->Partner().NotExactlyEquals(info_hi->GetReg()))
    [all...]
mir_to_lir.cc 58 i += m2l_->in_to_reg_storage_mapping_.GetShorty(i).IsWide() ? 2u : 1u) {
214 (arg.IsWide() && reg_arg.GetWideKind() == kWide) ? k64 : k32;
226 (arg.IsWide() && reg_arg.GetWideKind() == kWide) ? k64 : k32;
288 RegLocation rl_dest = IsWide(size) ? GetReturnWide(ret_reg_class) : GetReturn(ret_reg_class);
291 r_result = IsWide(size) ? AllocTypedTempWide(rl_dest.fp, reg_class)
301 if (IsWide(size)) {
361 RegStorage reg_src = LoadArg(data.src_arg, reg_class, IsWide(size));
    [all...]
mir_to_lir-inl.h 34 if (p->IsWide()) {
gen_common.cc 714 if (IsWide(size)) {
801 if (IsWide(size)) {
842 if (IsWide(size)) {
    [all...]