| /external/libhevc/decoder/arm64/ |
| ihevcd_fmt_conv_420sp_to_420sp.s | 114 LD1 {v0.8b},[x0],#8
115 LD1 {v1.8b},[x0],#8
116 LD1 {v2.8b},[x0],#8
117 LD1 {v3.8b},[x0],#8
134 LD1 {v0.8b},[x0],#8
135 LD1 {v1.8b},[x0],#8
136 LD1 {v2.8b},[x0],#8
137 LD1 {v3.8b},[x0],#8
172 LD1 {v0.8b},[x1],#8
173 LD1 {v1.8b},[x1],#
[all...] |
| ihevcd_fmt_conv_420sp_to_rgba8888.s | 165 LD1 {v2.8b, v3.8b},[x1],#16 ////LOAD 8 VALUES OF UV
193 LD1 {v2.8b, v3.8b},[x1],#16 ////LOAD 8 VALUES OF U
|
| /external/libhevc/common/arm64/ |
| ihevc_inter_pred_chroma_copy.s | 121 LD1 {v0.s}[0],[x0] //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
125 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
128 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
131 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
152 LD1 {v0.s}[0],[x0] //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
156 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
176 LD1 {v0.8b},[x0],#8 //vld1_u8(pu1_src_tmp)
179 LD1 {v1.8b},[x7],x2 //vld1_u8(pu1_src_tmp)
182 LD1 {v2.8b},[x7],x2 //vld1_u8(pu1_src_tmp)
184 LD1 {v3.8b},[x7],x2 //vld1_u8(pu1_src_tmp
[all...] |
| ihevc_sao_band_offset_luma.s | 100 LD1 {v1.8b},[x14],#8 //band_table.val[0]
103 LD1 {v2.8b},[x14],#8 //band_table.val[1]
110 LD1 {v3.8b},[x14],#8 //band_table.val[2]
114 LD1 {v4.8b},[x14],#8 //band_table.val[3]
118 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
123 LD1 {v30.8b},[x6] //pi1_sao_offset load
205 LD1 {v13.8b},[x4] //au1_cur_row = vld1_u8(pu1_src_cpy)
208 LD1 {v15.8b},[x5] //au1_cur_row = vld1_u8(pu1_src_cpy)
210 LD1 {v17.8b},[x6] //au1_cur_row = vld1_u8(pu1_src_cpy)
212 LD1 {v19.8b},[x10] //au1_cur_row = vld1_u8(pu1_src_cpy
[all...] |
| ihevc_sao_edge_offset_class1.s | 116 LD1 {v6.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
117 LD1 {v7.8b},[x6] //offset_tbl = vld1_s8(pi1_sao_offset)
131 LD1 {v1.16b},[x9],#16 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
132 LD1 {v3.16b},[x0],#16 //pu1_cur_row = vld1q_u8(pu1_src)
134 LD1 {v30.16b},[x12],#16 //vld1q_u8(pu1_src[(ht - 1) * src_strd])
145 LD1 {v18.16b},[x10] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
149 LD1 {v30.16b},[x6] //II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
222 LD1 {v18.16b},[x10] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
267 LD1 {v1.16b},[x9],#16 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
268 LD1 {v3.16b},[x0],#16 //pu1_cur_row = vld1q_u8(pu1_src
[all...] |
| ihevc_mem_fns.s | 83 LD1 {v0.8b},[x1],#8
112 LD1 {v0.8b},[x1],#8
|
| ihevc_sao_band_offset_chroma.s | 114 LD1 {v1.8b},[x14],#8 //band_table_u.val[0]
119 LD1 {v2.8b},[x14],#8 //band_table_u.val[1]
123 LD1 {v3.8b},[x14],#8 //band_table_u.val[2]
131 LD1 {v4.8b},[x14],#8 //band_table_u.val[3]
135 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
140 LD1 {v30.8b},[x7] //pi1_sao_offset_u load
160 LD1 {v9.8b},[x14],#8 //band_table_v.val[0]
163 LD1 {v10.8b},[x14],#8 //band_table_v.val[1]
219 LD1 {v11.8b},[x14],#8 //band_table_v.val[2]
222 LD1 {v12.8b},[x14],#8 //band_table_v.val[3
[all...] |
| ihevc_sao_edge_offset_class1_chroma.s | 136 LD1 {v6.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
137 LD1 {v7.8b},[x6] //offset_tbl_u = vld1_s8(pi1_sao_offset_u)
138 LD1 {v1.8b},[x7] //offset_tbl_v = vld1_s8(pi1_sao_offset_v)
152 LD1 {v28.16b},[x11],#16 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
153 //LD1 {v29.8b},[x11],#8 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
154 LD1 {v3.16b},[x0],#16 //pu1_cur_row = vld1q_u8(pu1_src)
155 //LD1 {v11.8b},[x0],#8 //pu1_cur_row = vld1q_u8(pu1_src)
157 LD1 {v30.16b},[x12],#16 //vld1q_u8(pu1_src[(ht - 1) * src_strd])
158 //LD1 {v31.8b},[x12],#8 //vld1q_u8(pu1_src[(ht - 1) * src_strd])
169 LD1 {v18.16b},[x10] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd
[all...] |
| ihevc_sao_edge_offset_class0.s | 100 LD1 {v5.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
104 LD1 {v7.8b},[x8] //offset_tbl = vld1_s8(pi1_sao_offset)
110 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
145 LD1 {v17.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
152 LD1 {v26.16b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
290 LD1 {v17.16b},[x12] //pu1_cur_row = vld1q_u8(pu1_src_cpy)
|
| ihevc_sao_edge_offset_class2_chroma.s | 122 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
311 LD1 {v6.8b},[x6] //offset_tbl_u = vld1_s8(pi1_sao_offset_u)
320 LD1 {v7.8b},[x6] //offset_tbl_v = vld1_s8(pi1_sao_offset_v)
353 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
354 //LD1 {v13.8b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
369 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 2) || vld1q_u8(pu1_src_top_cpy - 2)
370 //LD1 {v11.8b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 2) || vld1q_u8(pu1_src_top_cpy - 2)
394 LD1 {v16.16b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
395 //LD1 {v17.8b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
442 LD1 {v30.8b},[x2] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx
[all...] |
| ihevc_sao_edge_offset_class3_chroma.s | 119 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
306 LD1 {v6.8b},[x6] //offset_tbl_u = vld1_s8(pi1_sao_offset_u)
308 LD1 {v7.8b},[x6] //offset_tbl_v = vld1_s8(pi1_sao_offset_v)
344 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
345 //LD1 {v13.8b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
355 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 2)
356 //LD1 {v11.8b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 2)
386 LD1 {v16.16b},[x11] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
387 //LD1 {v17.8b},[x11] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
428 LD1 {v28.8b},[x2] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx
[all...] |
| ihevc_sao_edge_offset_class2.s | 108 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
209 LD1 {v7.8b},[x6] //offset_tbl = vld1_s8(pi1_sao_offset)
216 LD1 {v6.8b},[x11] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
258 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 1) || vld1q_u8(pu1_src_top_cpy - 1)
262 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
288 LD1 {v16.16b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
354 LD1 {v16.16b},[x8] //II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
358 LD1 {v30.16b},[x11] //III pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
470 LD1 {v16.16b},[x8] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
575 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 1) || vld1q_u8(p (…)
[all...] |
| ihevc_sao_edge_offset_class3.s | 108 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
221 LD1 {v7.8b},[x6] //offset_tbl = vld1_s8(pi1_sao_offset)
233 LD1 {v6.8b},[x6] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
272 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 1)
276 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
298 LD1 {v16.16b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
368 LD1 {v16.16b},[x8] //II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
372 LD1 {v30.16b},[x2] //III pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
494 LD1 {v16.16b},[x8] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
600 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 1
[all...] |
| ihevc_sao_edge_offset_class0_chroma.s | 118 LD1 {v7.8b},[x8] //offset_tbl = vld1_s8(pi1_sao_offset_u)
122 LD1 {v5.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
126 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
133 LD1 {v0.8b},[x5] //offset_tbl = vld1_s8(pi1_sao_offset_v)
165 LD1 {v19.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
166 //LD1 {v13.8b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
174 LD1 {v30.16b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
175 //LD1 {v31.8b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
349 LD1 {v19.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
350 //LD1 {v13.8b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | [all...] |
| /external/valgrind/none/tests/arm64/ |
| memory.stdout.exp | 91 LD1/ST1 (single structure, no offset) (entirely MISSING)
92 LD1/ST1 (single structure, post index) (entirely MISSING)
[all...] |
