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  /external/llvm/lib/Target/Mips/
MipsAnalyzeImmediate.cpp 80 // Replace a ADDiu & SLL pair with a LUi.
85 // LUi 0x444
101 Seq[0].Opc = LUi;
134 LUi = Mips::LUi;
139 LUi = Mips::LUi64;
MipsAnalyzeImmediate.h 50 /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
58 unsigned ADDiu, ORi, SLL, LUi;
MipsMCInstLower.cpp 167 OutMI.setOpcode(Mips::LUi);
MipsSEInstrInfo.cpp 388 unsigned LUi = STI.isABI_N64() ? Mips::LUi64 : Mips::LUi;
400 // The first instruction can be a LUi, which is different from other
405 if (Inst->Opc == LUi)
406 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
MipsSEISelDAGToDAG.cpp 147 // lui $v0, %hi(%neg(%gp_rel(fname)))
163 // lui $v0, %hi(__gnu_local_gp)
165 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
176 // lui $v0, %hi(%neg(%gp_rel(fname)))
180 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
193 // 0. lui $2, %hi(_gp_disp)
337 // lui $2, %hi($CPI1_0)
341 // lui $2, %hi($CPI1_0)
767 // The first instruction can be a LUi which is different from other
    [all...]
MipsLongBranch.cpp 283 // lui $at, %hi($tgt - $baltgt)
301 // LUi and ADDiu instructions create 32-bit offset of the target basic
310 // we replace LUi and ADDiu with pseudo instructions
313 // instructions to LUi and ADDiu in the MC layer, we will create
444 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0)
MipsFastISel.cpp 285 emitInst(Mips::LUi, TmpReg).addImm(Hi);
288 emitInst(Mips::LUi, ResultReg).addImm(Hi);
    [all...]
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp     [all...]
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsTargetStreamer.cpp 679 // lui $gp, %hi(_gp_disp)
690 // lui $gp, %hi(__gnu_local_gp)
699 TmpInst.setOpcode(Mips::LUi);
760 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
761 Inst.setOpcode(Mips::LUi);

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