| /art/test/411-optimizing-arith/src/ |
| Main.java | 76 mul(); method
79 public static void mul() { method in class:Main
87 expectEquals(15, $opt$Mul(5, 3));
88 expectEquals(0, $opt$Mul(0, 0));
89 expectEquals(0, $opt$Mul(0, 3));
90 expectEquals(0, $opt$Mul(3, 0));
91 expectEquals(-3, $opt$Mul(1, -3));
92 expectEquals(36, $opt$Mul(-12, -3));
93 expectEquals(33, $opt$Mul(1, 3) * 11);
94 expectEquals(671088645, $opt$Mul(134217729, 5)); // (2^27 + 1) *
[all...] |
| /external/clang/test/SemaTemplate/ |
| alias-church-numerals.cpp | 23 typename X> using Mul = A<PartialApply<B,F>::template R, X>;
26 template<template<typename> class F, typename X> using Sixteen = Mul<Four, Four, F, X>;
27 template<template<typename> class F, typename X> using TwoHundredAndFiftySix = Mul<Sixteen, Sixteen, F, X>;
|
| /external/skia/src/gpu/gl/ |
| GrGLSL_impl.h | 25 inline Self GrGLSLExpr<Self>::Mul(T0 in0, T1 in1) {
100 return GrGLSLExpr1::Mul(in0, in1);
140 return GrGLSLExpr4::Mul(in0, in1);
152 return GrGLSLExpr4::Mul(in0, in1);
164 return GrGLSLExpr4::Mul(in0, in1);
|
| GrGLSL.h | 187 static Self Mul(T0 in0, T1 in1);
320 * Does an inplace mul, *=, of vec4VarName by mulFactor.
|
| /external/vixl/examples/ |
| factorial.cc | 45 __ Mul(x0, x0, x1);
|
| factorial-rec.cc | 48 __ Mul(x0, x0, x1);
|
| /external/llvm/unittests/Transforms/Utils/ |
| Cloning.cpp | 66 BinaryOperator *Mul = BinaryOperator::Create(Instruction::Mul, V, V);
70 BinaryOperator *MulClone = this->clone(Mul);
83 Mul->setHasNoUnsignedWrap();
87 MulClone = this->clone(Mul);
100 Mul->setHasNoSignedWrap();
104 MulClone = this->clone(Mul);
117 Mul->setHasNoUnsignedWrap(false);
121 MulClone = this->clone(Mul);
|
| /external/valgrind/VEX/priv/ |
| host_tilegx_defs.c | 160 "Mul ",
247 if (instr->GXin.Mul.widening == False) {
248 vex_printf("mul ");
249 ppHRegTILEGX(instr->GXin.Mul.dst);
251 ppHRegTILEGX(instr->GXin.Mul.srcL);
253 ppHRegTILEGX(instr->GXin.Mul.srcR);
256 vex_printf("%s ", instr->GXin.Mul.syned ? "mull32s" : "mull32u");
257 ppHRegTILEGX(instr->GXin.Mul.dst);
259 ppHRegTILEGX(instr->GXin.Mul.srcL);
261 ppHRegTILEGX(instr->GXin.Mul.srcR)
[all...] |
| host_mips_defs.c | 268 ret = "mul.d";
292 ret = "mul.s";
822 i->Min.Mul.syned = syned;
823 i->Min.Mul.widening = wid; /* widen=True else False */
824 i->Min.Mul.sz32 = sz32; /* True = 32 bits */
825 i->Min.Mul.dst = dst;
826 i->Min.Mul.srcL = srcL;
827 i->Min.Mul.srcR = srcR;
1233 switch (i->Min.Mul.widening)
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| Reassociate.cpp | 455 assert((Opcode == Instruction::Mul || Opcode == Instruction::FMul) &&
694 if ((Opcode == Instruction::Mul && BinaryOperator::isNeg(BO)) ||
[all...] |
| StraightLineStrengthReduce.cpp | 85 Mul, // (B + i) * S
164 // Allocate candidates and find bases for Mul instructions.
303 if (C.CandidateKind == Candidate::Mul) {
364 case Instruction::Mul:
414 allocateCandidatesAndFindBasis(Candidate::Mul, SE->getSCEV(B), Idx, RHS, I);
418 allocateCandidatesAndFindBasis(Candidate::Mul, SE->getSCEV(LHS), Zero, RHS,
430 assert(I->getNumOperands() == 2 && "isn't I a mul?");
601 case Candidate::Mul:
|
| /external/llvm/include/llvm/IR/ |
| Operator.h | 73 /// Add, Sub, and Mul. It does not include SDiv, despite that operator having
110 I->getOpcode() == Instruction::Mul ||
116 CE->getOpcode() == Instruction::Mul ||
340 : public ConcreteOperator<OverflowingBinaryOperator, Instruction::Mul> {
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 179 // FIXME: Handle mul by immediate.
183 SDNode *Mul = CurDAG->getMachineNode(Opcode, dl, MVT::i32, MVT::Glue,
186 return CurDAG->SelectNodeTo(N, SP::RDY, MVT::i32, SDValue(Mul, 1));
|
| /external/llvm/lib/IR/ |
| Instruction.cpp | 200 case Mul: return "mul";
466 /// In LLVM, the Add, Mul, And, Or, and Xor operators are associative.
470 Opcode == Add || Opcode == Mul;
498 case Mul:
|
| /art/runtime/interpreter/ |
| safe_math_test.cc | 96 TEST(SafeMath, Mul) {
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZTargetTransformInfo.cpp | 120 case Instruction::Mul:
|
| /external/v8/src/compiler/ |
| machine-operator.h | 163 V(Int, Mul) \
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 50 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
52 SDValue InFlag = SDValue(Mul, 0);
293 /// Mul with two results
|
| /external/llvm/lib/Analysis/ |
| ScalarEvolution.cpp | 298 const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(this);
299 if (!Mul) return false;
302 const SCEVConstant *SC = dyn_cast<SCEVConstant>(Mul->getOperand(0));
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCExpr.h | 412 Mul, ///< Multiplication.
480 return Create(Mul, LHS, RHS, Ctx);
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 10 // This file implements the visit functions for mul, fmul, sdiv, udiv, fdiv,
127 /// (mul LHS, RHS) === (mul nsw LHS, RHS)
156 // E.g. mul i16 with 17 sign bits: 0xff00 * 0xff80 = 0x8000
199 BinaryOperator *Mul = cast<BinaryOperator>(I.getOperand(0));
201 if (I.hasNoUnsignedWrap() && Mul->hasNoUnsignedWrap())
203 if (I.hasNoSignedWrap() && Mul->hasNoSignedWrap() &&
257 // Simplify mul instructions with a constant RHS.
259 // Try to fold constant mul into select arguments.
273 Value *Mul = Builder->CreateMul(C1, Op1)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 603 /// add(add(mul(x,y),a),b). If requireIntermediatesHaveOneUse is true then
628 if (OtherOp.getOpcode() == ISD::MUL) {
629 // add(add(a,b),mul(x,y))
638 if (AddOp.getOperand(0).getOpcode() == ISD::MUL) {
639 // add(add(mul(x,y),a),b)
648 if (AddOp.getOperand(1).getOpcode() == ISD::MUL) {
649 // add(add(a,mul(x,y)),b)
664 SDValue Mul;
666 if (N->getOperand(0).getOpcode() == ISD::MUL) {
667 Mul = N->getOperand(0)
[all...] |
| XCoreLowerThreadLocal.cpp | 91 case Instruction::Mul:
|
| /external/clang/include/clang/AST/ |
| StmtVisitor.h | 122 BINOP_FALLBACK(Mul) BINOP_FALLBACK(Div) BINOP_FALLBACK(Rem)
|
| /external/pdfium/third_party/base/numerics/ |
| safe_math.h | 259 BASE_NUMERIC_ARITHMETIC_OPERATORS(Mul, *, *= )
|
