| /system/core/libpixelflinger/codeflinger/ |
| mips_opcode.h | 227 #define OP_SUB 042
|
| /external/deqp/modules/gles2/functional/ |
| es2fShaderMatrixTests.cpp | 127 OP_SUB,
182 case OP_SUB: return "-";
207 case OP_SUB: return OPERATIONTYPE_BINARY_OPERATOR;
242 case OP_SUB: return TESTMATRIXTYPE_DEFAULT;
272 return op == OP_ADD || op == OP_SUB || op == OP_MUL || op == OP_DIV;
282 return op == OP_ADD || op == OP_SUB || op == OP_MUL || op == OP_DIV || op == OP_COMP_MUL;
459 struct Evaluator<OP_SUB, In0Type, In0DataType, In1Type, In1DataType>
602 MAKE_EVAL_CASE(OP_SUB, IN0TYPE, IN0DATATYPE, IN1TYPE, IN1DATATYPE); \
608 MAKE_EVAL_CASE(OP_SUB, IN0TYPE, IN0DATATYPE, IN1TYPE, IN1DATATYPE); \
[all...] |
| /external/deqp/modules/gles3/functional/ |
| es3fShaderMatrixTests.cpp | 232 OP_SUB,
297 case OP_SUB: return "-";
327 case OP_SUB: return OPERATIONTYPE_BINARY_OPERATOR;
368 case OP_SUB: return TESTMATRIXTYPE_DEFAULT;
402 return op == OP_ADD || op == OP_SUB || op == OP_MUL || op == OP_DIV;
417 return op == OP_ADD || op == OP_SUB || op == OP_MUL || op == OP_DIV || op == OP_COMP_MUL;
903 struct Evaluator<OP_SUB, In0DataType, In1DataType>
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_lowering_nv50.cpp | 423 bld.mkOp2(OP_SUB, TYPE_U32, (aRf = bld.getSSA()), a, t);
435 bld.mkOp2(OP_SUB, TYPE_U32, (m = bld.getSSA()), a, t);
438 div->op = OP_SUB;
443 bld.mkOp2(OP_SUB, TYPE_U32, (q = bld.getSSA()), t, s);
474 mod->op = OP_SUB;
|
| nv50_ir_target_nv50.cpp | 86 { OP_SUB, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
423 case OP_SUB:
|
| nv50_ir_from_tgsi.cpp | [all...] |
| nv50_ir_emit_nv50.cpp | 885 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
919 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
[all...] |
| nv50_ir_peephole.cpp | 706 bld.mkOp2(OP_SUB, TYPE_U32, tB, i->getSrc(0), tA);
745 bld.mkOp2(OP_SUB, TYPE_U32, tD, tB, tA);
847 if (0 && i->op == OP_SUB) {
947 if ((sub->op != OP_ADD && sub->op != OP_SUB) ||
[all...] |
| nv50_ir.h | 52 OP_SUB,
|
| nv50_ir_from_sm4.cpp | 462 case SM4_OPCODE_USUBB: return OP_SUB;
[all...] |
| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| nv50_ir_target_nvc0.cpp | 218 { OP_SUB, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 | 0x8 },
490 case OP_SUB:
|
| nv50_ir_emit_nvc0.cpp | 533 if ((i->op == OP_SUB) != static_cast<bool>(i->src(1).mod.neg()))
543 if (i->op == OP_SUB) code[0] ^= 1 << 8;
548 assert(!i->saturate && i->op != OP_SUB &&
571 if (i->op == OP_SUB) {
[all...] |
| nv50_ir_lowering_nvc0.cpp | 887 bld.mkOp2(OP_SUB, TYPE_F32, dst, bld.loadImm(NULL, 1.0f), dst);
955 i->op = OP_SUB;
[all...] |
