| /system/core/libpixelflinger/codeflinger/ |
| mips_opcode.h | 231 #define OP_XOR 046
|
| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| nv50_ir_target_nvc0.cpp | 231 { OP_XOR, 0x0, 0x0, 0x3, 0x0, 0x2, 0x2 | 0x8 },
482 case OP_XOR:
617 case OP_XOR:
|
| nv50_ir_lowering_nvc0.cpp | 913 bld.mkOp2(OP_XOR, TYPE_U32, face, face, bld.mkImm(0xbf800000));
[all...] |
| nv50_ir_emit_nvc0.cpp | [all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_target_nv50.cpp | 96 { OP_XOR, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x2 },
417 case OP_XOR:
|
| nv50_ir_emit_nv50.cpp | 1282 case OP_XOR: code[0] |= 0x8000; break;
1295 case OP_XOR: code[1] = 0x04008000; break;
[all...] |
| nv50_ir_lowering_nv50.cpp | 447 bld.mkOp2(OP_XOR, TYPE_U32, NULL, div->getSrc(0), div->getSrc(1))
909 bld.mkOp2(OP_XOR, TYPE_U32, def, def, bld.mkImm(0xbf800000));
|
| nv50_ir_peephole.cpp | 472 case OP_XOR:
1138 logop->op == OP_XOR ? OP_SET_XOR : OP_SET_OR);
[all...] |
| nv50_ir.h | 64 OP_XOR,
|
| nv50_ir_from_sm4.cpp | 440 case SM4_OPCODE_XOR: return OP_XOR;
467 case SM4_OPCODE_ATOMIC_XOR: return OP_XOR;
[all...] |
