| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 242 __ Orn(i.OutputRegister(), xzr, i.InputOperand(0));
245 __ Orn(i.OutputRegister32(), wzr, i.InputOperand32(0));
|
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | 658 COMPARE(orn(w11, w12, Operand(0x40004000)),
660 COMPARE(orn(x13, x14, Operand(0x8181818181818181L)),
718 COMPARE(orn(w15, w16, Operand(w17)), "orn w15, w16, w17");
719 COMPARE(orn(x18, x19, Operand(x20, LSL, 13)), "orn x18, x19, x20, lsl #13");
720 COMPARE(orn(w21, w22, Operand(w23, LSR, 14)), "orn w21, w22, w23, lsr #14");
721 COMPARE(orn(x24, x25, Operand(x26, ASR, 15)), "orn x24, x25, x26, asr #15")
[all...] |
| test-assembler-arm64.cc | 615 TEST(orn) {
623 __ Orn(x2, x0, Operand(x1));
624 __ Orn(w3, w0, Operand(w1, LSL, 4));
625 __ Orn(x4, x0, Operand(x1, LSL, 4));
626 __ Orn(x5, x0, Operand(x1, LSR, 1));
627 __ Orn(w6, w0, Operand(w1, ASR, 1));
628 __ Orn(x7, x0, Operand(x1, ASR, 1));
629 __ Orn(w8, w0, Operand(w1, ROR, 16));
630 __ Orn(x9, x0, Operand(x1, ROR, 16));
631 __ Orn(w10, w0, Operand(0xffff))
[all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | 608 TEST(orn) {
615 __ Orn(x2, x0, Operand(x1));
616 __ Orn(w3, w0, Operand(w1, LSL, 4));
617 __ Orn(x4, x0, Operand(x1, LSL, 4));
618 __ Orn(x5, x0, Operand(x1, LSR, 1));
619 __ Orn(w6, w0, Operand(w1, ASR, 1));
620 __ Orn(x7, x0, Operand(x1, ASR, 1));
621 __ Orn(w8, w0, Operand(w1, ROR, 16));
622 __ Orn(x9, x0, Operand(x1, ROR, 16));
623 __ Orn(w10, w0, 0x0000ffff)
[all...] |
| test-disasm-a64.cc | 757 COMPARE(orn(w11, w12, Operand(0x40004000)),
759 COMPARE(orn(x13, x14, Operand(0x8181818181818181)),
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 98 void MacroAssembler::Orn(const Register& rd,
103 LogicalMacro(rd, rn, operand, ORN);
[all...] |
| macro-assembler-arm64.h | 155 inline void Orn(const Register& rd,
[all...] |
| /external/vixl/src/vixl/a64/ |
| macro-assembler-a64.h | 618 void Orn(const Register& rd,
[all...] |
| macro-assembler-a64.cc | 663 void MacroAssembler::Orn(const Register& rd,
667 LogicalMacro(rd, rn, operand, ORN);
808 // could also be achieved using an orr instruction (like orn used by Mvn),
1030 // assembler directly, using orn.
[all...] |
