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Searched
refs:RegUnit
(Results
1 - 10
of
10
) sorted by null
/external/llvm/include/llvm/CodeGen/
LiveRegMatrix.h
19
// the virtual register is inserted into the LiveIntervalUnion for each
regunit
129
/// Check for
regunit
interference only.
138
LiveIntervalUnion::Query &query(LiveInterval &VirtReg, unsigned
RegUnit
);
140
/// Directly access the live interval unions per
regunit
.
141
/// This returns an array indexed by the
regunit
number.
MachineRegisterInfo.h
570
/// virtual register. If
RegUnit
is physical, it must be a register unit (from
572
PSetIterator getPressureSets(unsigned
RegUnit
) const;
673
void setRegUnitUsed(unsigned
RegUnit
) {
674
UsedRegUnits.set(
RegUnit
);
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all
...]
RegisterPressure.h
136
void addPressureChange(unsigned
RegUnit
, bool IsDec,
/external/llvm/include/llvm/MC/
MCRegisterInfo.h
162
const MCPhysReg (*RegUnitRoots)[2]; // Pointer to
regunit
root table.
188
/// differentially encoded register and
regunit
lists in DiffLists.
573
/// Returns a (
RegUnit
, LaneMask) pair.
603
MCRegUnitRootIterator(unsigned
RegUnit
, const MCRegisterInfo *MCRI) {
604
assert(
RegUnit
< MCRI->getNumRegUnits() && "Invalid register unit");
605
Reg0 = MCRI->RegUnitRoots[
RegUnit
][0];
606
Reg1 = MCRI->RegUnitRoots[
RegUnit
][1];
/external/llvm/lib/CodeGen/
LiveRegMatrix.cpp
167
unsigned
RegUnit
) {
168
LiveIntervalUnion::Query &Q = Queries[
RegUnit
];
169
Q.init(UserTag, &VirtReg, &Matrix[
RegUnit
]);
RegisterPressure.cpp
303
static bool containsReg(ArrayRef<unsigned> RegUnits, unsigned
RegUnit
) {
304
return std::find(RegUnits.begin(), RegUnits.end(),
RegUnit
) != RegUnits.end();
386
void PressureDiff::addPressureChange(unsigned
RegUnit
, bool IsDec,
388
PSetIterator PSetI = MRI->getPressureSets(
RegUnit
);
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all
...]
MachineTraceMetrics.cpp
672
// Associate each
regunit
with an instruction operand. Depending on the
674
//
regunit
, or the highest operand to read the
regunit
.
677
unsigned
RegUnit
;
682
unsigned getSparseSetIndex() const { return
RegUnit
; }
684
LiveRegUnit(unsigned RU) :
RegUnit
(RU), Cycle(0), MI(nullptr), Op(0) {}
688
// Identify physreg dependencies for UseMI, and update the live
regunit
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...]
/external/llvm/utils/TableGen/
CodeGenRegisters.h
435
struct
RegUnit
{
436
// Weight assigned to this
RegUnit
for estimating register pressure.
441
// Each native
RegUnit
corresponds to one or two root registers. The full
450
RegUnit
() : Weight(0), RegClassUnitSetsIdx(0) {
499
SmallVector<
RegUnit
, 8> RegUnits;
513
// class's units and any inferred
RegUnit
supersets.
646
RegUnit
&getRegUnit(unsigned RUID) { return RegUnits[RUID]; }
647
const
RegUnit
&getRegUnit(unsigned RUID) const { return RegUnits[RUID]; }
RegisterInfoEmitter.cpp
208
<< "getRegUnitWeight(unsigned
RegUnit
) const {\n"
209
<< " assert(
RegUnit
< " << RegBank.getNumNativeRegUnits()
215
const
RegUnit
&RU = RegBank.getRegUnit(UnitIdx);
216
assert(RU.Weight < 256 && "
RegUnit
too heavy");
220
<< " return RUWeightTable[
RegUnit
];\n";
305
<< "getRegUnitPressureSets(unsigned
RegUnit
) const {\n"
306
<< " assert(
RegUnit
< " << RegBank.getNumNativeRegUnits()
316
<< " return &RCSetsTable[RUSetStartTable[
RegUnit
]];\n"
560
// Differentially encoded register and
regunit
lists allow for better
893
// Emit the shared table of
regunit
lane mask sequences
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all
...]
/external/llvm/include/llvm/Target/
TargetRegisterInfo.h
419
/// hasRegUnit - Returns true if Reg contains
RegUnit
.
420
bool hasRegUnit(unsigned Reg, unsigned
RegUnit
) const {
422
if (*Units ==
RegUnit
)
655
virtual unsigned getRegUnitWeight(unsigned
RegUnit
) const = 0;
675
virtual const int *getRegUnitPressureSets(unsigned
RegUnit
) const = 0;
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all
...]
Completed in 273 milliseconds