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Searched
refs:Spill
(Results
1 - 14
of
14
) sorted by null
/external/llvm/lib/Target/R600/
SIMachineFunctionInfo.cpp
51
struct SpilledReg
Spill
;
66
Spill
.VGPR = LaneVGPRs[LaneVGPRIdx];
67
Spill
.Lane = Lane;
68
return
Spill
;
SIMachineFunctionInfo.h
58
void setHasSpilledVGPRs(bool
Spill
= true) { HasSpilledVGPRs =
Spill
; }
SIRegisterInfo.cpp
43
// Reserve some VGPRs to use as temp registers in case we have to
spill
VGPRs
133
default: llvm_unreachable("Invalid
spill
opcode");
207
// SGPR register
spill
218
struct SIMachineFunctionInfo::SpilledReg
Spill
=
221
if (
Spill
.VGPR == AMDGPU::NoRegister) {
228
Spill
.VGPR)
230
.addImm(
Spill
.Lane);
249
struct SIMachineFunctionInfo::SpilledReg
Spill
=
252
if (
Spill
.VGPR == AMDGPU::NoRegister) {
263
.addReg(
Spill
.VGPR
[
all
...]
/external/llvm/test/MC/Mips/
elf-N64.s
34
sd $ra, 8($sp) # 8-byte Folded
Spill
35
sd $gp, 0($sp) # 8-byte Folded
Spill
r-mips-got-disp.s
27
sd $ra, 8($sp) # 8-byte Folded
Spill
28
sd $gp, 0($sp) # 8-byte Folded
Spill
elf-tls.s
34
sw $ra, 20($sp) # 4-byte Folded
Spill
66
sw $ra, 20($sp) # 4-byte Folded
Spill
98
sw $ra, 20($sp) # 4-byte Folded
Spill
xgot.s
38
sw $ra, 20($sp) # 4-byte Folded
Spill
/external/llvm/lib/CodeGen/
RegAllocBasic.cpp
57
/// algorithm. It prioritizes live virtual registers by
spill
weight and spills
163
//
Spill
or split all live virtual registers currently unified under PhysReg
189
//
Spill
each interfering vreg allocated to PhysReg or an alias.
191
LiveInterval &
Spill
= *Intfs[i];
194
if (!VRM->hasPhys(
Spill
.reg))
199
Matrix->unassign(
Spill
);
201
//
Spill
the extracted interval.
202
LiveRangeEdit LRE(&
Spill
, SplitVRegs, *MF, *LIS, VRM);
203
spiller().
spill
(LRE);
222
// Populate a list of physical register
spill
candidates
[
all
...]
/system/core/libpixelflinger/codeflinger/
GGLAssembler.h
130
class
Spill
133
Spill
(RegisterFile& regFile, ARMAssemblerInterface& gen, uint32_t reglist)
152
~
Spill
() {
texturing.cpp
383
CONTEXT_STORE(s.reg, generated_vars.texture[i].
spill
[0]);
384
CONTEXT_STORE(t.reg, generated_vars.texture[i].
spill
[1]);
407
// We don't have a way to
spill
registers automatically
408
//
spill
depth and AA regs, when we know we may have to.
409
// build the
spill
list...
433
Spill
spill
(registerFile(), *this, spill_list);
459
CONTEXT_LOAD(s.reg, generated_vars.texture[i].
spill
[0]);
460
CONTEXT_LOAD(t.reg, generated_vars.texture[i].
spill
[1]);
610
CONTEXT_STORE(s.reg, generated_vars.texture[i].
spill
[0])
[
all
...]
/external/v8/src/compiler/
register-allocator.h
446
//
Spill
the given life range after position pos.
449
//
Spill
the given life range after position [start] and up to position [end].
453
//
Spill
the given life range after position [start] and up to position [end].
460
// If we are trying to
spill
a range inside the loop try to
461
// hoist
spill
position out to the point just before the loop.
465
void
Spill
(LiveRange* range);
register-allocator.cc
184
// We cannot
spill
a live range that has a use requiring a register
768
// This value is produced on the stack, we never need to
spill
it.
800
// This move to
spill
operand is not a real use. Liveness analysis
844
// This value is produced on the stack, we never need to
spill
it.
858
// This move to
spill
operand is not a real use. Liveness analysis
[
all
...]
/external/v8/src/
lithium-allocator.h
456
//
Spill
the given life range after position pos.
459
//
Spill
the given life range after position [start] and up to position [end].
464
//
Spill
the given life range after position [start] and up to position [end].
473
// If we are trying to
spill
a range inside the loop try to
474
// hoist
spill
position out to the point just before the loop.
478
void
Spill
(LiveRange* range);
lithium-allocator.cc
188
// We cannot
spill
a live range that has a use requiring a register
793
// This value is produced on the stack, we never need to
spill
it.
805
// This move to
spill
operand is not a real use. Liveness analysis
[
all
...]
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