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    Searched refs:SubReg0 (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/Target/AArch64/
AArch64AdvSIMDScalarPass.cpp 203 unsigned Src0 = 0, SubReg0;
209 Src0 = getSrcFromCopy(&*Def, MRI, SubReg0);
296 unsigned Src0 = 0, SubReg0;
302 Src0 = getSrcFromCopy(&*Def, MRI, SubReg0);
327 SubReg0 = 0;
346 .addReg(Src0, getKillRegState(true), SubReg0)
  /external/llvm/lib/CodeGen/
TargetInstrInfo.cpp 140 unsigned SubReg0 = HasDef ? MI->getOperand(0).getSubReg() : 0;
151 SubReg0 = SubReg2;
156 SubReg0 = SubReg1;
167 MI->getOperand(0).setSubReg(SubReg0);
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  /external/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp     [all...]
  /external/llvm/lib/Target/R600/
AMDGPUISelDAGToDAG.cpp 376 SDValue RC, SubReg0, SubReg1;
382 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0_sub1, MVT::i32);
386 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0, MVT::i32);
391 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0,
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