| /external/valgrind/none/tests/ppc32/ |
| opcodes.h | 37 #define X20(OPCODE, TH, RA, RB, XO, RES) X20_ASM(OPCODE, TH, RA, RB, XO, RES)
46 #define DCBT_S(RA, RB, TH) X20(DCBT_OPCODE, TH, RA, RB, DCBT_XO, DCBT_RES)
53 #define DCBTST_S(RA, RB, TH) X20(DCBTST_OPCODE, TH, RA, RB, DCBTST_XO, DCBTST_RES)
|
| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 47 return Arm64ManagedRegister::FromXRegister(X20); // saved on entry restored on exit
51 return Arm64ManagedRegister::FromXRegister(X20); // saved on entry restored on exit
188 return 1 << X19 | 1 << X20 | 1 << X21 | 1 << X22 | 1 << X23 | 1 << X24 |
|
| /art/runtime/arch/arm64/ |
| registers_arm64.h | 47 X20 = 20,
|
| quick_method_frame_info_arm64.h | 36 (1 << art::arm64::X19) | (1 << art::arm64::X20) | (1 << art::arm64::X21) |
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 386 // X19/X20 pair = 0x00000001,
394 if (Reg1 == AArch64::X19 && Reg2 == AArch64::X20 &&
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 162 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 51 case AArch64::X20: return AArch64::W20;
91 case AArch64::W20: return AArch64::X20;
[all...] |
| /external/guava/guava-tests/benchmark/com/google/common/base/ |
| EnumsBenchmark.java | 80 X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36, X37,
88 X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20,
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 62 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
73 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
[all...] |
| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | 614 EXPECT_TRUE(vixl::x20.Is(Arm64Assembler::reg_x(X20)));
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 213 {PPC::X20, -96},
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 365 AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24,
586 Imm |= 0x20;
682 return DecodeVecShiftRImm(Inst, Imm | 0x20, 64);
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/ |
| scsi.h | 38 #define NOTIFICATION_MULTI_HOST_CLASS_MASK 0x20
163 #define DISK_TYPE_XA 0x20
434 #define SCSIMESS_SIMPLE_QUEUE_TAG 0X20
549 #define SCSI_ILLEGAL_LENGTH 0x20
564 #define SCSI_ADSENSE_ILLEGAL_COMMAND 0x20
[all...] |
| /external/valgrind/memcheck/ |
| mc_machine.c | [all...] |
