/external/valgrind/none/tests/arm/ |
v6intThumb.stdout.exp | 285 ADCS-16 0x105 286 adcs r1, r2 :: rd 0x5859704f rm 0x27181728, c:v-in 0, cpsr 0x00000000 287 adcs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z 288 adcs r1, r2 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0x00000000 289 adcs r1, r2 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0x00000000 290 adcs r1, r2 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N 291 adcs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N 292 adcs r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x70000000 ZCV 293 adcs r1, r2 :: rd 0x5859704f rm 0x27181728, c:v-in 1, cpsr 0x00000000 294 adcs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x40000000 Z [all...] |
v6intARM.stdout.exp | 35 adcs r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x40000000 Z 36 adcs r0, r1, r2 :: rd 0x00000001 rm 0x00000000, rn 0x00000000, carryin 1, cpsr 0x00000000 [all...] |
/external/llvm/test/MC/ARM/ |
thumb_rewrites.s | 39 adcs r0, r0, r1 40 @ CHECK: adcs r0, r1 @ encoding: [0x48,0x41]
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basic-thumb-instructions.s | 26 adcs r4, r6 28 @ CHECK: adcs r4, r6 @ encoding: [0x74,0x41]
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basic-thumb2-instructions.s | 22 adcs r0, r1, #0 32 @ CHECK: adcs r0, r1, #0 @ encoding: [0x51,0xf1,0x00,0x00] 45 adcs r4, r5, r6 47 adcs.w r9, r1, r3 49 adcs r0, r1, r3, lsl #7 51 adcs.w r0, r1, r3, asr #32 55 @ CHECK: adcs.w r4, r5, r6 @ encoding: [0x55,0xeb,0x06,0x04] 57 @ CHECK: adcs.w r9, r1, r3 @ encoding: [0x51,0xeb,0x03,0x09] 59 @ CHECK: adcs.w r0, r1, r3, lsl #7 @ encoding: [0x51,0xeb,0xc3,0x10] 61 @ CHECK: adcs.w r0, r1, r3, asr #32 @ encoding: [0x51,0xeb,0x23,0x00 [all...] |
basic-arm-instructions.s | 36 adcs r1, r2, #0xf00 37 adcs r7, r8, #40, #2 59 @ CHECK: adcs r1, r2, #3840 @ encoding: [0x0f,0x1c,0xb2,0xe2] 60 @ CHECK: adcs r7, r8, #40, #2 @ encoding: [0x28,0x71,0xb8,0xe2] [all...] |
/external/valgrind/none/tests/arm64/ |
integer.stdout.exp | 40 adcs x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 00000000 41 adcs x3, x4, x5 :: rd 0000000000004abf rm 0000000000003039, rn 0000000000001a85, cin 1, nzcv 00000000 42 adcs x3, x4, x5 :: rd ffffffffffffffff rm 0000000000000000, rn ffffffffffffffff, cin 0, nzcv 80000000 N 43 adcs x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn ffffffffffffffff, cin 1, nzcv 60000000 ZC 44 adcs x3, x4, x5 :: rd 5859704f00000000 rm 3141592700000000, rn 2718172800000000, cin 0, nzcv 00000000 45 adcs x3, x4, x5 :: rd 5859704f00000001 rm 3141592700000000, rn 2718172800000000, cin 1, nzcv 00000000 46 adcs x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn 0000000000000000, cin 0, nzcv 40000000 Z 47 adcs x3, x4, x5 :: rd 0000000000000001 rm 0000000000000000, rn 0000000000000000, cin 1, nzcv 00000000 48 adcs x3, x4, x5 :: rd 0000000100000000 rm 0000000100000000, rn 0000000000000000, cin 0, nzcv 00000000 49 adcs x3, x4, x5 :: rd 0000000100000001 rm 0000000100000000, rn 0000000000000000, cin 1, nzcv 00000000 (…) [all...] |
/external/llvm/test/MC/AArch64/ |
basic-a64-diagnostics.s | 619 adcs wsp, w3, w5 620 adcs w1, wsp, w2 621 adcs w0, w10, wsp 623 // CHECK-ERROR-NEXT: adcs wsp, w3, w5 626 // CHECK-ERROR-NEXT: adcs w1, wsp, w2 629 // CHECK-ERROR-NEXT: adcs w0, w10, wsp 632 adcs sp, x3, x5 633 adcs x1, sp, x2 634 adcs x0, x10, sp 636 // CHECK-ERROR-NEXT: adcs sp, x3, x [all...] |
arm64-arithmetic-encoding.s | 10 adcs w5, w4, w3 11 adcs x5, x4, x3 15 ; CHECK: adcs w5, w4, w3 ; encoding: [0x85,0x00,0x03,0x3a] 16 ; CHECK: adcs x5, x4, x3 ; encoding: [0x85,0x00,0x03,0xba]
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basic-a64-instructions.s | [all...] |
/external/v8/src/arm64/ |
assembler-arm64.h | [all...] |
assembler-arm64.cc | 1144 void Assembler::adcs(const Register& rd, function in class:v8::internal::Assembler [all...] |
/external/v8/test/cctest/ |
test-disasm-arm64.cc | 431 COMPARE(adcs(w6, w7, Operand(w8)), "adcs w6, w7, w8"); 432 COMPARE(adcs(x9, x10, Operand(x11)), "adcs x9, x10, x11"); [all...] |
/external/vixl/src/vixl/a64/ |
assembler-a64.h | [all...] |
assembler-a64.cc | 922 void Assembler::adcs(const Register& rd, function in class:vixl::Assembler [all...] |
/external/vixl/test/ |
test-disasm-a64.cc | 431 COMPARE(adcs(w6, w7, Operand(w8)), "adcs w6, w7, w8"); 432 COMPARE(adcs(x9, x10, Operand(x11)), "adcs x9, x10, x11"); [all...] |