| /external/valgrind/VEX/priv/ |
| host_tilegx_isel.c | 218 HReg argregs[TILEGX_N_REGPARMS]; local
256 argregs[0] = hregTILEGX_R0();
257 argregs[1] = hregTILEGX_R1();
258 argregs[2] = hregTILEGX_R2();
259 argregs[3] = hregTILEGX_R3();
260 argregs[4] = hregTILEGX_R4();
261 argregs[5] = hregTILEGX_R5();
262 argregs[6] = hregTILEGX_R6();
263 argregs[7] = hregTILEGX_R7();
264 argregs[8] = hregTILEGX_R8()
[all...] |
| host_ppc_isel.c | 725 HReg argregs[PPC_N_REGPARMS]; local
813 argregs[0] = hregPPC_GPR3(mode64);
814 argregs[1] = hregPPC_GPR4(mode64);
815 argregs[2] = hregPPC_GPR5(mode64);
816 argregs[3] = hregPPC_GPR6(mode64);
817 argregs[4] = hregPPC_GPR7(mode64);
818 argregs[5] = hregPPC_GPR8(mode64);
819 argregs[6] = hregPPC_GPR9(mode64);
820 argregs[7] = hregPPC_GPR10(mode64);
2248 HReg argregs[1]; local
2284 HReg argregs[1]; local
3651 HReg argregs[2]; local
3699 HReg argregs[2]; local
[all...] |
| host_mips_isel.c | 401 HReg argregs[MIPS_N_REGPARMS]; local
456 argregs[0] = hregMIPS_GPR4(mode64);
457 argregs[1] = hregMIPS_GPR5(mode64);
458 argregs[2] = hregMIPS_GPR6(mode64);
459 argregs[3] = hregMIPS_GPR7(mode64);
460 argregs[4] = hregMIPS_GPR8(mode64);
461 argregs[5] = hregMIPS_GPR9(mode64);
462 argregs[6] = hregMIPS_GPR10(mode64);
463 argregs[7] = hregMIPS_GPR11(mode64);
469 argregs[0] = hregMIPS_GPR4(mode64)
[all...] |
| host_arm64_isel.c | 483 HReg argregs[ARM64_N_ARGREGS]; local
587 argregs[0] = hregARM64_X0();
588 argregs[1] = hregARM64_X1();
589 argregs[2] = hregARM64_X2();
590 argregs[3] = hregARM64_X3();
591 argregs[4] = hregARM64_X4();
592 argregs[5] = hregARM64_X5();
593 argregs[6] = hregARM64_X6();
594 argregs[7] = hregARM64_X7();
647 return False; /* out of argregs */
[all...] |
| host_x86_isel.c | 435 HReg argregs[3]; local
556 argregs[0] = hregX86_EAX();
557 argregs[1] = hregX86_EDX();
558 argregs[2] = hregX86_ECX();
602 addInstr( env, mk_iMOVsd_RR( tmpregs[argregX], argregs[argregX] ) );
616 argregs[argreg]));
624 argregs[argreg]));
[all...] |
| host_amd64_isel.c | 435 HReg argregs[6]; local
516 argregs[0] = hregAMD64_RDI();
517 argregs[1] = hregAMD64_RSI();
518 argregs[2] = hregAMD64_RDX();
519 argregs[3] = hregAMD64_RCX();
520 argregs[4] = hregAMD64_R8();
521 argregs[5] = hregAMD64_R9();
571 = iselIntExpr_single_instruction( env, argregs[i], args[i] );
650 addInstr( env, mk_iMOVsd_RR( tmpregs[i], argregs[i] ) );
[all...] |
| host_arm_isel.c | 387 HReg argregs[ARM_N_ARGREGS]; local
473 argregs[0] = hregARM_R0();
474 argregs[1] = hregARM_R1();
475 argregs[2] = hregARM_R2();
476 argregs[3] = hregARM_R3();
529 return False; /* out of argregs */
532 addInstr(env, mk_iMOVds_RR( argregs[nextArgReg],
543 return False; /* out of argregs */
544 addInstr(env, ARMInstr_Imm32( argregs[nextArgReg], 0xAA ));
548 return False; /* out of argregs */
[all...] |
