| /external/llvm/test/MC/AArch64/ |
| arm64-basic-a64-instructions.s | 9 crc32cw wzr, w3, w5
17 // CHECK: crc32cw wzr, w3, w5 // encoding: [0x7f,0x58,0xc5,0x1a]
|
| basic-a64-instructions.s | [all...] |
| /external/clang/test/CodeGen/ |
| arm-crc32.c | 39 int crc32cw(int a, int b) function
42 // CHECK: call i32 @llvm.arm.crc32cw(i32 %a, i32 %b)
61 // CHECK: [[T3:%[0-9]+]] = tail call i32 @llvm.arm.crc32cw(i32 %a, i32 [[T0]])
62 // CHECK: call i32 @llvm.arm.crc32cw(i32 [[T3]], i32 [[T2]])
|
| arm64-crc32.c | 39 int crc32cw(int a, int b) function
42 // CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)
|
| /external/llvm/test/MC/ARM/ |
| crc32-thumb.s | 20 crc32cw r0, r1, r2
24 @ CHECK: crc32cw r0, r1, r2 @ encoding: [0xd1,0xfa,0xa2,0xf0]
|
| crc32.s | 20 crc32cw r0, r1, r2
24 @ CHECK: crc32cw r0, r1, r2 @ encoding: [0x42,0x02,0x41,0xe1]
|
| directive-arch_extension-crc.s | 28 crc32cw r0, r1, r2
54 crc32cw r0, r1, r2
|
| /external/vixl/test/ |
| test-disasm-a64.cc | 634 TEST(crc32cw) {
637 COMPARE(crc32cw(w6, w7, w8), "crc32cw w6, w7, w8");
638 COMPARE(crc32cw(w7, w18, w28), "crc32cw w7, w18, w28");
639 COMPARE(crc32cw(w17, w17, w3), "crc32cw w17, w17, w3");
[all...] |
| test-assembler-a64.cc | [all...] |
| /external/vixl/src/vixl/a64/ |
| assembler-a64.h | [all...] |
| macro-assembler-a64.h | [all...] |
| assembler-a64.cc | 1247 void Assembler::crc32cw(const Register& rd, function in class:vixl::Assembler
[all...] |
