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    Searched refs:drmCommandWriteRead (Results 1 - 25 of 53) sorted by null

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  /hardware/intel/img/hwcomposer/merrifield/ips/common/
DrmControl.cpp 45 int ret = drmCommandWriteRead(fd, DRM_PSB_EXTENSION,
  /hardware/intel/img/hwcomposer/moorefield_hdmi/ips/common/
DrmControl.cpp 45 int ret = drmCommandWriteRead(fd, DRM_PSB_EXTENSION,
  /external/libdrm/nouveau/
abi16.c 44 ret = drmCommandWriteRead(dev->fd, DRM_NOUVEAU_CHANNEL_ALLOC,
65 ret = drmCommandWriteRead(dev->fd, DRM_NOUVEAU_CHANNEL_ALLOC,
91 ret = drmCommandWriteRead(dev->fd, DRM_NOUVEAU_CHANNEL_ALLOC,
134 ret = drmCommandWriteRead(dev->fd, DRM_NOUVEAU_NOTIFIEROBJ_ALLOC,
222 ret = drmCommandWriteRead(dev->fd, DRM_NOUVEAU_GEM_NEW,
  /external/libdrm/libkms/
intel.c 112 ret = drmCommandWriteRead(kms->fd, DRM_I915_GEM_CREATE, &arg, sizeof(arg));
130 ret = drmCommandWriteRead(kms->fd, DRM_I915_GEM_SET_TILING, &tile, sizeof(tile));
172 ret = drmCommandWriteRead(bo->base.kms->fd, DRM_I915_GEM_MMAP_GTT, &arg, sizeof(arg));
exynos.c 96 ret = drmCommandWriteRead(kms->fd, DRM_EXYNOS_GEM_CREATE, &arg, sizeof(arg));
140 ret = drmCommandWriteRead(bo->base.kms->fd, DRM_EXYNOS_GEM_MAP_OFFSET, &arg, sizeof(arg));
radeon.c 121 ret = drmCommandWriteRead(kms->fd, DRM_RADEON_GEM_CREATE,
170 ret = drmCommandWriteRead(bo->base.kms->fd, DRM_RADEON_GEM_MMAP,
nouveau.c 118 ret = drmCommandWriteRead(kms->fd, DRM_NOUVEAU_GEM_NEW, &arg, sizeof(arg));
vmwgfx.c 105 ret = drmCommandWriteRead(bo->base.kms->fd,
  /external/libdrm/tests/radeon/
rbo.c 72 r = drmCommandWriteRead(fd, DRM_RADEON_GEM_CREATE,
108 r = drmCommandWriteRead(bo->fd, DRM_RADEON_GEM_MMAP,
167 ret = drmCommandWriteRead(bo->fd, DRM_RADEON_GEM_WAIT_IDLE,
  /external/libdrm/radeon/
radeon_bo_gem.c 108 r = drmCommandWriteRead(bom->fd, DRM_RADEON_GEM_CREATE,
172 r = drmCommandWriteRead(boi->bom->fd,
228 ret = drmCommandWriteRead(boi->bom->fd, DRM_RADEON_GEM_BUSY,
245 r = drmCommandWriteRead(boi->bom->fd,
260 r = drmCommandWriteRead(boi->bom->fd,
356 r = drmCommandWriteRead(boi->bom->fd,
  /external/libdrm/tegra/
tegra.c 134 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_CREATE, &args,
269 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_MMAP, &args,
320 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_GET_FLAGS, &args,
345 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_SET_FLAGS, &args,
367 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_GET_TILING, &args,
396 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_SET_TILING, &args,
  /external/libdrm/freedreno/msm/
msm_bo.c 48 ret = drmCommandWriteRead(bo->dev->fd, DRM_MSM_GEM_INFO,
116 ret = drmCommandWriteRead(dev->fd, DRM_MSM_GEM_NEW,
msm_pipe.c 97 ret = drmCommandWriteRead(dev->fd, DRM_MSM_GET_PARAM, &req, sizeof(req));
  /external/libdrm/freedreno/kgsl/
kgsl_bo.c 61 ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_ALLOC,
142 ret = drmCommandWriteRead(dev->fd, DRM_KGSL_GEM_CREATE,
235 ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO,
298 ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO,
  /external/mesa3d/src/gallium/winsys/svga/drm/
vmw_screen_ioctl.c 160 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_CREATE_SURFACE,
273 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_ALLOC_DMABUF, &arg,
402 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_FENCE_SIGNALED,
429 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_FENCE_WAIT,
451 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
460 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
  /hardware/intel/img/psb_video/src/
psb_overlay.c 154 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
180 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
188 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
195 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
202 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
209 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
214 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
221 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
257 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
273 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs))
    [all...]
psb_buffer_dm.c 74 ret = drmCommandWriteRead(driver_data->drm_fd, driver_data->getParamIoctlOffset,
233 ret = drmCommandWriteRead(driver_data->drm_fd, driver_data->getParamIoctlOffset,
  /external/libdrm/omap/
omap_drm.c 143 ret = drmCommandWriteRead(dev->fd, DRM_OMAP_GET_PARAM, &req, sizeof(req));
209 if (drmCommandWriteRead(dev->fd, DRM_OMAP_GEM_NEW, &req, sizeof(req))) {
273 int ret = drmCommandWriteRead(bo->dev->fd, DRM_OMAP_GEM_INFO,
  /external/mesa3d/src/gallium/winsys/radeon/drm/
radeon_drm_winsys.c 127 if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO,
161 retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
249 retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO,
radeon_drm_bo.c 163 while (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_WAIT,
169 while (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_WAIT_IDLE,
188 return drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_WAIT,
194 return drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_BUSY,
478 if (drmCommandWriteRead(bo->rws->fd,
557 if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_CREATE,
594 r = drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_VA, &va, sizeof(va));
725 drmCommandWriteRead(bo->rws->fd,
799 drmCommandWriteRead(bo->rws->fd,
922 r = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_VA, &va, sizeof(va))
    [all...]
  /external/mesa3d/src/gallium/targets/egl-static/
egl.c 149 ret = drmCommandWriteRead(fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
164 ret = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
  /external/drm_gralloc/
gralloc_drm_radeon.c 340 ret = drmCommandWriteRead(info->fd, DRM_RADEON_INFO,
452 err = drmCommandWriteRead(info->fd, DRM_RADEON_INFO, &kinfo, sizeof(kinfo));
489 err = drmCommandWriteRead(info->fd, DRM_RADEON_GEM_INFO, &mminfo, sizeof(mminfo));
gralloc_drm_intel.c 446 if (drmCommandWriteRead(info->fd, DRM_I915_GETPARAM, &gp, sizeof(gp)))
452 if (drmCommandWriteRead(info->fd, DRM_I915_GETPARAM, &gp, sizeof(gp)))
gralloc_drm_pipe.c 378 err = drmCommandWriteRead(pm->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
388 err = drmCommandWriteRead(pm->fd, DRM_RADEON_INFO, &info, sizeof(info));
  /hardware/intel/common/libwsbm/src/
wsbm_fencemgr.c 372 ret = drmCommandWriteRead(priv->fd, priv->devOffset + TTM_FENCE_SIGNALED,
395 ret = drmCommandWriteRead(priv->fd, priv->devOffset + TTM_FENCE_FINISH,

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