| /external/compiler-rt/test/cfi/ |
| utils.h | 40 virtual void f25() {} function in class:Deriver
|
| /external/compiler-rt/lib/builtins/ppc/ |
| restFP.S | 34 lfd f25,-56(r1)
|
| saveFP.S | 32 stfd f25,-56(r1)
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32r2.s | 9 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 nmadd.s $f0,$f5,$f25,$f12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| fpregdef.h | 55 #define fs2f $f25
99 #define fs1 $f25
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips3/ |
| invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips4/ |
| invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips5-wrong-error.s | 9 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
37 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/ARM/ |
| symbol-variants.s | 83 .word f25(tlsdesc)
85 @ CHECK: 64 R_ARM_TLS_GOTDESC f25
|
| /external/clang/test/CodeGen/ |
| arm-arguments.c | 127 // APCS-GNU-LABEL: define i128 @f25()
133 // AAPCS: define arm_aapcscc void @f25({{.*}} noalias sret
139 _Complex long long f25(void) {} function
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 18 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 nmadd.s $f0,$f5,$f25,$f12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/ELF/ |
| cfi.s | 149 f25: label
|
