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  /external/llvm/lib/Target/BPF/
BPFFrameLowering.cpp 33 MachineRegisterInfo &MRI = MF.getRegInfo();
  /external/llvm/lib/CodeGen/
AllocationOrder.cpp 36 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
PHIEliminationUtils.cpp 36 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
CalcSpillWeights.cpp 33 MachineRegisterInfo &MRI = MF.getRegInfo();
97 MachineRegisterInfo &mri = MF.getRegInfo();
RegAllocBase.cpp 61 MRI = &vrm.getRegInfo();
VirtRegMap.cpp 57 MRI = &mf.getRegInfo();
71 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs();
106 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
211 MRI = &MF->getRegInfo();
DeadMachineInstructionElim.cpp 97 MRI = &MF.getRegInfo();
OptimizePHIs.cpp 69 MRI = &Fn.getRegInfo();
ProcessImplicitDefs.cpp 144 MRI = &MF.getRegInfo();
RegisterClassInfo.cpp 65 const BitVector &RR = MF->getRegInfo().getReservedRegs();
  /external/llvm/lib/Target/Mips/
MipsMachineFunction.cpp 87 return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
99 return Mips16SPAliasReg = MF.getRegInfo().createVirtualRegister(RC);
Mips16FrameLowering.cpp 163 MF.getRegInfo().setPhysRegUsed(Mips::S2);
165 MF.getRegInfo().setPhysRegUsed(Mips::S0);
MipsOptimizePICCall.cpp 119 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(Reg);
260 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
MipsSERegisterInfo.cpp 173 MachineRegisterInfo &RegInfo = MBB.getParent()->getRegInfo();
  /external/llvm/lib/Target/NVPTX/
NVPTXFrameLowering.cpp 43 MachineRegisterInfo &MRI = MF.getRegInfo();
NVPTXReplaceImageHandles.cpp 134 const MachineRegisterInfo &MRI = MF.getRegInfo();
  /external/llvm/lib/Target/R600/
SIMachineFunctionInfo.cpp 44 MachineRegisterInfo &MRI = MF->getRegInfo();
SIFixSGPRCopies.cpp 119 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
203 MachineRegisterInfo &MRI = MF.getRegInfo();
  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 120 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2);
354 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
378 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC);
386 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC);
403 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC);
411 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC);
454 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
466 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
499 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
511 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC)
    [all...]
  /external/llvm/include/llvm/CodeGen/
VirtRegMap.h 85 MachineRegisterInfo &getRegInfo() const { return *MRI; }
LiveRangeEdit.h 118 : Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis),
  /external/llvm/lib/Target/AArch64/
AArch64CleanupLocalDynamicTLSPass.cpp 116 MachineRegisterInfo &RegInfo = MF->getRegInfo();
AArch64StorePairSuppress.cpp 121 MRI = &MF.getRegInfo();
  /external/llvm/lib/Target/SystemZ/
SystemZLDCleanup.cpp 132 MachineRegisterInfo &RegInfo = MF->getRegInfo();
  /external/mesa3d/src/gallium/drivers/radeon/
SIAssignInterpRegs.cpp 90 MachineRegisterInfo &MRI = MF.getRegInfo();

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