| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_ppc.h | 44 float (*immediates)[4],
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| tgsi_ppc.c | 51 * Since it's pretty much impossible to form PPC vector immediates, load
75 int immed_reg; /**< GP register pointing to immediates buffer */
307 * We know that our immediates start at a 16-byte boundary so we
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| /external/llvm/test/MC/PowerPC/ |
| ppc32-ba.s | 3 # Check that large immediates in 32bit mode are accepted.
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| /external/v8/test/cctest/compiler/ |
| instruction-selector-tester.h | 97 immediates.assign(sequence.immediates().begin(),
98 sequence.immediates().end());
103 CHECK(i < immediates.size());
105 return immediates[i].ToInt32();
111 std::deque<Constant> immediates; member in class:v8::internal::compiler::InstructionSelectorTester
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| /art/compiler/utils/arm/ |
| assembler_arm32_test.cc | 40 // To speed up tests, don't use all shift immediates.
516 std::vector<std::pair<uint32_t, uint32_t>> immediates; local
517 immediates.push_back({0, 1});
518 immediates.push_back({0, 8});
519 immediates.push_back({0, 15});
520 immediates.push_back({0, 16});
521 immediates.push_back({0, 31});
522 immediates.push_back({0, 32});
524 immediates.push_back({1, 1});
525 immediates.push_back({1, 15})
540 std::vector<std::pair<uint32_t, uint32_t>> immediates; local
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| assembler_arm_test.h | 36 virtual void FillImmediates(std::vector<Imm>& immediates, int64_t imm_min, int64_t imm_max) {
40 immediates.push_back(CreateImmediate(i));
43 immediates.push_back(CreateImmediate(imm_min));
44 immediates.push_back(CreateImmediate(imm_max));
46 immediates.push_back(CreateImmediate(imm_min + 1));
49 immediates.push_back(CreateImmediate(imm_min + 2));
52 immediates.push_back(CreateImmediate(imm_max - 1));
55 immediates.push_back(CreateImmediate((imm_min + imm_max) / 2));
160 std::vector<std::pair<Imm, Imm>>& immediates,
165 immediates, fmt)
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| /external/mesa3d/src/gallium/auxiliary/draw/ |
| draw_vs_ppc.c | 127 (float (*)[4]) shader->base.immediates,
163 align_free( (void *) shader->base.immediates );
193 vs->base.immediates = align_malloc(TGSI_EXEC_NUM_IMMEDIATES * 4 *
205 (float (*)[4]) vs->base.immediates,
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| draw_vs.h | 118 const float (*immediates)[4]; member in struct:draw_vertex_shader
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| /external/llvm/test/MC/AArch64/ |
| arm64-optional-hash.s | 15 ; FP immediates
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| /external/v8/test/mjsunit/regress/ |
| regress-108296.js | 30 // This test checks that young immediates embedded into code objects
35 // be generated as a part of a gap move. Gap move operate on immediates as
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| /external/llvm/test/MC/ARM/ |
| thumb-diagnostics.s | 29 @ Out of range immediates for ASR instruction.
35 @ Out of range immediates for BKPT instruction.
45 @ Out of range immediates for v8 HLT instruction.
153 @ Out of range immediates for LSL instruction.
170 @ Out of range immediates for STR instruction.
220 @ B/Bcc - out of range immediates for Thumb1 branches
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| thumb2-diagnostics.s | 32 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
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| diagnostics.s | 98 @ Out of range immediates for v8 HLT instruction.
118 @ Out of range 4 and 3 bit immediates on CDP[2]
120 @ Out of range immediates for CDP/CDP2
131 @ Out of range immediates for DBG
174 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
232 @ Out of range immediates and bad shift types for SSAT
271 @ Out of range immediates for SSAT16
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi.h | 370 LLVMValueRef immediates[LP_MAX_TGSI_IMMEDIATES][TGSI_NUM_CHANNELS]; member in struct:lp_build_tgsi_soa_context
456 LLVMValueRef immediates[LP_MAX_TGSI_IMMEDIATES]; member in struct:lp_build_tgsi_aos_context
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| lp_bld_tgsi_aos.c | 180 LLVMValueRef res = bld->immediates[reg->Register.Index];
1049 /* simply copy the immediate values into the next immediates[] slot */
1062 bld.immediates[num_immediates] =
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| lp_bld_tgsi_soa.c | 643 LLVMValueRef res = bld->immediates[reg->Register.Index][swizzle];
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| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.cpp | [all...] |
| X86DisassemblerDecoder.h | 611 // Immediates. There can be two in some cases
614 uint64_t immediates[2]; member in struct:llvm::X86Disassembler::InternalInstruction
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| X86Disassembler.cpp | 320 // By default sign-extend all X86 immediates based on their encoding.
342 // Check for immediates that printSSECC can't handle.
376 // Check for immediates that printAVXCC can't handle.
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| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_fpc.h | 58 float immediates[I915_MAX_CONSTANT][4]; member in struct:i915_fp_compile
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| i915_fpc_translate.c | [all...] |
| /external/v8/test/webkit/ |
| instance-of-immediates.js | 24 description('This test makes sure that instance of behaves correctly when the value, constructor, or its prototype are immediates.');
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| /external/mesa3d/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 358 exec_list immediates; member in class:glsl_to_tgsi_visitor
545 assert(!"immediates should not have indirect addressing");
567 assert(!"immediates should not have indirect addressing");
881 foreach_iter(exec_list_iterator, iter, this->immediates) {
894 this->immediates.push_tail(entry);
3894 struct ureg_src *immediates; member in struct:st_translate
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| radeon_setup_tgsi_llvm.c | 128 return LLVMConstBitCast(bld->immediates[reg->Register.Index][swizzle], ctype);
666 bld->immediates[off->Index][off->SwizzleX],
669 bld->immediates[off->Index][off->SwizzleY],
672 bld->immediates[off->Index][off->SwizzleZ],
944 ctx->soa.immediates[ctx->soa.num_immediates][i] =
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| /external/v8/src/compiler/arm64/ |
| instruction-selector-arm64-unittest.cc | 65 // ARM64 logical immediates: contiguous set bits, rotated about a power of two
67 // subset of the 32-bit immediates.
96 // ARM64 Add/Sub immediates: 12-bit immediate optionally shifted by 12.
249 // TODO(all): Add support for testing 64-bit immediates.
878 const int32_t immediates[20]; member in struct:v8::internal::compiler::__anon19114::MemoryAccess
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