/external/google-breakpad/src/processor/ |
stackwalker_arm_unittest.cc | 245 raw_context.iregs[MD_CONTEXT_ARM_REG_PC] = 0x40005510; 246 raw_context.iregs[MD_CONTEXT_ARM_REG_SP] = stack_section.start().Value(); 272 EXPECT_EQ(return_address1, frame1->context.iregs[MD_CONTEXT_ARM_REG_PC]); 273 EXPECT_EQ(frame1_sp.Value(), frame1->context.iregs[MD_CONTEXT_ARM_REG_SP]); 280 EXPECT_EQ(return_address2, frame2->context.iregs[MD_CONTEXT_ARM_REG_PC]); 281 EXPECT_EQ(frame2_sp.Value(), frame2->context.iregs[MD_CONTEXT_ARM_REG_SP]); 309 raw_context.iregs[MD_CONTEXT_ARM_REG_PC] = 0x40000200; 310 raw_context.iregs[MD_CONTEXT_ARM_REG_SP] = stack_section.start().Value(); 343 EXPECT_EQ(return_address, frame1->context.iregs[MD_CONTEXT_ARM_REG_PC]); 344 EXPECT_EQ(frame1_sp.Value(), frame1->context.iregs[MD_CONTEXT_ARM_REG_SP]) [all...] |
stackwalker_arm64_unittest.cc | 222 raw_context.iregs[MD_CONTEXT_ARM64_REG_PC] = 0x40005510; 223 raw_context.iregs[MD_CONTEXT_ARM64_REG_SP] = stack_section.start().Value(); 250 EXPECT_EQ(return_address1, frame1->context.iregs[MD_CONTEXT_ARM64_REG_PC]); 251 EXPECT_EQ(frame1_sp.Value(), frame1->context.iregs[MD_CONTEXT_ARM64_REG_SP]); 258 EXPECT_EQ(return_address2, frame2->context.iregs[MD_CONTEXT_ARM64_REG_PC]); 259 EXPECT_EQ(frame2_sp.Value(), frame2->context.iregs[MD_CONTEXT_ARM64_REG_SP]); 287 raw_context.iregs[MD_CONTEXT_ARM64_REG_PC] = 0x40000200; 288 raw_context.iregs[MD_CONTEXT_ARM64_REG_SP] = stack_section.start().Value(); 322 EXPECT_EQ(return_address, frame1->context.iregs[MD_CONTEXT_ARM64_REG_PC]); 323 EXPECT_EQ(frame1_sp.Value(), frame1->context.iregs[MD_CONTEXT_ARM64_REG_SP]) [all...] |
stackwalker_arm.cc | 74 frame->instruction = frame->context.iregs[MD_CONTEXT_ARM_REG_PC]; 96 callee_registers[register_names[i]] = last_frame->context.iregs[i]; 113 frame->context.iregs[i] = entry->second; 121 frame->context.iregs[i] = last_frame->context.iregs[i]; 131 frame->context.iregs[MD_CONTEXT_ARM_REG_PC] = entry->second; 137 frame->context.iregs[MD_CONTEXT_ARM_REG_LR] = entry->second; 138 frame->context.iregs[MD_CONTEXT_ARM_REG_PC] = 139 last_frame->context.iregs[MD_CONTEXT_ARM_REG_LR]; 149 frame->context.iregs[MD_CONTEXT_ARM_REG_SP] = entry->second [all...] |
stackwalker_arm64.cc | 73 frame->instruction = frame->context.iregs[MD_CONTEXT_ARM64_REG_PC]; 95 callee_registers[register_names[i]] = last_frame->context.iregs[i]; 113 frame->context.iregs[i] = entry->second; 122 frame->context.iregs[i] = last_frame->context.iregs[i]; 131 frame->context.iregs[MD_CONTEXT_ARM64_REG_PC] = entry->second; 140 frame->context.iregs[MD_CONTEXT_ARM64_REG_SP] = entry->second; 157 uint64_t last_sp = last_frame->context.iregs[MD_CONTEXT_ARM64_REG_SP]; 177 frame->context.iregs[MD_CONTEXT_ARM64_REG_PC] = caller_pc; 178 frame->context.iregs[MD_CONTEXT_ARM64_REG_SP] = caller_sp [all...] |
minidump_unittest.cc | [all...] |
stackwalk_common.cc | 154 stack_begin = frame_arm->context.iregs[13]; 155 stack_end = prev_frame_arm->context.iregs[13]; 166 stack_begin = frame_arm64->context.iregs[31]; 167 stack_end = prev_frame_arm64->context.iregs[31]; 376 sequence = PrintRegister("r0", frame_arm->context.iregs[0], sequence); 378 sequence = PrintRegister("r1", frame_arm->context.iregs[1], sequence); 380 sequence = PrintRegister("r2", frame_arm->context.iregs[2], sequence); 382 sequence = PrintRegister("r3", frame_arm->context.iregs[3], sequence); 386 sequence = PrintRegister("r4", frame_arm->context.iregs[4], sequence); 388 sequence = PrintRegister("r5", frame_arm->context.iregs[5], sequence) [all...] |
stackwalker_mips_unittest.cc | 152 raw_context.iregs[MD_CONTEXT_MIPS_REG_SP] = 0x80000000; 180 raw_context.iregs[MD_CONTEXT_MIPS_REG_SP] = 0x80000000; 203 raw_context.iregs[MD_CONTEXT_MIPS_REG_SP] = 0x80000000; 258 raw_context.iregs[MD_CONTEXT_MIPS_REG_SP] = stack_section.start().Value(); 259 raw_context.iregs[MD_CONTEXT_MIPS_REG_RA] = return_address1; 287 EXPECT_EQ(frame1_sp.Value(), frame1->context.iregs[MD_CONTEXT_MIPS_REG_SP]); 297 EXPECT_EQ(frame2_sp.Value(), frame2->context.iregs[MD_CONTEXT_MIPS_REG_SP]); 326 raw_context.iregs[MD_CONTEXT_MIPS_REG_SP] = stack_section.start().Value(); 327 raw_context.iregs[MD_CONTEXT_MIPS_REG_RA] = return_address; 363 EXPECT_EQ(frame1_sp.Value(), frame1->context.iregs[MD_CONTEXT_MIPS_REG_SP]) [all...] |
stackwalker_mips.cc | 107 caller_registers[kRegisterNames[i]] = last_frame->context.iregs[i]; 108 callee_registers[kRegisterNames[i]] = last_frame->context.iregs[i]; 140 frame->context.iregs[i] = caller_entry->second; 151 frame->context.iregs[i] = last_frame->context.iregs[i]; 160 frame->context.iregs[MD_CONTEXT_MIPS_REG_RA] = caller_registers["$ra"]; 203 if (new_frame->context.iregs[MD_CONTEXT_MIPS_REG_SP] <= 204 last_frame->context.iregs[MD_CONTEXT_MIPS_REG_SP]) { 218 uint32_t last_sp = last_frame->context.iregs[MD_CONTEXT_MIPS_REG_SP]; 287 frame->context.iregs[MD_CONTEXT_MIPS_REG_SP] = caller_sp [all...] |
dump_context.cc | 160 *ip = GetContextARM()->iregs[MD_CONTEXT_ARM_REG_PC]; 163 *ip = GetContextARM64()->iregs[MD_CONTEXT_ARM64_REG_PC]; 514 printf(" iregs[%2d] = 0x%x\n", 515 ireg_index, context_arm->iregs[ireg_index]); 544 printf(" iregs[%2d] = 0x%" PRIx64 "\n", 545 ireg_index, context_arm64->iregs[ireg_index]); 569 printf(" iregs[%2d] = 0x%" PRIx64 "\n", 570 ireg_index, context_mips->iregs[ireg_index]);
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synth_minidump.cc | 188 D32(context.iregs[i]); 206 D64(context.iregs[i]);
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minidump.cc | 702 Swap(&context_arm64->iregs[ireg_index]); [all...] |
/external/google-breakpad/src/client/linux/dump_writer_common/ |
ucontext_reader.cc | 159 out->iregs[0] = uc->uc_mcontext.arm_r0; 160 out->iregs[1] = uc->uc_mcontext.arm_r1; 161 out->iregs[2] = uc->uc_mcontext.arm_r2; 162 out->iregs[3] = uc->uc_mcontext.arm_r3; 163 out->iregs[4] = uc->uc_mcontext.arm_r4; 164 out->iregs[5] = uc->uc_mcontext.arm_r5; 165 out->iregs[6] = uc->uc_mcontext.arm_r6; 166 out->iregs[7] = uc->uc_mcontext.arm_r7; 167 out->iregs[8] = uc->uc_mcontext.arm_r8; 168 out->iregs[9] = uc->uc_mcontext.arm_r9 [all...] |
thread_info.cc | 197 out->iregs[i] = regs.uregs[i]; 220 out->iregs[i] = regs.regs[i]; 221 out->iregs[MD_CONTEXT_ARM64_REG_SP] = regs.sp; 222 out->iregs[MD_CONTEXT_ARM64_REG_PC] = regs.pc; 240 out->iregs[i] = regs.regs[i];
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/external/google-breakpad/src/google_breakpad/common/ |
minidump_cpu_arm.h | 103 uint32_t iregs[MD_CONTEXT_ARM_GPR_COUNT]; member in struct:__anon9471 119 /* Indices into iregs for registers with a dedicated or conventional
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minidump_cpu_arm64.h | 98 uint64_t iregs[MD_CONTEXT_ARM64_GPR_COUNT]; member in struct:__anon9473 116 /* Indices into iregs for registers with a dedicated or conventional
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minidump_cpu_mips.h | 118 uint64_t iregs[MD_CONTEXT_MIPS_GPR_COUNT]; member in struct:__anon9477 139 /* Indices into iregs for registers with a dedicated or conventional
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/external/google-breakpad/src/tools/linux/md2core/ |
minidump-2-core.cc | 347 thread->regs.uregs[0] = rawregs->iregs[0]; 348 thread->regs.uregs[1] = rawregs->iregs[1]; 349 thread->regs.uregs[2] = rawregs->iregs[2]; 350 thread->regs.uregs[3] = rawregs->iregs[3]; 351 thread->regs.uregs[4] = rawregs->iregs[4]; 352 thread->regs.uregs[5] = rawregs->iregs[5]; 353 thread->regs.uregs[6] = rawregs->iregs[6]; 354 thread->regs.uregs[7] = rawregs->iregs[7]; 355 thread->regs.uregs[8] = rawregs->iregs[8]; 356 thread->regs.uregs[9] = rawregs->iregs[9] [all...] |
/external/google-breakpad/src/client/mac/handler/ |
minidump_generator.cc | 481 #define AddGPR(a) context_ptr->iregs[a] = REGISTER_FROM_THREADSTATE(machine_state, r[a]) 483 context_ptr->iregs[13] = REGISTER_FROM_THREADSTATE(machine_state, sp); 484 context_ptr->iregs[14] = REGISTER_FROM_THREADSTATE(machine_state, lr); 485 context_ptr->iregs[15] = REGISTER_FROM_THREADSTATE(machine_state, pc); 539 #define AddGPR(a) context_ptr->iregs[a] = \ 542 context_ptr->iregs[29] = REGISTER_FROM_THREADSTATE(machine_state, fp); 543 context_ptr->iregs[30] = REGISTER_FROM_THREADSTATE(machine_state, lr); 544 context_ptr->iregs[31] = REGISTER_FROM_THREADSTATE(machine_state, sp); 545 context_ptr->iregs[32] = REGISTER_FROM_THREADSTATE(machine_state, pc); [all...] |
/external/ltrace/sysdeps/linux-gnu/x86/ |
fetch.c | 58 struct user_regs_struct iregs; member in struct:fetch_context 219 context->iregs.WHICH, offset); \ 573 if (ptrace(PTRACE_GETREGS, proc->pid, 0, &context->iregs) < 0) 671 sp = (arch_addr_t)context->iregs.rsp; 673 sp = (arch_addr_t)context->iregs.esp;
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/art/runtime/entrypoints/quick/ |
quick_trampoline_entrypoints.cc | 1393 size_t iregs = BuildNativeCallFrameStateMachine<ComputeNativeCallFrameSize>::kNumNativeGprArgs; local [all...] |