| /external/llvm/test/MC/AArch64/ |
| elf-reloc-ldrlit.s | 6 ldrsw x9, some_label
|
| arm64-tls-relocs.s | 143 ldrsw x21, [x20, #:tprel_lo12_nc:var]
146 // CHECK: ldrsw x21, [x20, :tprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9]
267 ldrsw x21, [x20, #:dtprel_lo12_nc:var]
270 // CHECK: ldrsw x21, [x20, :dtprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9]
|
| tls-relocs.s | 153 ldrsw x21, [x20, #:dtprel_lo12_nc:var]
157 // CHECK: ldrsw x21, [x20, :dtprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9]
355 ldrsw x21, [x20, #:tprel_lo12_nc:var]
359 // CHECK: ldrsw x21, [x20, :tprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9]
|
| arm64-elf-relocs.s | 170 ldrsw x3, [x4, #:lo12:sym]
173 // CHECK: ldrsw x3, [x4, :lo12:sym]
180 ldrsw x3, [x4, #:dtprel_lo12_nc:sym]
183 // CHECK: ldrsw x3, [x4, :dtprel_lo12_nc:sym]
191 ldrsw x3, [x4, :tprel_lo12_nc:sym]
194 // CHECK: ldrsw x3, [x4, :tprel_lo12_nc:sym]
|
| basic-a64-diagnostics.s | [all...] |
| arm64-memory.s | 25 ldrsw x9, [sp, #512]
60 ; CHECK: ldrsw x9, [sp, #512] ; encoding: [0xe9,0x03,0x82,0xb9]
444 ldrsw x9, foo
449 ; CHECK: ldrsw x9, foo ; encoding: [0bAAA01001,A,A,0x98]
613 ldrsw x3, [x10, #10]
614 ldrsw x4, [x11, #-1]
|
| basic-a64-instructions.s | [all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | [all...] |
| test-assembler-a64.cc | [all...] |
| /external/vixl/src/vixl/a64/ |
| assembler-a64.h | [all...] |
| assembler-a64.cc | 1560 void Assembler::ldrsw(const Register& rt, const MemOperand& src, function in class:vixl::Assembler
1642 void Assembler::ldrsw(const Register& rt, RawLiteral* literal) { function in class:vixl::Assembler
1655 void Assembler::ldrsw(const Register& rt, int imm19) { function in class:vixl::Assembler
[all...] |
| macro-assembler-a64.h | 47 V(Ldrsw, Register&, rt, LDRSW_x)
[all...] |
| /external/valgrind/none/tests/arm64/ |
| memory.stdout.exp | 32 ldrsw x21, [x22, #24] :: rd ffffffff8b8a8988 rn (hidden), cin 0, nzcv 00000000
38 ldrsw x21, [x22, #-24]! :: rd ffffffffdbdad9d8 rn (hidden), cin 0, nzcv 00000000
43 ldrsw x21, [x22], #-24 :: rd fffffffff3f2f1f0 rn (hidden), cin 0, nzcv 00000000
49 ldrsw x21, [x22, #-24] :: rd ffffffffdbdad9d8 rn (hidden), cin 0, nzcv 00000000
57 ldrsw x21, [x22,x23] :: rd fffffffff8f7f6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
58 ldrsw x21, [x22,x23, lsl #2] :: rd ffffffff87868584 rm (hidden), rn (hidden), cin 0, nzcv 00000000
59 ldrsw x21, [x22,w23,uxtw #0] :: rd fffffffff8f7f6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
60 ldrsw x21, [x22,w23,uxtw #2] :: rd ffffffff87868584 rm (hidden), rn (hidden), cin 0, nzcv 00000000
61 ldrsw x21, [x22,w23,sxtw #0] :: rd ffffffffeeedeceb rm (hidden), rn (hidden), cin 0, nzcv 00000000
62 ldrsw x21, [x22,w23,sxtw #2] :: rd ffffffffdfdedddc rm (hidden), rn (hidden), cin 0, nzcv 00000000
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64.h | [all...] |
| assembler-arm64.cc | 1700 void Assembler::ldrsw(const Register& rt, const MemOperand& src) { function in class:v8::internal::Assembler
[all...] |
