/external/valgrind/VEX/test/ |
test-amd64-muldiv.h | 2 void glue(glue(test_, OP), b)(int64 op0, int64 op1) 5 s0 = op0; 20 void glue(glue(test_, OP), w)(int64 op0h, int64 op0, int64 op1) 25 res = op0; 35 stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK); 38 void glue(glue(test_, OP), l)(int64 op0h, int64 op0, int64 op1) 43 res = op0; 53 stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK); 56 void glue(glue(test_, OP), q)(int64 op0h, int64 op0, int64 op1) 61 res = op0; [all...] |
test-i386-muldiv.h | 2 void glue(glue(test_, OP), b)(int op0, int op1) 5 s0 = op0; 20 void glue(glue(test_, OP), w)(int op0h, int op0, int op1) 25 res = op0; 35 stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK); 38 void glue(glue(test_, OP), l)(int op0h, int op0, int op1) 43 res = op0; 53 stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
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test-amd64.c | 368 void test_imulw2(int64 op0, int64 op1) 371 s0 = op0; 386 void test_imull2(int64 op0, int64 op1) 390 s0 = op0; 405 #define TEST_IMUL_IM(size, size1, op0, op1)\ 412 "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \ 418 "imul" size, op0, op1, res, flags & CC_MASK);\ 421 #define TEST_IMUL_IM_L(op0, op1)\ 428 "imul $" #op0 ", %2, %0\n\t" \ 434 "imull", op0, op1, res, flags & CC_MASK); [all...] |
test-i386.c | 356 void test_imulw2(int op0, int op1) 359 s0 = op0; 374 void test_imull2(int op0, int op1) 377 s0 = op0; 392 #define TEST_IMUL_IM(size, size1, op0, op1)\ 399 "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \ 405 "imul" size, op0, op1, res, flags & CC_MASK);\ 505 #define TEST_BSX(op, size, op0)\ 508 val = op0;\ 758 #define TEST_BCD(op, op0, cc_in, cc_mask) [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_fs_channel_expressions.cpp | 220 ir_rvalue *op0 = get_element(op_var[0], i); local 224 op0, 249 ir_rvalue *op0 = get_element(op_var[0], i); local 254 op0, 279 ir_rvalue *op0 = get_element(op_var[0], i); local 285 op0, 311 ir_rvalue *op0 = get_element(op_var[0], i); local 323 op0,
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/external/mesa3d/src/glsl/ |
lower_instructions.cpp | 43 * Breaks an ir_binop_sub expression down to add(op0, neg(op1)) 48 * want to recognize add(op0, neg(op1)) or the other way around to 53 * Breaks an ir_binop_div expression down to op0 * (rcp(op1)). 77 * Breaks an ir_binop_mod expression down to (op1 * fract(op0 / op1)) 144 /* op0 / op1 -> op0 * (1.0 / op1) */ 160 ir_rvalue *op0, *op1; local 179 op0 = new(ir) ir_expression(ir_unop_i2f, vec_type, ir->operands[0], NULL); 181 op0 = new(ir) ir_expression(ir_unop_u2f, vec_type, ir->operands[0], NULL); 187 op0 = new(ir) ir_expression(ir_binop_mul, vec_type, op0, op1) [all...] |
ir.cpp | 200 ir_rvalue *op0) 206 this->operands[0] = op0; 213 ir_rvalue *op0, ir_rvalue *op1) 220 this->operands[0] = op0; 227 ir_rvalue *op0, ir_rvalue *op1, 233 this->operands[0] = op0; 239 ir_expression::ir_expression(int op, ir_rvalue *op0) 244 this->operands[0] = op0; 275 this->type = op0->type; 283 op0->type->vector_elements, 1) [all...] |
loop_analysis.cpp | 459 ir_variable *const op0 = rhs->operands[0]->variable_referenced(); local 462 if (((op0 != var) && (op1 != var)) 466 ir_rvalue *inc = (op0 == var) ? rhs->operands[1] : rhs->operands[0];
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/external/libvpx/libvpx/vp8/common/ |
loopfilter_filters.c | 52 uc *op0, uc *oq0, uc *oq1) 61 ps0 = (signed char) * op0 ^ 0x80; 84 *op0 = u ^ 0x80; 162 uc *op2, uc *op1, uc *op0, uc *oq0, uc *oq1, uc *oq2) 168 signed char ps0 = (signed char) * op0 ^ 0x80; 199 *op0 = s ^ 0x80; 292 static void vp8_simple_filter(signed char mask, uc *op1, uc *op0, uc *oq0, uc *oq1) 296 signed char p0 = (signed char) * op0 ^ 0x80; 314 *op0 = u ^ 0x80;
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/external/webp/src/dsp/ |
dec_neon.c | 484 uint8x16_t* const op0, uint8x16_t* const oq0) { 493 *op0 = FlipSignBack(sp0); 502 uint8x16_t* const op0, uint8x16_t* const oq0) { 509 ApplyFilter2(p0s, q0s, delta1, op0, oq0); 513 uint8x16_t p1, p0, q0, q1, op0, oq0; local 517 DoFilter2(p1, p0, q0, q1, mask, &op0, &oq0); 519 Store16x2(op0, oq0, p, stride); 523 uint8x16_t p1, p0, q0, q1, oq0, op0; local 527 DoFilter2(p1, p0, q0, q1, mask, &op0, &oq0); 529 Store2x16(op0, oq0, p, stride) 828 uint8x16_t op2, op1, op0, oq0, oq1, oq2; local 845 uint8x16_t op2, op1, op0, oq0, oq1, oq2; local 910 uint8x16_t op2, op1, op0, oq0, oq1, oq2; local 928 uint8x16_t op1, op0, oq0, oq1; local 943 uint8x16_t op2, op1, op0, oq0, oq1, oq2; local 960 uint8x16_t op1, op0, oq0, oq1; local [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ |
loopfilter_filters.c | 52 uc *op0, uc *oq0, uc *oq1) 61 ps0 = (signed char) * op0 ^ 0x80; 84 *op0 = u ^ 0x80; 162 uc *op2, uc *op1, uc *op0, uc *oq0, uc *oq1, uc *oq2) 168 signed char ps0 = (signed char) * op0 ^ 0x80; 199 *op0 = s ^ 0x80; 292 static void vp8_simple_filter(signed char mask, uc *op1, uc *op0, uc *oq0, uc *oq1) 296 signed char p0 = (signed char) * op0 ^ 0x80; 314 *op0 = u ^ 0x80;
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/bionic/libc/kernel/uapi/asm-arm64/asm/ |
kvm.h | 119 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
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/development/ndk/platforms/android-21/arch-arm64/include/asm/ |
kvm.h | 114 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
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/external/kernel-headers/original/uapi/asm-arm64/asm/ |
kvm.h | 141 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ 143 ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \
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/prebuilts/ndk/9/platforms/android-21/arch-arm64/usr/include/asm/ |
kvm.h | 114 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
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/external/javassist/src/main/javassist/ |
CtConstructor.java | 160 int op0 = it.byteAt(it.next()); local 161 return op0 == Opcode.RETURN // empty static initializer 162 || (op0 == Opcode.ALOAD_0
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/external/libvpx/libvpx/vp9/common/ |
vp9_loopfilter_filters.c | 74 uint8_t *op0, uint8_t *oq0, uint8_t *oq1) { 78 const int8_t ps0 = (int8_t) *op0 ^ 0x80; 81 const uint8_t hev = hev_mask(thresh, *op1, *op0, *oq0, *oq1); 96 *op0 = signed_char_clamp(ps0 + filter2) ^ 0x80; 158 uint8_t *op1, uint8_t *op0, 162 const uint8_t p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; 168 *op0 = ROUND_POWER_OF_TWO(p3 + p2 + p1 + 2 * p0 + q0 + q1 + q2, 3); 173 filter4(mask, thresh, op1, op0, oq0, oq1); 236 uint8_t *op1, uint8_t *op0, 243 p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/ |
vp9_loopfilter_filters.c | 74 uint8_t *op0, uint8_t *oq0, uint8_t *oq1) { 78 const int8_t ps0 = (int8_t) *op0 ^ 0x80; 81 const uint8_t hev = hev_mask(thresh, *op1, *op0, *oq0, *oq1); 96 *op0 = signed_char_clamp(ps0 + filter2) ^ 0x80; 158 uint8_t *op1, uint8_t *op0, 162 const uint8_t p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; 168 *op0 = ROUND_POWER_OF_TWO(p3 + p2 + p1 + 2 * p0 + q0 + q1 + q2, 3); 173 filter4(mask, thresh, op1, op0, oq0, oq1); 236 uint8_t *op1, uint8_t *op0, 243 p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; [all...] |
/external/libvpx/libvpx/vp9/common/mips/dspr2/ |
vp9_loopfilter_filters_dspr2.h | 372 uint32_t *op1, uint32_t *op0, 376 const uint32_t p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; 386 /* *op0 = ROUND_POWER_OF_TWO(p3 + p2 + p1 + p0 + p0 + q0 + q1 + q2, 3) 3 */ 442 *op0 = res_op0; 465 /* *op0 = ROUND_POWER_OF_TWO(p3 + p2 + p1 + p0 + p0 + q0 + q1 + q2, 3) 3 */ 529 uint32_t *op1, uint32_t *op0, 535 const uint32_t p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; 639 /* *op0 = ROUND_POWER_OF_TWO(p7 + p6 + p5 + p4 + p3 + p2 + p1 + p0 * 2 + 662 *op0 = res_op0; [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/mips/dspr2/ |
vp9_loopfilter_filters_dspr2.h | 372 uint32_t *op1, uint32_t *op0, 376 const uint32_t p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; 386 /* *op0 = ROUND_POWER_OF_TWO(p3 + p2 + p1 + p0 + p0 + q0 + q1 + q2, 3) 3 */ 442 *op0 = res_op0; 465 /* *op0 = ROUND_POWER_OF_TWO(p3 + p2 + p1 + p0 + p0 + q0 + q1 + q2, 3) 3 */ 529 uint32_t *op1, uint32_t *op0, 535 const uint32_t p3 = *op3, p2 = *op2, p1 = *op1, p0 = *op0; 639 /* *op0 = ROUND_POWER_OF_TWO(p7 + p6 + p5 + p4 + p3 + p2 + p1 + p0 * 2 + 662 *op0 = res_op0; [all...] |
/external/libvpx/libvpx/vp9/common/arm/neon/ |
vp9_loopfilter_neon.asm | 70 vst1.u8 {d5}, [r3@64], r1 ; store op0 144 ;store op1, op0, oq0, oq1 184 ; d5 op0 272 veor d5, d19, d18 ; *op0 = u^0x80 324 vst1.u8 {d2}, [r2@64], r1 ; store op0 396 ;store op2, op1, op0, oq0 447 ; d2 op0 559 vqadd.s8 d24, d24, d30 ; op0 = clamp(ps0 + filter2) 601 vbif d2, d24, d20 ; op0 |= f_op0 & ~(flat & mask) 622 vbit d2, d23, d20 ; op0 |= r_op0 & (flat & mask [all...] |
vp9_mb_lpf_neon.asm | 67 vst1.u8 {d24}, [r8@64], r1 ; store op0 84 vst1.u8 {d20}, [r8@64], r1 ; store op0 101 vst1.u8 {d19}, [r8@64], r1 ; store op0 424 vqadd.s8 d24, d24, d30 ; op0 = clamp(ps0 + filter2) 468 vsubw.u8 q15, d4 ; oq0 = op0 - p3 546 vaddw.u8 q15, d7 ; op0 += p0 547 vaddw.u8 q15, d14 ; op0 += q6 555 vbif d19, d20, d17 ; op0 |= t_op0 & ~(f2 & f & m)
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
vp9_loopfilter_neon.asm | 70 vst1.u8 {d5}, [r3@64], r1 ; store op0 144 ;store op1, op0, oq0, oq1 184 ; d5 op0 272 veor d5, d19, d18 ; *op0 = u^0x80 324 vst1.u8 {d2}, [r2@64], r1 ; store op0 396 ;store op2, op1, op0, oq0 447 ; d2 op0 559 vqadd.s8 d24, d24, d30 ; op0 = clamp(ps0 + filter2) 601 vbif d2, d24, d20 ; op0 |= f_op0 & ~(flat & mask) 622 vbit d2, d23, d20 ; op0 |= r_op0 & (flat & mask [all...] |
vp9_mb_lpf_neon.asm | 67 vst1.u8 {d24}, [r8@64], r1 ; store op0 84 vst1.u8 {d20}, [r8@64], r1 ; store op0 101 vst1.u8 {d19}, [r8@64], r1 ; store op0 424 vqadd.s8 d24, d24, d30 ; op0 = clamp(ps0 + filter2) 468 vsubw.u8 q15, d4 ; oq0 = op0 - p3 546 vaddw.u8 q15, d7 ; op0 += p0 547 vaddw.u8 q15, d14 ; op0 += q6 555 vbif d19, d20, d17 ; op0 |= t_op0 & ~(f2 & f & m)
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/art/compiler/dex/quick/x86/ |
quick_assemble_x86_test.cc | 138 int opcode, int op0 = 0, int op1 = 0, int op2 = 0, int op3 = 0, int op4 = 0) { 144 lir.operands[0] = op0;
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