| /external/e2fsprogs/lib/ss/ |
| request_tbl.c | 54 register ssrt **rt1, **rt2; local
59 for (rt2 = rt1; *rt1; rt1++) {
61 *rt2++ = *rt1;
65 *rt2 = (ssrt *)NULL;
|
| /art/compiler/utils/arm/ |
| assembler_arm32.cc | 797 void Arm32Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) {
800 CHECK_NE(rt2, kNoRegister);
803 CHECK_EQ(static_cast<uint32_t>(rt) + 1, static_cast<uint32_t>(rt2));
834 void Arm32Assembler::strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) {
838 CHECK_NE(rt2, kNoRegister);
841 CHECK_NE(rd, rt2);
843 CHECK_EQ(static_cast<uint32_t>(rt) + 1, static_cast<uint32_t>(rt2));
903 void Arm32Assembler::vmovsrr(SRegister sm, Register rt, Register rt2,
910 CHECK_NE(rt2, kNoRegister);
911 CHECK_NE(rt2, SP)
[all...] |
| assembler_thumb2.cc | [all...] |
| assembler_arm32.h | 125 void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
126 void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
142 void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
143 void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE;
144 void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
145 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
|
| assembler_thumb2.h | 159 void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
160 void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
179 void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
180 void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE;
181 void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
182 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
|
| assembler_arm.h | 436 virtual void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) = 0;
437 virtual void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) = 0;
460 virtual void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) = 0;
461 virtual void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) = 0;
462 virtual void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) = 0;
463 virtual void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) = 0;
|
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 912 const CPURegister& rt2) {
913 DCHECK(AreSameSizeAndType(rt, rt2));
914 USE(rt2);
936 const CPURegister& rt2) {
937 DCHECK(AreSameSizeAndType(rt, rt2));
938 USE(rt2);
949 const CPURegister& rt, const CPURegister& rt2) {
950 DCHECK(AreSameSizeAndType(rt, rt2));
951 USE(rt2);
962 const CPURegister& rt, const CPURegister& rt2) {
[all...] |
| assembler-arm64.h | [all...] |
| assembler-arm64.cc | [all...] |
| macro-assembler-arm64.h | 49 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
50 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
51 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
276 void LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2,
434 const CPURegister& rt2,
493 const CPURegister& rt2,
[all...] |
| simulator-arm64.cc | 1670 unsigned rt2 = instr->Rt2(); local
[all...] |
| macro-assembler-arm64-inl.h | 867 const CPURegister& rt2,
870 DCHECK(!AreAliased(rt, rt2));
871 ldnp(rt, rt2, src);
1124 const CPURegister& rt2,
1127 stnp(rt, rt2, dst);
[all...] |
| macro-assembler-arm64.cc | 594 const CPURegister& rt2,
607 LoadStorePair(rt, rt2, addr, op);
614 LoadStorePair(rt, rt2, MemOperand(temp), op);
616 LoadStorePair(rt, rt2, MemOperand(base), op);
621 LoadStorePair(rt, rt2, MemOperand(base), op);
[all...] |
| /external/vixl/src/vixl/a64/ |
| simulator-a64.cc | 1193 unsigned rt2 = instr->Rt2(); local
1313 unsigned rt2 = instr->Rt2(); local
3231 int rt2 = (rt + 1) % kNumberOfVRegisters; local
3240 int rt2 = (rt + 1) % kNumberOfVRegisters; local
3250 int rt2 = (rt + 1) % kNumberOfVRegisters; local
3270 int rt2 = (rt + 1) % kNumberOfVRegisters; local
[all...] |
| assembler-a64.cc | [all...] |
| macro-assembler-a64.h | 51 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
52 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
53 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
744 const CPURegister& rt2,
[all...] |
| assembler-a64.h | [all...] |
| macro-assembler-a64.cc | [all...] |
| /external/libnl/lib/route/ |
| neightbl.c | 257 char rt[32], rt2[32]; local
262 nl_msec2str(pa->ntp_retrans_time, rt2, sizeof(rt2)));
|
| /external/pcre/dist/sljit/ |
| sljitNativeARM_64.c | 55 #define RT2(rt2) (reg_map[rt2] << 10)
730 return push_inst(compiler, (MADD ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2) | RT2(TMP_ZERO));
737 FAIL_IF(push_inst(compiler, MADD | RD(dst) | RN(arg1) | RM(arg2) | RT2(TMP_ZERO)));
[all...] |
